Computer Systems Architecture II - December 2021 Final Exam PDF

MULUNGUSHI UNIVERSITY IN ASSOCIATION WITH EVELYN HONE COLLEGE OF APPLIED ARTS AND COMMERCE SCHOOL OF BUSINESS & MANAGEMENT STUDIES COMPUTER STUDIES SECTION DIPLOMA IN INFORMATION TECHNOLOGY...

MULUNGUSHI UNIVERSITY IN ASSOCIATION WITH EVELYN HONE COLLEGE OF APPLIED ARTS AND COMMERCE SCHOOL OF BUSINESS & MANAGEMENT STUDIES COMPUTER STUDIES SECTION DIPLOMA IN INFORMATION TECHNOLOGY ADVANCED CERTIFICATE LEVEL II COMPUTER ARCHITECTURE II COURSE CODE: DIT 204 DECEMBER 2021 FINAL EXAMINATION Time Allowed : 3 Hours Marks Obtainable : 100 Pass Mark : 50 Date : Thursday, 23rd December 2021 Time : 14:00 Hours INSTRUCTIONS TO CANDIDATES 1. Write your particulars on the answer booklet clearly. 2. There are Eight (8) questions in this paper. 3. Attempt any Five (5) questions in any order. 4. All questions carry Equal marks. 5. Try NOT to spend more than 36 minutes per question. 6. Cellular Phones and Programmable Calculators are not allowed in the examination room. DO NOT TURN THIS PAGE UNTIL YOU ARE TOLD TO DO SO. QUESTION ONE A Fire Detection System (F) protects a building and its contents against fire by means of Four (4) sensors. These are a Flame detector (A), a Smoke detector (B), and Two (2) High Temperature detectors (C and D) located at opposite ends of each room. The Fire Alarm is triggered only when Two or More of the sensors simultaneously to indicate the presence of Fire in a room of the building. A sensor is True if a fire is detected and False if not. The output of the circuit is True if a fire is detected and False if it is not. a) Derive the truth table to represent this algorithm. (4 marks) b) Draw the K-map for F and hence obtain the simplified expression for F. (6 marks) c) Draw the simplified circuit F. (2 marks) d) Convert the circuit into NAND Logic Only. (4 marks) e) Convert the circuit into NOR Logic Only. (4 marks) (Total 20 Marks) QUESTION TWO a) Explain the difference between Setting and Toggling. (2 marks) b) Describe a “Universal Logic Gate” and state Two (2) examples. (4 marks) c) Obtain the expression for the following circuits below; i) A B Z C (5 marks) ii) A B Y C D (5 marks) d) Prove that the output of the Sum output of the Full Adder from its K-map is equal to the Exclusive OR of its three input variables. (4 marks) (Total 20 Marks) QUESTION THREE a) What is a Flip-Flop? (4 marks) b) List Two (2) applications of a flip flop. (2 marks) c) Explain the difference between a latch and a flip-flop. (2 marks) d) Define Synchronous Circuit. (4 marks) e) Define the following terminologies; i) Karnaugh Map (3 marks) ii) Maxterm (3 marks) f) What is the integral use of a K-Map? (2 marks) (Total 20 Marks) QUESTION FOUR A Zambia Railways Freight Train has Three (3) Failsafe Sensors (S1, S2 and S3) and 1 Emergency Brake switch (E) which controls its motion forwards and in reverse. The train should keep moving unless any of the following conditions arise: If the Emergency Brake Switch (E) is pressed. If Sensor 1 (S1) and Sensor 2 (S2) are activated at the same time If Sensor 2 (S2) and Sensor 3 (S3) are activated at the same time If all the three sensors are activated at the same time Assume Logical Zero (0) for the motion of the Freight Train and; Assume Logical One (1) for the stoppage/halting of the Freight Train. Assume Logical Zero (0) for the Non-Activation/Non-Pressing of S1, S2, S3 and E and; Assume Logical One (1) for the Activation/Pressing of S1, S2, S3 and E. Hence, a) Derive the Truth table for this system. (8 marks) b) Design, using Karnaugh Map techniques, a minimum AND-OR gate circuit for this system. (6 marks) c) Draw the resultant digital circuit diagram using NOR gates ONLY. (6 marks) (Total 20 Marks) QUESTION FIVE a) Construct the logic circuits for the following boolean functions; i) W = C [A.B (C + BD) + A.B] (4 marks) i) X = C.D [A.B (C + B.D) + A.B] (4 marks) ii) Y = A.B + A.C + A.B.C (3 marks) b) Simplify the following Boolean equation and construct the simplified logic circuit. i) Z = A +B + B.C + A + B. (C + D) (9 marks) (Total 20 Marks) QUESTION SIX a) Explain the concept of Regenerative Feedback in Latches and Flip-flops. (1 mark) b) State the two types of Edge Triggering. (2 marks) c) Differentiate between the above stated terms. (5 marks) d) Explain the structural difference between a JK flip flop and a Master-slave JK flip flop. (4 marks) e) Draw the circuit diagram (using logic gates) for the SR Flip flop. (4 marks) f) Explain how the above stated circuit functions. (4 marks) (Total 20 Marks) QUESTION SEVEN a) Simplify the following Boolean expressions by way of Axioms; i) V = A.C + A.B + B + C (4 marks) ii) W = (A + B).(A.B).(B + C).(A.C) (5 marks) b) Reduce the following Boolean expressions to their simplest terms using Axioms; i) X = A.B.C + A.B.C + A.B.C + A.B.C + A.B.C + A.B.C (4 marks) ii) Y = A.B.C + A.B.C + A.B.C + A.B.C + A.B.C (4 marks) iii) Z = (A + B).(A + C) (3 marks) (Total 20 Marks) QUESTION EIGHT a) Explain the terms given below i) State Triggered Circuit (2 marks) ii) Edge Triggered Circuit (2 marks) b) Construct the logic circuit diagram and give the truth table (characteristic table) for the following i) Active-High Input S-R Latch (NOR) (2 marks) ii) Clocked D Latch (4 marks) c) Design the logic circuit for a 3-bit Asynchronous Counter using Negative edge-triggered J-K flip- flops accompanied with a corresponding Timing diagram to illustrate its function. (10 marks) (Total 20 Marks) END OF EXAMINATION