Computer Architecture & Digital System Past Paper PDF PSM/KW/23/2572

# B.Tech. (Computer Science & Engineering) Third Semester (C.B.C.S.) ## Computer Architecture & Digital System ### PSM/KW/23/2572 P. Pages: 2 Time: Three Hours Max. Marks: 70 **Notes:** 1. All questions carry marks as indicated. 2. Solve Question 1 OR Questions No. 2. 3. Solve Question 3 OR Qu...

# B.Tech. (Computer Science & Engineering) Third Semester (C.B.C.S.) ## Computer Architecture & Digital System ### PSM/KW/23/2572 P. Pages: 2 Time: Three Hours Max. Marks: 70 **Notes:** 1. All questions carry marks as indicated. 2. Solve Question 1 OR Questions No. 2. 3. Solve Question 3 OR Questions No. 4. 4. Solve Question 5 OR Questions No. 6. 5. Solve Question 7 OR Questions No. 8. 6. Solve Question 9 OR Questions No. 10. 7. Due credit will be given to neatness and adequate dimensions. 8. Assume suitable data whenever necessary. 9. Illustrate your answers whenever necessary with the help of neat sketches. ### Questions: 1. a) What is Logic Gate. Explain different logic gates along with its truth table. b) Implement the following Boolean function with 8:1 multiplexer $F (A, B, C, D) = Ilm (0, 3, 5, 6, 8, 9, 10, 12, 14)$ OR 2. a) Simplify the following logic expression using K-map and realize using NAND gates $f(A, B, C, D) = Пт (0, 2, 6, 10, 11, 12, 13) + (3, 4, 5, 14, 15).$ b) State and Explain Demorgan's Law 3. a) Explain basic operational concept. b) Explain various addressing modes with example which are used in instruction set design. OR 4. a) Solve the following expression using i) Zero address ii) One address iii) Two address iv) Three address $Z=(A+B-C)*(C-D+E)/(A*B-C)$ 5. a) Explain different Bus Organization along with its advantages and disadvantages. b) Explain Hardwired Control Unit. c) Explain single bus architecture of Processing Unit. OR 6. a) Explain Micro-Programmed Control Unit. b) Define and explain the control sequence of execution of complete instruction. 7. a) Solve the following by using Booth's algorithm. $47 x-3$ b) Design a carry look ahead adder. 8. a) Represent - i) (-450.725)₁₀ ii) -0.000125 in double precision IEEE format. b) Explain hardware for integer division. Divide 17 by 3 using restoring method. 9. a) Find the page hit and page fault ratio for the given page address stream using. i) Least recently used ii) Optimal page replacement policy Assume four page buffers. Page address stream [2, 3, 2, 1, 5, 2, 4, 5, 3, 2, 5, 2] b) Explain the concept of memory hierarchy and characteristics of memory. OR 10. a) Differentiate between IO mapped I/O & memory mapped I/O devices. b) Explain the concept of Interrupt with all its types.