INF 1101 Introduction to Computer Systems PDF

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These lecture notes cover introduction to computer systems, including computer organization, binary representation, arithmetic operations, and logic gates. The content discusses various aspects of computer architecture and organization at a foundational level.

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INF 1101 INTRODUCTION TO COMPUTER SYSTEMS What is a Computer? Foundations Lecture-Part-2 (1 of 4) Prof. Vinod Prasad Email: [email protected] https://apvinod.github.io Contents Introduction - Computer organiz...

INF 1101 INTRODUCTION TO COMPUTER SYSTEMS What is a Computer? Foundations Lecture-Part-2 (1 of 4) Prof. Vinod Prasad Email: [email protected] https://apvinod.github.io Contents Introduction - Computer organization Data Representation Binary Arithmetic Logic Gates and Adders Floating Point Representation Shifting and Arithmetic Hexadecimal Bits, bytes and words Wordlength and its Effects INF1101-SIT-Vinod Prasad 2 Assessment (Part II) - Continuous Assessment Quiz (quizzes during the lectures, MCQs): 15% - Summative Assessment Quiz (MCQ at the end of Part II, week 13): 15% - Lab (Part 2): 20% INF1101-SIT-Vinod Prasad 3 Introduction What is inside a computer? Blocks that move (transfer) and manipulate (operate/transform) binary data (Arithmetic Logic Unit (ALU), memory, registers, and so on). What do these blocks do? Either transfer or transform binary values. All of our data (videos, pictures, MP3s, etc.) are stored as large amounts of binary data. How are these connected? Memory elements and processing units are connected by buses. All of these are controlled in some way by a sequence of instructions – a program. Computer Architecture and Computer Organization Computer Architecture: High level Application Design Functional description of requirements and design implementation for the various parts of a System Design Software computer. It deals with the functional Computer Design behavior of computer Computer systems. Architecture Computer Organization: Logic Design How operational attributes Hardware are linked together and contribute to realizing the Circuit Design architectural specification. Computer Organization It deals with a structural Low level Component Design relationship. Architecture describes what the computer does. Organization describes how it does it. The implementation of the architecture is called organization. 5 Computer Organization Von Neumann architecture The same memory holds both data and instructions, both are transferred to the CPU through the same buses. SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM HDD instruction CPU SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM SDRAM fetch and decode unit Disc Memory functional Controller Controller units instruction PC cache SDRAM (Synchronous Dynamic RAM): Synchronized with the clock speed that the CPU is optimized for. This tends to increase the number of instructions that the processor can perform in a given time. Harvard architecture One memory holds data and another one holds instructions, each are transferred to the CPU through separate buses. INF1101-SIT-Vinod Prasad 6 Layered View of Computer Organization Computer system as a number of interlinked layers. Python, Java, C,..(processor independent) Low-level language (processor dependent) BIOS: Basic Input Output Stream (small program that runs when the computer boots up). An instruction set is a group of commands for a CPU in machine language. Logical operations controlled by internal control unit. Electronic gates performing logical operations on binary digits (bits). 7 INF1101-SIT-Vinod Prasad Computer Organization Arithmetic Logic Unit (ALU) - ALU can perform simple arithmetic operations (add, subtract) and logic operations (NAND, OR, etc.). - Input and output are usually from/to registers, connected through a fast bus. - The ALU deals with fixed point numbers only, and usually operates within a single instruction cycle. Memory Management Unit (MMU) What if the memory space required to store a program is larger than the available RAM on a computer? The solution is ‘virtual memory’. - CPU’s address space in memory is not necessarily the same as the physical memory (RAM) address it resides. - The basic abstraction provided by Operating System (OS) memory management is Virtual Memory. INF1101-SIT-Vinod Prasad 8 Memory Management Unit (MMU) - Virtual memory allows a program that is larger than the available RAM to be executed on a computer. - When a process requests a memory address, the MMU translates the address from a virtual to a physical address. - Virtual memory uses both hardware and software to enable a computer to compensate for physical memory shortages, temporarily transferring data from RAM to disk storage. - It is an area of a computer system’s secondary memory storage space (such as a hard disk) that acts as if it were a part of the system’s RAM. - The main advantage of virtual memory is that an OS can load programs larger than its physical memory. It makes an impression to the users that the computer has unlimited memory. - It does this by storing the most recently used Hardware converts virtual address to items in RAM, and storing the lesser used items physical address using OS-managed in the slower disk memory, and interchanging lookup table (page table). data between the two whenever a disk access is made. INF1101-SIT-Vinod Prasad 9 CPU Interaction with Memory Fetch, instructions decode and CPU Memory execute. data - CPU executes instructions; Memory stores instruction and data. - To execute an instruction, the CPU must: - Fetch an instruction; - Fetch the data used by the instruction; - Decode and Execute the instruction on the data. - Execution may result in writing data back to memory. INF1101-SIT-Vinod Prasad 10 10 CPU Interaction with Memory i-cache instructions Memory data CPU registers - CPU holds instructions temporarily in instruction cache (i-cache). - CPU holds data temporarily in a fixed number of registers. - Instruction and data fetching (retrieving) are HW-controlled. - Data movement is programmer-controlled. INF1101-SIT-Vinod Prasad 11 CPU Interaction with Memory i-cache instructions Memory data CPU registers Register: On-chip memory locations that are directly wired to internal CPU buses to allow extremely fast access (within one instruction cycle). Data/address/control registers. Instruction cycle: Time taken to fetch an instruction, decode it, execute it and return the result. This may be one or more periods of the main clock cycle (derived from an external oscillator). INF1101-SIT-Vinod Prasad 12 Two important questions: i-cache instructions Memory data CPU registers - CPU holds instructions temporarily in the instruction cache. - CPU holds data temporarily in a fixed number of registers. - Instruction and data fetching is HW-controlled. - Data movement is programmer-controlled. Important How are data and instructions represented? questions: How does a program find its data in memory? INF1101-SIT-Vinod Prasad 13 How is Data Represented in Computers? Everything stored in a computer is represented as strings of 1's and 0's – binary numbers. Binary Number - Base 2 number representation - A base 2 digit (0 or 1) is called a bit. - Bit ‘0’ represents 0 volts and Bit ‘1’ represents 5 volts. - Bit ‘0’ (i.e., 0 volts) is logic LOW and Bit ‘1’ (i.e., 5 volts) is logic HIGH. 2.8V to 5V → HIGH (binary ‘1’) - What’s the advantage? 5V Easy to store with bi-stable elements. undefined Reliably transmitted on noisy environment. Why there is a range of voltages for ‘LOW’ and ‘HIGH’? Noise Tolerance. 0V to 0.5V → LOW (binary ‘0’) INF1101-SIT-Vinod Prasad 14 Binary Representation Positional weights: 2x → value depends on the position ‘x’. Most Significant Bit (MSB) Least Significant Bit (LSB) Example: Decimal number 510 in Binary is: 01012 23 22 21 20 Positional weights 0 10 1 3 2 1 0 position 01012 = 20 x 1 + 21 x 0 + 22 x 1 + 23 x 0 = 1+0+4+0 = 510 INF1101-SIT-Vinod Prasad 15 Binary Representation – More Examples Example: 10102 10102 = 20 x 0 + 21 x 1 + 22 x 0 + 23 x 1 = 0+2+0+8 = 1010 Example: 100110102 100110102 = 20 x 0 + 21 x 1 + 22 x 0 + 23 x 1+ 24 x 1 + 25 x 0 + 26 x 0 + 27 x 1 = 0+2+0+8+16+0+0+128 = 15410 111111112 = ____ Biggest possible 8-bit value = _____________ 25510 000000002 = 010 Smallest possible 8-bit value = __________________ 11111111111111112 = 65,535 Biggest possible 16-bit value = _____________ ____ 10 Biggest possible n-bit value = 2n - 1 How do you represent negative All the above represent ‘unsigned’ numbers. INF1101-SIT-Vinod Prasad numbers? 16 How are negative numbers represented in binary? Simplest way – Use a ‘sign’ bit: MSB is the sign bit (negative if MSB=1, positive is MSB=0) Example: +1210 = 011002 whereas -1210 = 111002 Another way: Two’s complement (more often used) Example: +1210 = 01100 – same as above To represent -12 in 2’s complement, flip (invert) all bits and add ‘1’ Flip all bits of 01100 → 10011. Then add ‘1’ → 10100 So, for negative numbers in 2’s complement, just flip all the bits and add 1 There is nothing intrinsically correct about one system over another. Either 11100 or 10100 can be used to represent -12, it just depends on what system of interpretation is used. That is, a human programmer chooses the meaning of the bits. How do you represent a fractional number in Binary? Example: 1010.012 Binary point 23 22 2 1 2 0 2-1 2-2 Positional weights 1 0 1 0. 0 1 3 2 1 0. -1 -2 position 1010.012 = 2-2 x 1+ 2-1 x 0 + 20 x 0 + 21 x 1 + 22 x 0 + 23 x 1+ = 0.25+0+0+2+0+8 = 10.2510 Binary representation: anan-1an-2….a1a0. a-1a-2…a-m INF1101-SIT-Vinod Prasad 18 How does a program find its data in memory? i-cache instructions Memory data CPU registers How are data and instructions represented? How does a program find its data in memory? INF1101-SIT-Vinod Prasad 19 How does a program find its data in memory? Ans: Using the Address D1 = 11101111 D0 = 11001010 A254 = 11111110 A2 = 00000010 Lowest Highest address address A0 = 00000000 A255 = 11111111 A1 = 00000001 8-bit address example. Memory is a large array of bytes (data - D0, D1, etc.), each with a unique address (A0, A1, etc). Each address is a fixed-length binary number (byte in above example). How many memory locations can be addressed using 8-bit address? 28 = 256 - Range of valid addresses = address space. - We can also store addresses as ‘data’ in the memory to “remember” where other data is in memory – In this case, the data in memory is actually the address of the actual data (called ‘indirect addressing’). ❖ What if we have to store more than 256 data (e.g. 1000 data)? ▪ More address bits are needed. How many address bits (minimum) are required to store 1000 data? 2n ≥1024 → 210 = 1024 n=10 bits INF1101-SIT-Vinod Prasad 20 Hexadecimal Representation Hexadecimal or ‘Hex’ (Number with Base 16) – Compact and easy. Hex Digits: 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F (where A =10, B=11, C=12, D=13, E=14 and F=15) Convert binary number to Hex: (a) Split it into groups of 4 bits starting from the right-most bit, since 4 bits can represent decimal numbers from 0 to 15. (b) Write each group by one of the above digits. e.g. 1000 11102 = 8E16 (The first 4 bits is 8, the next is E (8+4+2=14) → 8E. Example: What is this 16 bit number in hex? 1110100011000111 1110 1000 1100 0111 = E8C716 E 8 C 7 INF1101-SIT-Vinod Prasad 21 Addresses and Pointers ❖ An address refers to a location in memory ❖ A pointer is a variable that holds memory address of another variable. ▪ Address can point to any data Address ❖ Value (data) 471 is stored ❖ at address 0x08 00 00 00 00 00 00 01 D7 0x08 ▪ 47110 = 1D716 = 0x 00... 00 01 D7 ❖ Pointer stored at address 0x38 points to 00 00 00 00 00 00 00 08 0x38 address 0x08 Why Pointers? Help us keep track of where things are and what they contain. This is particularly useful once you start working with functions and data structures in C programming. INF1101-SIT-Vinod Prasad 22 Byte Ordering Data in memory can be 8 bits (byte), 16 bits (Word) or even more bits. ❖ How should bytes within a word be ordered in memory? a1, b2, etc. are bytes. ▪ Example: Store the 4-byte (32-bit) int: 0x a1 b2 c3 d4 at address 0x100 ❖ Ordering of bytes is called endianness ▪ The two options are big-endian and little-endian In which address does the least significant byte go? Based on Gulliver’s Travels (Jonathan Swift, 1726): tribes cut eggs on different sides (big, little) https://www.ling.upenn.edu/courses/Spring_2003/ling538/Lecnotes/ADfn1.htm - Big-endian (e.g. SPARC - Scalable Processor Architecture-RISC) Least significant byte has highest address - Little-endian (e.g. x86 – CISC based on Intel 8086, x86-64, 64-bit version) Least significant byte has lowest address - Bi-endian (e.g. ARM) Endianness can be specified as big or little 0x100 0x101 0x102 0x103 Big-Endian 01 a1 23 b2 45 c3 67 d4 0x100 0x101 0x102 0x103 Little-Endian 67 d4 45 c3 23 b2 01 a1 INF1101-SIT-Vinod Prasad 23 23 Byte Ordering Question: The data 0x 03 01 02 04 is stored as a word at address 0x100 in a little-endian, 64-bit machine. What is the byte of data stored at address 0x102? 0x100 0x101 0x102 0x103 Little-Endian 01 04 23 02 45 01 67 03 Content of address 0x102 = 01 Programmer can ignore endianness because it is handled for you. INF1101-SIT-Vinod Prasad 24 Binary Addition A B 0 0 0 1 1 0 1 1 Example: 111012 + 110112 = 2910 + 2710 2910 2710 5610 INF1101-SIT-Vinod Prasad 25 Binary Addition Example: 001010012 + 000111012 8-bit unsigned binary 12 64 32 16 8 4 2 1 8 0 0 1 0 1 0 0 1 ( 41 in decimal) + 0 0 0 1 1 1 0 1 ( 29 in decimal) 12 64 32 16 8 4 2 1 8 0 0 1 0 1 0 0 1 + 0 0 0 1 1 1 0 1 = 0 1 0 0 0 1 1 0 0+0 1+0+0= 1+1+0= 1+0+1= 1+1= 0+1 0+1 1+1= =0 0 0+C(=1) 0+C(=1) 0+C(=1) =1 =1 0+C(=1) 010001102 = 7010 INF1101-SIT-Vinod Prasad 4110 + 2910 = 7010 26 Binary Subtraction Example: 1102 - 1012 Borrow ‘1’ from adjacent digit So, 102 – 12 = 12 610 510 =110 Example: 110002 - 1112 2410 710 =1710 INF1101-SIT-Vinod Prasad 27 Electronic Circuit for Binary Addition In hardware, an ADDER is used to add each set of bits: Half Adder: Adds 2 single bits. Gives SUM and CARRY. Input Output Full Adder: Adds 2 single bits and a carry input. Gives SUM and CARRY OUT. We will look at the adder circuit details soon…You need to know about Logic Gates INF1101-SIT-Vinod Prasad 28 Logic Gates Logic gates are electronic circuits that operate on one or more input digital signals (0 or 1) to produce an output signal (0 or 1). ▪ A binary quantity is one that can take only 2 states: 0 (=0V=Logic LOW=FALSE) or 1 (=5V=Logic HIGH=TRUE) S L OPEN OFF CLOSED ON S L 0 0 1 1 A simple binary arrangement A truth table A Truth Table shows the relationship between input and output. INF1101-SIT-Vinod Prasad 29 Logic Gates ▪ A binary arrangement with two switches in series L = S1 AND S2 INF1101-SIT-Vinod Prasad 30 Logic Gates ▪ A binary arrangement with two switches in parallel L = S1 OR S2 INF1101-SIT-Vinod Prasad 31 Logic Gates ▪ The building blocks used to create digital circuits are logic gates. ▪ There are three elementary logic gates and a range of other simple gates. Each gate has its own logic symbol. ▪ The function of each gate can be represented by a truth table or using Boolean notation. AND gate S1 Output L will be HIGH L (ON) only if both inputs S2 S1 and S2 are HIGH. INF1101-SIT-Vinod Prasad 32 OR gate (c) Boolean expression Output L will be HIGH S1 L (ON) if S1 or S2 is S2 HIGH. NOT gate (or inverter) INF1101-SIT-Vinod Prasad 33 NAND gate (AND+NOT) NOR gate (OR+NOT) INF1101-SIT-Vinod Prasad 34 Exclusive OR gate (XOR) The output should be true (high) if either of its inputs are true, but not if both inputs are true. Now, let us find out how to build Half and Full Adders with Gates. INF1101-SIT-Vinod Prasad 35 Half Adder Truth Table Input Output XOR AND A.B INF1101-SIT-Vinod Prasad 36 Full Adder Truth Table Sum=(A⊕B)⊕Cin Cout=AB + Cin (A⊕ B) Needs to apply Boolean simplification to obtain these expressions – You will study later (in another module) INF1101-SIT-Vinod Prasad 37 Floating Point Representation Fractional Binary Numbers 2i 2i–1 4 2. 1 bi bi–1 b2 b1 b0 b–1 b–2 b–3 b–j 1/2 1/4 1/8 2–j - Bits to right of “binary point” represent fractional powers of 2. i k  bk 2 k =− j INF1101-SIT-Vinod Prasad 38 Fractional Binary Numbers Decimal Value BinaryRepresentation ▪ 5 and 3/4 101.112 ▪ 2 and 7/8 10.1112 Points to Note: ▪ Shift left = multiply by power of 2 210 = 00102 410 = 01002 = 0010 1 (i.e., divide by 21) operation Left / right Shift operation is performed using SHIFT REGISTERS (You will study in another module). ▪ Numbers of the form 0.111111…2 are less than 1.0 INF1101-SIT-Vinod Prasad 39 Fractional Binary Numbers Limitations: ▪ Exact representation possible only for numbers of the form x* 2y ▪ Other rational numbers have repeating bit representations (infinite bits) ▪ 1/3 = 0.333333…10 = 0.01010101…2 Fractional binary numbers can be represented either in fixed point or in floating point form. Fixed point: Binary point is set in a fixed position, and therefore it does not need to be stored in memory. Example: 0100.0112 (binary point is after the 4th bit (from the left). Hence, the fraction is represented in binary as 01000112 and this can be interpreted as equivalent to 0100.0112. Binary point is fixed my processor designer. Another processor can have the binary point fixed after the 5th bit: 01000.112 INF1101-SIT-Vinod Prasad 40 Floating Point Representation Analogous to scientific notation ▪ 12000000 = 1.2 x 107 (=1.2e7) ▪ 0.0000012 = 1.2 x 10-6 (=1.2e-6) Floating Point = (–1)s * M * 2E - Sign bit s determines whether number is negative or positive. - Mantissa M normally a fractional value in range [1.0,2.0). - Exponent E weights value by power-of-two. Base 10 examples: If E = 4, M=1.125, then the number = 1.125x104 = 11250 If E = -2, M=5, then the number = 5x10-2 = 0.05 Base 2 examples: If E= 4, M=1.125, then the number = 1.125x24 = 18 If E= -2, M=5, then theINF1101-SIT-Vinod number = 5x2-2 = 1.25 Prasad 41 IEEE 754 Floating Point IEEE standard 754 floating point representation is used in almost all modern processors. IEEE754 has 1 sign bit (s), 8 exponent bits (E) and 23 mantissa bits (M) for single-precision numbers. s E M Bit: 0 1 9 10 31 E and M are both fixed point 2's complement unsigned numbers Stored together. e.g. 0000 1000 1110 0000 0000 0000 0000 0000 Double precision numbers have 1, 11, and 52 bits for s, E, and M respectively. s E M 0 1 12 13 64 INF1101-SIT-Vinod Prasad 42 IEEE 754 Floating Point - The exponent is stored in excess-127 for single precision (and excess 1023 for double precision). - It means that you must add 127 to it before storing it (or subtract 127 from it when reading the number). - The mantissa is also slightly unusual; the 23 (52) bits are in fractional format and it is assumed that 1 must be added to the mantissa, but the 1 is not stored. It is a hidden 1. In other words, the mantissa is a number between 1 and 2. INF1101-SIT-Vinod Prasad 43 IEEE 754 Floating Point Example: 0011 1111 1000 0000 0000 0000 0000 0000 sign (1 bit) exponent (8 bits) mantissa (23 bits) ⚫ Sign is 0 so this is positive ⚫ Exponent is 64+32+16+8+4+2+1–127 = 127–127 = 0 (remember it's in excess-127 format). ⚫ Mantissa is 0, but with the hidden 1, it becomes 1.0. s ⚫ FP = (–1) * M * 2 E ⚫ So the number stored is 1.0×2 0 = 1.0 INF1101-SIT-Vinod Prasad 44 IEEE 754 Floating Point Example: 1100 0010 0010 0000 0000 0000 0000 0000 sign (1 bit) exponent (8 bits) mantissa (23 bits) ⚫ Sign is 1, so this is negative ⚫ Exponent is 128+4=132, but we must subtract 127. E = 132-127=5 ⚫ Mantissa is 0.25 + the hidden 1 = 1.25 s ⚫FP = (–1) * M * 2 E 5 ⚫ So the number stored is -1×1.25×2 = -40.0 INF1101-SIT-Vinod Prasad 45 Shifting and Arithmetic - Multiplication X1 = 000110102 = 2610 X2 = 2610 x 2 = 5210 X2 = X1 x 21 = 001101002 = 5210 To obtain X2, simply shift X1 by ‘1’ unit to the LEFT: X1 > 2 → 00000110.12 = 6.510 (=1310 ÷ 2) X5 = X1 >> 2 (Shift X1 by ‘2’ units to the right). Key point: Division by 2a is equivalent to shifting the binary bits to the right by ‘a’ times. Example: X1 = 0011.1000 = 3.510 How to find 3.510 ÷ 2 in binary? INF1101-SIT-Vinod Prasad 47 Binary Multiplication 1 0 1 12 x 1 0 12 ? 1 0 1 12 = 1110 1 0 1 1x 1 0 12 = 510 1 0 1 Product = 5510 1 0 1 1 + Shift by ‘1’ unit 0 0 0 0 + Shift by ‘2’ units 1 0 1 1 + 1 1 0 1 1 1 5510 Multiplication can be done by ‘shift’ and ‘add’ operations (faster). Product of ‘M’-bit number and ‘N’-bit number can be up to ‘(M+N)’ bits. What if the register wordlength is only ‘K’ bits, which is less than ‘(M+N)’ bits? Discard (M+N-K) bits → Beware of this! INF1101-SIT-Vinod Prasad 48 Bit, Nibble, Byte, Word ⚫ Bit a single binary digit (1 or 0). ⚫ Nibble 4 bits (half a byte). ⚫ Byte 8 bits, the most commonly used unit. ⚫ Words binary data is stored in memory as groups of bits each group occupies a single ‘address’. These groups are called words. ⚫ Wordlength The number of bits in a Word (8, 16, 32, etc.) Wordlength is fixed for a given computer and values typically range from 8 to 64 bits (or more), but these days is mostly 32-bits. 1 KB (Kilo Byte) = 1024 bytes (approximated as 1000 Bytes). 1 MB (Mega Byte) = 1024 KB (approximated as 1000 KB). Note: Kb is Kilo bits (not same as KB). Similarly, Mb is Mega bits (not same as MB). INF1101-SIT-Vinod Prasad 49 Effect of Different Wordlengths – Listen to this Music! How about if you listen to music on different computers that use different wordlengths? Listen: Original Music Music – 8 bits wordlength computer Music – 4 bits wordlength computer Music – 2 bits wordlength computer Which one is the best? Why? What the overhead when you go for 8 bits wordlength (compared to 4 bits)? Tradeoff: Quality v/s Memory size When you buy a sound card for your computer, which one would you prefer – 16-bit card or 24-bit card? Acknowledgement: https://dspillustrations.com/pages/posts/misc/how-does-quantization-noise-sound.html INF1101-SIT-Vinod Prasad 50 How much storage is required for Music? Q: Music is stored in an audio CD at a sampling rate of 44.1 kHz, each sample is encoded using 16 bits. If the total duration of the music is 1 hour, how much storage space (in bits) is required for this music? Solution: Sampling rate = number of music samples in 1 second = 44.1 k = 44,100 samples per second Total number of samples in 1 hour = 44,100 x 60 x 60 samples Number of bits used to encode each sample = 16 bits. Total number of bits used to encode 1 hour of music = 44,100 x 60 x 60 x 16 = 2,540,160,000 bits ≈ 318 MB. (Note: 1 Megabyte = 8 × 106 bits). The above calculation is only for one channel. However, there are two channels in audio CD, which means the storage space required is 2 x 318 MB = 636 MB! Then, how can we store several hours of music in an audio CD? Solution is ‘Compression’ (e.g. mp3) INF1101-SIT-Vinod Prasad 51 Summary ▪ Computer Organization – Architectures, Layered View of Organization, ALU, Memory, Interaction between CPU and Memory. ▪ Data representation - Binary ▪ Binary Arithmetic – Addition, Subtraction, Half Adder, Full Adder ▪ Logic Gates and Adder Realization ▪ Shifting and Arithmetic, Multiplication ▪ Hexadecimal ▪ Bits, Bytes, Word, Wordlength, Effects of different wordlengths INF1101-SIT-Vinod Prasad 52 Self Assessment Examples Convert the following decimal numbers to binary and hex: a. 14 Binary: 1110, Hex: E b. 21 Binary: 10101, Hex: 15 c. 103 Binary: 1100111, Hex: 67 Convert the following binary numbers to decimal and hex: a. 01010101 Decimal: 85, Hex: 55 b. 1000100010001000 Decimal: 34952, Hex: 8888 Convert the following hex numbers to binary and decimal: a. 0x100 Binary: 100000000, Decimal: 256 b. 0XFF Binary: 11111111, Decimal: 255 c. 0x100D Binary: 10000000000011, Decimal: 4109 INF1101-SIT-Vinod Prasad 53 Self Assessment Examples Which of the following language is processor-independent? a. High level language b. Low level language c. Machine language bitwise rotation to the left (also known as a circular left shift). For the schematic given below, what is the operation performed by the operator? Input = 00110100 Operator Output = 11010000 For the schematic given below, assume that the wordlength is fixed as 8 bits. What will be the output of the operator? Discuss the limitation (if any). Input = 00110100 Operator Output = ? >>3 The operation performed by the operator >>3 is a right shift of the input binary number 00110100. Output: 00000011 (or 3 in decimal). INF1101-SIT-Vinod Prasad 54

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