8086 Microprocessor Architecture and Programming

Study Notes

16-bit microprocessor: The 8086 works with 16-bit data, which means its Arithmetic Logic Unit (ALU), internal registers, and most instructions are designed for 16-bit operations.
Data Transfer: It can read and write data to memory (M) or input/output (I/O) in both 16-bit and 8-bit units.
Memory Addressing: It can directly access up to 2²⁰ = 1 MB of memory.
I/O Addressing: It can access up to 2¹⁶ = 64 KB of I/O locations.
Functional Units: The 8086 µP is divided into two units:
- Bus Interface Unit (BIU): Handles external bus operations.
- Execution Unit (EU): Executes instructions, performs arithmetic and logic operations.
Simultaneous Operation: Both units operate concurrently, allowing the 8086 to fetch instructions while executing previous ones.

Registers: High-speed storage locations internal to the CPU.
16-bit Registers:
- General Purpose Registers: Used for arithmetic and data movement. (e.g., AX, BX, CX, DX)
- Index Registers: Hold offsets for data or instructions. (e.g., SI, DI)
- Segment Registers: Specify the base address for program instructions or data. (e.g., CS, DS, ES, SS)
- Status and Control Registers:
  - Flags: Reflect the status of the CPU and arithmetic operations.
  - Instruction Pointer (IP): Contains the offset of the next instruction to be executed.

Special register with individual bits representing CPU status and arithmetic operation results.
Flag Types:
- Control Flags:
  - Direction Flag (D): Determines the direction of data movement (up or down).
  - Interrupt Flag (I): Enables or disables interrupts.
  - Trap Flag (T): Enables or disables single-stepping mode.
- Status Flags:
  - Carry Flag (C): Indicates a carry from the most significant bit after arithmetic operations.
  - Overflow Flag (O): Indicates an overflow during signed arithmetic operations.
  - Sign Flag (S): Reflects the sign of the result (positive or negative).
  - Zero Flag (Z): Indicates whether the result of an operation is zero.
  - Auxiliary Flag (A): Used in BCD arithmetic.
  - Parity Flag (P): Indicates whether the result has an even or odd number of 1 bits.

Data Access: The 8086 can access memory in units of bytes or words.
Addressing Schemes:
- Absolute Address: A direct memory address (e.g., 04A26H).
- Segment Offset Address: A combination of a segment address (base location) and an offset value within that segment.

Physical Address Calculation: Physical address = (Segment address × 10) + Offset register
Segment Register Contents:
- Starting Address Calculation: Segment register value × 10.
- Ending Address Calculation: Starting address + FFFF (maximum offset).

Operand Types: Operands are the data operated on by instructions.
Addressing Modes: Determine how the 8086 fetches data for instructions:
- Immediate Addressing Mode: The data is included directly in the instruction (constant value).
  - Example: mov AL, 90h
  - Note: Constants cannot be used as destination operands.

Register to Register Transfer: Copies data between internal registers.
- Example: mov AX, BX
- Constraints: Registers must have the same size (8-bit or 16-bit).

Direct Addressing Mode: The address of the memory location is specified directly in the instruction.
- Example: mov AL, [1234H]
- Note: The Instruction Pointer cannot be used as a destination operand.

Addressing with Register Content: Data is accessed using the contents of a register (BI, SI, DI, BX, or BP).
- Example: mov AX, [SI] or mov [DI], AH

Displaced Index Registers: The memory address is calculated by adding the offset (displacement) to the value in an index register (SI or DI). - Examples: mov Ax, [SI + 6] or mov Bx, [DI + 6]

Displaced Base Registers: The memory address is calculated by adding the offset (displacement) to the value in a base register (BX or BP). - Examples: mov Ax, [BP + 16] or mov [Bx + 4], CL

Combining Base and Index: Memory address is calculated by combining the contents of a base register (BX or BP) and an index register (SI or DI). - Examples: mov Ax, [Bx + SI]

Displaced Base and Index: Combines based and index addressing with an additional offset (displacement). - Example: mov Cx, [Bx][SI] (same as mov Cx, [Bx + SI])