Chapter Two.pdf

Chapter Two: Hardware/Software Architecture of 8086 µPs Hardware Internal Architecture  The 8086 µP is: - 16-bit µp ⇒ The term of 16-bit means that its ALU, Internal Register, and most of the instructions are designed to work with 16 binary word. - 16-bit DB ⇒ It can read data an...

Chapter Two: Hardware/Software Architecture of 8086 µPs Hardware Internal Architecture  The 8086 µP is: - 16-bit µp ⇒ The term of 16-bit means that its ALU, Internal Register, and most of the instructions are designed to work with 16 binary word. - 16-bit DB ⇒ It can read data and write data to (M) or (I/O) either 16 or 8 bit at a time. - Size of memory AB = 20bit ⇒ It can directly access with 220 =1M byte location. - 16-bit I/O address ⇒ It can access with 216 = 64K byte location. - It performs arithmetic and logic operation on bit/byte/word.  The 8086 µP is divided into two functional units: - Bus Interface Unit: which is responsible for performing all external bus operations. - Execution Unit: which is responsible for execute instructions and perform arithmetic and logic operations.  Both units operate at the same time with dedicated function. 6 Software Programming Mode  Intel registers of µP: - Registers are 8,16,32 bit high speed storage location directly inside the CPU.  16-bit Registers in 8086 µP: - General Purpose: Used for arithmetic and data movement. e.g.: if we move 126F H to Ax then AL would immediately = 6FH and AH= 12H - Index Register: Hold the offset to the data or instruction. - Segment Register: Used for base location for program instruction 7  - Status and Control: Flag: To show the status of the CPU or result of arithmetic operation. Instruction Pointer: Contain the offset of the next instruction to be executed. Flag Register  Flag Register: is a special register with individual bit position assigned to show the status of CPU or the result of arithmetic operations. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 X X X X O D I T S Z X A X P X C  There are two types of flags: - Control Flag: Direction Flag (D)⇒ Up=0 / Down =1 Interrupt Flag (I)⇒ Disable =0 / Enable =1 Trap Flag (T)⇒ Off=0 / On=1 - Status Flag: Carry Flag (C)⇒ No Carry =0 / Carry =1 Overflow (O)⇒ No Overflow =0 / Overflow =1 Sign Flag (S)⇒ Positive =0 / Negative =1 Zero Flag (Z)⇒ Not Zero =0 / Zero =1 Auxiliary Flag (A)⇒ No Carry =0 / Carry =1 Parity Flag (P)⇒ Odd =0 / Even =1 𝒆𝒙: What are the value of flags bit, when performing: a) 38 H b) 34F5 H 2F H + 95EB H + a b CF 0 0 𝒔𝒐𝒍: PF 0 0 a) 111 b) 1 AF 1 1 00111000 0011010011110101 ZF 0 0 00101111 + 1001010111101011 + SF 0 1 01100111 1100101011100000 OF 0 0 8 Addressing Data in Memory  The processor can access one or more byte of memory at a time, for example, the processor transfer the value (0529 H) from a register into memory address (04A26 H).  There are two types of addressing schemes: - Absolute Address: such as (04A26 H) - Segment Offset Address: it combines the starting address of a segment with an offset value. Segment: Special area defined in the program (CS/DS/ES/SS) Offset: The distance in byte from the segment address to another loaction. 9 Specifying address  To represent a segment address and its relative offset:  Physically address = segment address (shifted left by 1 digit) + offset = {(segment register× 10) + offset register} 𝒆𝒙: 020A: 1BCD 𝑃ℎ𝑦𝑠𝑖𝑐𝑎𝑙 𝑎𝑑𝑑𝑟𝑒𝑠𝑠 = 020A × 10 = 020A0 + 1BCD = 03C6D H 𝒆𝒙: Given the following segment register contents calculate the starting and ending address: Seg.reg Starting address Ending address 2000 H 20000 H + FFFF 2FFFF H 2001 H 20010 H + FFFF 3000F H AB00 H AB000 H + FFFF BAFFF H 1234 H 12340 H + FFFF 2233F H 10 Chapter Three: Addressing mode in 8086 programming  When the microprocessor execute the instruction, it perfumes the specified function on data.  These data are called operands.  To access these different types of operands, the 8086 provided with various addressing mode. 1. Immediate operands addressing mode. 2. Register operands addressing mode. 3. Memory operands addressing mode. 1. Immediate operands addressing mode: - It transfer the source immediate byte/word of data to the destination register or memory location. - Immediate data ≡ Constant data 𝒆𝒙: mov AL, 90 h  mov CL, 10001000 b  mov CS, 1234 h  2. Register operand addressing mode:(Register) - Transfer a copy of a byte/word from source register to destination register. - Both source and destination are internal register (reg , reg). 1 𝒆𝒙: Mov Ax, Bx  same size Mov Ax, CS  same size segment or general Mov BH, AL  same size Mov SI, AL  different size Mov CS, DS  segment to segment 3. Memory operand addressing mode: a) Direct Addressing mode:(Direct) - The address of the data is defined in the instruction itself. 𝒆𝒙: mov AL, [1234 H]      mov Bx,      mov IP,  can’t move data to the instruction pointer. 12  b) Register indirect addressing mode:  It allows data to be addressed at any memory location through an offset address held in any of the following registers: Index {SI and DI} and Base {Bx and BP} registers.  It transfers a byte/word between register and memory. 𝒆𝒙: mov Ax, [SI]  mov Bx, [DI]  mov Ax, [SP]  not index nor base registers mov Ax, [IP]  instruction pointer mov [DI], AH  c) Index addressing mode: - The data in a segment of memory are addressed by adding the displacement to the content of index register (SI and DI). e.g.: SI mov reg , [ + displacement] DI SI mov reg , disp [ ] DI SI mov reg , [ ] [disp] DI 13 𝒆𝒙: mov Ax , [SI + 6]  0010 + 0006 = 0016 H mov AH , [SI + 6] mov Bx , [DI + 6]  0020 + 0006 = 0026 H mov Cx , [SI +DI + 4]  not allowed to use two index registers at the same time. d) Base addressing mode:(Register relative) - The data in a segment of memory are addressed by adding the displacement to the content if base register (BP or Bx). e.g.: BP mov reg , [ + displacement] Bx BP mov reg , disp [ ] Bx BP mov reg , [ ] [disp] Bx 14 𝒆𝒙: mov Ax , [BP + 16] 0201 + 0016 = 0217 H mov [Bx + 4] , CL 0214 + 0004 = 0218 H e) Based and Index addressing mode:(Base plus index) - This type of addressing uses one base register (BP or Bx) and one index register (SI or DI) to indirectly addressing memory. e.g.: BP mov reg , [ + SI] Bx BP mov reg , [ + DI] Bx BP SI mov reg , [ ] [ ] Bx DI 𝒆𝒙: mov Ax , [Bx+ SI] or mov Ax , [Bx][SI]  mov Bx , [Bx + BP]  mov Cx , [SI +DI ]  mov Ax , [Bx+ SI +DI]  15 𝒆𝒙: mov Cx , [Bx][SI] 0030 + 0010 = 0040H mov CH, [Bx][SI] 0030 + 0010 = 0040H f) Based and index with displacement addressing mode:( Base relative plus index) - This mode is similar to based and index addressing mode with adding displacement value. e.g.: 𝐵𝑥 𝐷𝐼 mov reg , [ + + disp] 𝐵𝑃 𝑆𝐼 𝐵𝑥 𝐷𝐼 mov reg , [ ] [ ] [disp] 𝐵𝑃 𝑆𝐼 𝐷𝐼 𝐵𝑥 mov reg , disp [ ] [ ] 𝑆𝐼 𝐵𝑃 𝒆𝒙: mov Ax , [Bx + SI + 20]  mov DI , [Bx +BP + DI +40]  can’t use two same registers (base and base) mov Cx , [SI +DI + 400]  can’t use two same registers (index and index) 16 𝒆𝒙: The contents of 8086 registers are as given below, Find the content of registers for the following instructions. CS=1000 H , DS=2000 H , BP=0010 H , Bx = 0020 H , SI=0040 , DI=0050 H , Ax=1234 H 1) mov AL , [BP] 2) mov Cx , [Bx] 3) mov AL , [BP + SI] 4) mov 5H [Bx] [DI] , AL 5) mov Cx , [Bx + SI +4] 6) mov Ax , Bx 7) mov [BP][SI] , Cx 17