Microprocessor Architecture: Intel 8086 and 80X86 Family

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Questions and Answers

What is the default segment register for program (code) in Intel microprocessors?

CS (correct)

In 80386 and above microprocessors, which register is used as the program counter?

ESP

EIP (correct)

EBP

Which segment register is used for stack operations in Intel microprocessors?

SS (correct)

What is the offset address associated with the program counter in 8080, 8086, and 80286 microprocessors?

IP Signup and view all the answers

Which segment register is used for string (destination) data in Intel microprocessors?

ES Signup and view all the answers

What is the purpose of the VM flag?

To allow virtual mode for multiple DOS programs each with a 1 MB memory partition Signup and view all the answers

What is the purpose of the DS segment register in Intel microprocessors?

Data operations Signup and view all the answers

What is the function of the ID flag?

It gives information on CPU version and manufacturer Signup and view all the answers

What is the purpose of the CS register?

It points to the start of the code segment in memory Signup and view all the answers

What is the purpose of the AC flag?

To detect addressing memory on wrong boundary for words/double words Signup and view all the answers

What is the size of a segment in real mode?

64K (216) bytes of fixed length Signup and view all the answers

What is the purpose of the FS and GS registers?

They are additional segment registers on 80386 and above Signup and view all the answers

What is the primary function of the program-visible registers in a microprocessor?

To execute instructions and manipulate data Signup and view all the answers

What is the purpose of the flag bits in the Flags register?

To indicate the result of an arithmetic operation Signup and view all the answers

What is the difference between memory addressing in real mode and protected mode?

Real mode uses segmentation, while protected mode uses paging Signup and view all the answers

What is the purpose of the processor (organization) model?

To describe the internal architecture of the microprocessor Signup and view all the answers

What is the main difference between program-visible registers and program-invisible registers?

Program-visible registers are accessible to the programmer, while program-invisible registers are not Signup and view all the answers

What is the purpose of the memory paging mechanism?

To provide a memory addressing mechanism in protected mode Signup and view all the answers

What is the evolution of the 80X86 architecture?

It started with the 8086 processor and evolved to the Pentium processor Signup and view all the answers

What is the architecture of a microprocessor?

A logic design that determines the process of data manipulation and communication Signup and view all the answers

What is the purpose of the prefetch-&-queue scheme?

To speed up processing Signup and view all the answers

What is the term for fetching the next instruction while the current instruction is being executed?

Pipelining Signup and view all the answers

What is the result of BIU adding the offset of 4214H in IP to the segment base address 348A0H?

A 20-bit physical address of 38AB4H Signup and view all the answers

What is stored in the CS register?

The upper 16 bits of the starting address of the current code segment Signup and view all the answers

What is the purpose of the direction flag (D) in the 8086 processor?

Determines the auto increment/decrement direction for SI and DI registers Signup and view all the answers

What is the alternative way of representing a 20-bit physical address?

Segment base : Offset Signup and view all the answers

What is stored in the IP register?

The offset of the next code byte within the current code segment Signup and view all the answers

What is the purpose of the interrupt flag (I) in the 8086 processor?

Enables or disables the processing of hardware interrupts Signup and view all the answers

What is the role of the IP register in producing the physical address of the next instruction?

It holds the offset that is added to the segment base address to produce the physical address Signup and view all the answers

How is the physical address of the next instruction produced?

By adding the CS register value to the IP register value Signup and view all the answers

What is the result of BIU automatically inserting zeros for the lowest 4 bits of the segment base address?

The segment base address is aligned to a 16-byte boundary Signup and view all the answers

What is the purpose of the sign flag (S) in the 8086 processor?

Indicates the sign of the result Signup and view all the answers

What is the reason for not adding the two 16-bit numbers directly in line to produce the physical address?

Because the CS register contains only the upper 16 bits of the base address Signup and view all the answers

What is the purpose of the auxiliary flag (A) in the 8086 processor?

Indicates half-carry between bits 3 and 4 Signup and view all the answers

What is the purpose of the BIU?

To fetch the instruction code bytes Signup and view all the answers

What is the purpose of the trap flag (T) in the 8086 processor?

Turns trapping interrupt on or off Signup and view all the answers

Study Notes

The Microprocessor and its Architecture

A microprocessor (MP) is a programmable digital device designed with registers, flip-flops, and timing circuits.
The MP has a set of instructions to manipulate data and communicate with peripherals, determined by its architecture.

Internal Architecture of the Microprocessor

The programmer's model, also known as the registers model, is one aspect of the internal architecture.
The processor (organization) model is another aspect of the internal architecture.

Memory Addressing

Memory addressing can be done using segmentation in both real mode and protected mode.
In real mode, memory addressing is done using a 20-bit physical address.
In protected mode, memory addressing is done using a 32-bit physical address.

Instruction Pointer (IP)

The IP register holds a 16-bit offset/address of the next code byte within the current code segment.
The value in IP is referred to as an offset because it must be added to the segment base register in CS to produce a 20-bit physical address.
The CS register contains the upper 16 bits of the base address of the current code segment.

EFLAGS (Flags Register)

The Flags register contains status flags that are set or reset based on the outcome of arithmetic and logical operations.
Basic flag bits include Carry (C), Parity (P), Auxiliary (A), Zero (Z), Sign (S), Overflow (O), and Direction (D).
Newer flag bits include IOPL, NT, RF, VM, AC, VIF, VIP, and ID.

Segment Registers

Each segment register points to the start of a segment in memory.
Segment registers are CS (code), DS (data), ES (extra data), SS (stack), FS, and GS (on 80386 and above).
Segment registers define the start of a section (segment) of memory for a program, which can be either 64K bytes of fixed length (real mode) or up to 4G bytes of variable length (protected mode).

Defaults

Default segment numbers are assigned to CS for program (code), SS for stack, DS for data, and ES for string (destination) data.
Default offset addresses are associated with each segment register.

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Description

This quiz covers the internal architecture of microprocessors, including the programmer's model and processor organization model, as well as memory addressing with segmentation in real and protected modes.