Week 2-2-Nabil.pdf

Chapter # 2 The Microprocessor and Its Architecture Continued 1 Week # 2, Lecture 2 Dr. Qurban Ali, EE Department 2–2 REAL MODE MEMORY ADDRESSING ´ 80286 and above operate in either the real or protected mode. ´ Real mode operation allows addressing of only the first 1M byte of memory space—even in...

Chapter # 2 The Microprocessor and Its Architecture Continued 1 Week # 2, Lecture 2 Dr. Qurban Ali, EE Department 2–2 REAL MODE MEMORY ADDRESSING ´ 80286 and above operate in either the real or protected mode. ´ Real mode operation allows addressing of only the first 1M byte of memory space—even in Pentium 4 or Core2 microprocessor. ´the first 1M byte of memory is called the real memory, conventional memory, or DOS memory system, organized as ´Individual bytes of data ´Stored at consecutive addresses over the rage 0000016 to FFFFF16 ´The memory is organized as 8 bit bytes Segments and Offsets ´ Real mode memory addresses must consist of a segment address plus an offset address. ´ segment address defines the beginning address of any 64K-byte memory segment ´ offset address selects any location within the 64K byte memory segment ´ Figure shows how the segment plus offset addressing scheme selects a memory location. ´ It shows a memory segment beginning at 10000H, ending at IFFFFH ´ Segment and offset address is sometimes written as 1000:F000. Default Segment and Offset Registers ´ The microprocessor has rules that apply to segments. ´ The code segment register defines the start of the code segment, where as the instruction pointer locates the next instruction within the code segment. CS IP/EIP Instruction address DS SI/ESI, DI/EDI Data address SS SP/ESP, BP/EBP Stack address ES DI/EDI String address for data Figure 2–4 A memory system showing the placement of four memory segments – think of segments as windows that can be moved over any area of memory to access data or code – a memory segment can touch or overlap if 64K bytes of memory are not required for a segment – a program can have more than four or six segments, but only access four or six segments at a time Segment and Offset Addressing Scheme - Relocation ´ Segment plus offset addressing allows DOS programs to be relocated in memory. ´ A relocatable program is one that can be placed into any area of memory and executed without change. ´ Relocatable data are data that can be placed in any area of memory and used without any change to the program. ´ Because memory is addressed within a segment by an offset address, the memory segment can be moved to any place in the memory system without changing any of the offset addresses - only the contents of the segment register must be changed to address the program in the new area of memory. Generating a Physical Address 15 0 Offset value 7 15 0 Segment register 0000 adder 19 20-bit Physical memory address 0 8 Example of Generating a Physical Address The lowest address byte in a segment has an offset of 000016 and the highest address byte in a segment has an offset of FFFF16 (why?) Dr. Qurban Ali, EE Department Segment and Offset values Illustration 9 There are many possible combinations of segment base address and offset that yield the same physical address (how?) Example: 12B0:0025 = 12B25 12AF:0035 = 12B25 Segment Offset 12B0 0025 Segment + Physical address 1 2 B 2 5 Offset Physical address Dr. Qurban Ali, EE Department 12AF 0035 12B25 + Memory Address Space: 2-byte word 10 q 8086 has ability of accessing 2-byte word in one instruction. q Less significant byte is stored in lower address byte, and more significant byte is stored in higher address byte. Example: Address Memory (binary) 0072516 0101 0101 0072416 0000 0010 Memory (hexadecimal) 55 02 the word stored at memory location (00724H) is 5502H. q Words can be stored at § Even boundary (aligned word): the less significant byte at an even address. § Odd boundary (misaligned word): the less significant byte at an odd address. Dr. Qurban Ali, EE Department Example 11 ´ What is the data word shown in the figure below? Express the result in hexadecimal form. Is it stored at an even- or oddaddress word boundary? Is it aligned or misaligned word of data? Memory Address (binary) 0072B16 0072A16 0111 1101 0000 1010 Solution: Most significant byte at 0072B is 7D16 Least significant byte at 0072A is 0A16 Together the two bytes give the word 7D0A16 Since least significant byte is stored at address 0072A which is in binary 0000 0000 0111 0010 1010. Hence it is stored at an even boundary ´ Therefore, it is aligned. ´ ´ ´ ´ ´ Memory Address Space : 4-byte word 12 q For double words (4 bytes), the least significant byte at the lowest byte address, while the most significant byte at the highest byte address. q Aligned: A double word starting at address a multiple of 4 q Misaligned: A double word starting at address not a multiple of 4 q Example: Address Memory (binary) 0000 0101 0001 1010 0010 0111 0011 1011 Memory (hexadecimal) 05 1A 27 3B (0072E)16 (0072D)16 (0072C)16 (0072B)16 at memory address (0072B) is given by 051A273BH. Aligned or misaligned? Dr. Qurban Ali, EE Department