System Architecture - Lecture 05.pdf

System Architecture Lecture 05 Shahina Ajward  Content Von Neumann architecture Instruction Sets Memory Hierarchy System Bus Program Execution I/O Techniques  Computer Architecture The design of the internal workings of a computer s...

System Architecture Lecture 05 Shahina Ajward  Content Von Neumann architecture Instruction Sets Memory Hierarchy System Bus Program Execution I/O Techniques  Computer Architecture The design of the internal workings of a computer system. Organization of CPU, memory, and other hardware components. Involves decisions about the organization of the hardware, such as the instruction set architecture, the data path design, and the control unit design. Concerned with optimizing the performance of a computer system and ensuring that it can execute instructions quickly and efficiently.  Von Neuman Architecture In 1940s prominent mathematician John von Neuman introduced a model for computer Architecture.  Central Processing Unit The main processor or central processor of the computer. The data processing, logical decision and control are included on a single integrated circuit or a small number of ICs. can perform tasks such as follow instructions, do mathematical operations, move data around and make logical decisions. Powerful as it can do tasks very fast. However, unable to do anything unless it is given a set of instructions.  Components of CPU ALU – Arithmetic and Logical Unit Control Unit (CU) - Fetch and execute instructions by directing the coordinated operations of the ALU, registers and other components. Does same for all the instructions in the memory in sequential order. Registers - Supply operands to the ALU Save the results of ALU operations  Signal and Data Flow CPU architecture refers to the design structure of the central processing unit including the processor chipset.  Computer Instructions The elementary operations that a computer system can perform. Saved in memory locations and executed one after another at a time. Typically divided into three categories. Data movement Arithmetic and logic instructions Control instructions  Computer Instructions Data movement instructions used to move data between different parts of the computer system. load and store instructions - move data between memory CPU and input/output (I/O) instructions - move data between the CPU and external devices.  Computer Instructions Arithmetic and logic instructions used to perform mathematical operations and logical operations on data stored in the system. Add, subtract, multiply, and divide instructions. Logical instructions such as AND, OR, and NOT.  Computer instruction Control instructions used to control the flow of instructions within the computer system. branch instructions - transfer control to different parts of the program based on specified conditions. jump instructions - transfer control to a specified memory location.  CPU Architecture Primary components of a CPU architecture are ISA (Instruction Set Architecture) microarchitecture, which is the implementation of the ISA.  Instruction Set Architecture (ISA) One of the most critical part of the CPU design. An abstract layer which bridges communication of computer hardware with software. Defines the operations that can be done by the hardware. Describes the registers, memory model, behavior of machine code and data types. Examples – ARM, MIPS, x86 A compiler uses the ISA to generate program written in high level language into a machine code that CPU can process. The instructions in the ISA is implementation independent.  Micro Architecture The implementation of the Instruction Set Architecture. ISA acts as the design specification in micro architecture. There are four stages. Fetch – Retrieve instruction from memory. Decode – Decode the instruction into native code Execute - Execute the operations. Write Back – Store the result locally on registers or memory. Instruction Cycle Fetch Write Decode back Execute Questions 1. Processor frequency is one of the parameter that affects the system performance. It also called clock rate or clock speed, cycles per second. The higher the frequency is for a given CPU architecture, the faster the processor is. Suppose the processor frequency of your smart phone is 2GHz. Calculate the time taken to execute 1 cycle. Memory Organization  Memory A memory unit is the collection of storage units or devices together. Stores the binary information in the form of bits. Data is encoded, stored and retrieved when needed. Classified into 2 categories: Volatile Memory - This loses its data, when power is switched off. Non-Volatile Memory - Permanent storage and does not lose any data when power is switched off.  Memory Hierarchy The total memory capacity of a computer can be visualized by hierarchy of components. The trade-off between performance and capacity. Consists of all storage devices contained in a computer system from the slow Auxiliary Memory to fast Main Memory and to smaller Cache memory. Memory Hierarchy  Memory Hierarchy Auxiliary memory Access time is generally 1000 times that of the main memory, hence it is at the bottom of the hierarchy. Main memory Occupies the central position because it is equipped to communicate directly with the CPU and with auxiliary memory devices through Input/output processor (I/O).  Registers A high-speed temporary memory storing unit present in CPU. Can carry any type of information including a bit sequence or single data. A register is a group of latches which holds a single number. The number of bits in a register is called its width. Early computers had 8- bit registers. Then 16 …32… Today many computers have 64 bits wide registers or even more. A register should be 32 bits in length for a 32-bit instruction computer.  Basic Registers in Memory Data register - holds the operand read from the memory. Accumulator - general-purpose register need for processing. Instruction register - holds the read memory. Temporary register - Store temporary data Address register - holds the address of the instruction that is to be implemented next from the memory. Program Counter (PC) - controls the sequence of instructions to be read. The input register (INPR) and output register (OUTPR) - used for I/O operations.  Cache Memory The data or contents of the main memory that are used again and again by CPU, are stored in the cache memory. Whenever the CPU needs to access memory, it first checks the cache memory. If the data is not found in cache memory, then the CPU moves onto the main memory. It also transfers block of recent data into the cache and keeps on deleting the old data in cache to accommodate the new one.  Cache Memory The performance of cache memory is measured in terms of a quantity called hit ratio. When the CPU refers to memory and finds the word in cache it is said to produce a hit. If the word is not found in cache, it is in main memory then it counts as a miss. The ratio of the number of hits to the total CPU references to memory is called hit ratio. Hit Ratio = Hit/(Hit + Miss)  Main Memory Communicates directly within the CPU, Auxiliary memory and Cache memory. The central storage unit of the computer system. It is a large and fast memory used to store data during computer operations. Main memory is made up of RAM and ROM, with RAM integrated circuit chips holing the major share.  Main Memory - RAM The working memory of a computer. The users can write information into RAM and read information from it. The user enters his program and data into RAM. It possesses random access property. Any memory location can be accessed in a random manner without going through any other memory location. The access time is same for each memory location  Main Memory - RAM RAM: Random Access Memory DRAM : Slower and cheaper than SRAM. SRAM : Retains data, until powered off. NVRAM : Retains its data, even when turned off.  Main Memory - RAM DRAM SRAM Dynamic Access Memory Random Access Memory Technology based on charging Dose not use capacitors capacitors Dose not need to refresh Requires refresh cycles A simple latch made of six Incredibly fast transistors. Requires a single transistor and More expensive per bit capacitor to store a bit Cheap to implement Allows for high density  Main Memory - ROM Read only memory Non-volatile and is more like a permanent storage for information. Also stores the bootstrap loader program, to load and start the operating system when computer is turned on. It is not accessible to users. Commonly used ROM PROM(Programmable ROM) EPROM(Erasable PROM) EEPROM(Electrically Erasable PROM)  Memory Address The memory is organized in the form of a single units(word/ Byte/cell). Each unit be able to identified with a unique number called address. CPU generate control signals when it wants to read/write on memory. To access main memory the CPU sends an address to it. In response, the main memory sends data contained at the specified memory address. Memory addresses are fixed-length sequences of digits Memory Address  Memory Address A write to a memory location is destructive to its previous contents A read from a memory location is non-destructive to its previous content  Limitations of Primary Memory Limited capacity because the cost per bit of storage is high. Data stored in it is lost when the electric power is turned off.  Auxiliary Memory/ Secondary Storage When the program not reside in main memory is needed by the CPU, they are brought in from auxiliary memory. Programs not currently needed in main memory are transferred into auxiliary memory to provide space in main memory for other programs that are currently in use.  Auxiliary Memory/Secondary Storage Slower than Primary memory Retains data permanently Bigger in size Cost effective  Hierarchical Memory Access Processor Registers Cache Main Secondary Memory Memory KB MB 10s GB 100sGB T1 T2 T3 T4  System Bus Memory and I/O devices are connected to the CPU through a group of lines called a bus. Meant to carry information. Three types of buses: address bus, data bus and control bus.  System BUS Address bus - carries the address of a memory location or an I/O device that the CPU wants to access. The address bus is unidirectional. The data and control buses are bidirectional because the data can flow in either direction; from CPU to memory, (or I/O device) or from memory (or I/O device) to the CPU. Examples of control signals are: RD, WR  Computational Abstraction Layer Application Layer Simplifies execution of complex Programming Language programs on large data set. Operating System Build complex layer in bottom-up Instruction Set Arch approach Micro Architecture Executional Units Functional Units Logic Gates I/O Techniques  I/O Interface I/O devices can not be interfaced to a microprocessor directly because they are not provided with necessary logic circuits needed for direct interfacing to the processor buses. Provides a standard way of communicating with external devices. Usually interfaced to the processor buses, through I/O ports. I/O ports are memory addresses used as an interface to communicate with external devices. I/O interface contains device selection logic, bus drivers, data buffers, status registers and control lines I/O Interface  I/O Interface The place for loading or unloading data. The input device unloads data into an input port. Then the microprocessor reads the data from the input port. Similarly, an output device is connected to the processor through an output port. The microprocessor unloads data into an output port. Then the output device receives data from the output port.  Mode of Transfer Data transfer to peripheral and data transfer from the peripherals can be done in three ways Programmed I/O Interrupt- initiated I/O Direct memory access( DMA)  Programmed I/O Mode Initiated by an I/O instruction in the program. I/O device does not have direct access to the memory unit. Requires execution of several instruction by the CPU Keeps CPU busy as needs to constantly monitor peripheral devices by the CPU.  Programmed I/O Mode Eg : Data transfer from I/O device to memory Input instruction to transfer the data from device to the CPU. Store instruction to transfer the data from CPU to memory.  Interrupt- initiated I/O Mode Solution for Programmed I/O mode. Special commands need to inform the interface to issue an interrupt request signal whenever data is available from any device. CPU can proceed for any other program execution meanwhile the interface keeps monitoring the device.  Interrupt- initiated I/O Mode When an I/O device is ready for data transfer it initiates an interrupt request signal to the computer. External interrupt signal momentarily stops the CPU performing the task that it was already performing. Branch to the service program to process the I/O transfer Then return to the task it was originally performing.  Direct Memory Address Data transfer between a fast storage media such as magnetic disk and memory unit is limited by the speed of the CPU. Allow the peripherals directly communicate with each other using the memory buses. Remove the intervention of the CPU. CPU is idle and it has no control over the memory buses. The DMA controller takes over the buses to manage the transfer directly between the I/O devices and the memory unit.