L7 - Input Output.pdf

TMF1214 Computer Architecture INPUT / OUTPUT Reference: Chapter 7 William Stallings Computer Organization and Architecture 11th Edition 1 The Big Picture: Where are We Now? 2 Learning Objectives: Categories of I/O I/O...

TMF1214 Computer Architecture INPUT / OUTPUT Reference: Chapter 7 William Stallings Computer Organization and Architecture 11th Edition 1 The Big Picture: Where are We Now? 2 Learning Objectives: Categories of I/O I/O Channels I/O I/O Problems I/O Module Function 2 main areas of I/O module strategy by which interface between I/O I/O modules modules and the communicate device(s) connected with the CPU to them 3 THE INPUT/OUTPUT SYSTEM The I/O system consists of: 1. I/O devices (also referred to as peripherals) 2. Device controllers (also called I/O modules) through which the I/O devices communicate with the CPU or main memory in a well- defined manner (protocol) 3. Software intended for I/O operations and servicing (e.g. device drivers and interrupt service routines) 4 The Input/Output System In dealing with the I/O system, it is important to realize three points: 1. The CPU and I/O devices cannot usually be synchronized. Therefore, I/O operations must be coordinated. 2. In general, I/O devices are orders of magnitude slower than the CPU. Therefore, I/O devices usually communicate asynchronously with the CPU. 3. The CPU handles machine language information while I/O devices usually carry information that is user (human)-oriented. Therefore, data must be encoded and decoded (i.e. formatted). 5 INTRODUCTION We have seen that a computer system comprises three main functional blocks. A central processing unit Main memory Input/output (I/O) The I/O section of the computer can be broken down into two parts. i. The I/O devices themselves (peripherals) ii. The I/O modules In this section we are not primarily concerned with the peripherals, but rather with the I/O modules which handle communication between them and the CPU. 6 I/O DEVICES I/O devices may be classified into two broad categories: (1) Storage devices: such as magnetic and optical disks which are used to store data for later retrieval. These devices provide secondary or auxiliary memory capacity. (2) Source/sink devices: which allow communication between the computer and its environment. Examples of these are keyboards, digitizers, a mouse; as well as printers, graphic displays and data communication lines. 7 LIST OF INPUT/OUTPUT DEVICES Input Output Storage Keyboard Monitor Floppy Disk Mouse Printers (all types) Diskette Trackballs Audio Card Hard Disk Touchpads Plotters Disk Cartridge Pointing Sticks LCD Projection Panels CD-ROM Computer Output Joysticks Optical Disk Microfilm (COM) Pen Input Facsimile (FAX) Magnetic Tape Touch Screen Speaker(s) Cartridge Tape Light Pen. Reel Tape Digitizer. PC Card Graphics Tablet. *RAID Scanner. *Memory Button Microphone. *Smart Card Electronic Whiteboard. *Optical Memory Card Video Cards.. Audio Cards.. 8 Computer system interrupts Processor Cache Bus disk video network controller card card Memory disk Disk disk Disk Display Network 9 OVERVIEW 10 INPUT/OUTPUT (I/O) MODULES A set of I/O modules is a key element of a computer system in addition to the processor. Interfaces to the system bus or central switch. Controls one or more peripheral devices. A set of mechanical connectors that wire a devices into the system bus. Contains logic for performing a communication function between peripheral and the bus. 11  I/O PROBLEMS It is not possible to simply connect I/O devices directly to the system bus for several reasons. 1. There are many different types of device, each with a different method of operation, e.g. monitors, disk drives, keyboards. It is impracticable for a CPU to be aware of the operation of every type of device, particularly as new devices may be designed after the CPU has been produced. 2. The data transfer rate of most peripherals is much slower than that of the CPU. The CPU cannot communicate directly with such devices without slowing the whole system down. 3. Peripherals will often use different data word sizes and formats than the CPU. 12 GENERIC MODEL OF I/O MODULE Interface to CPU and Memory Interface to one or more peripheral 13 PARTS OF I/O MODULE An I/O module consists of several parts. A connection to the system bus Some control logic A data buffer An interface to the peripheral(s) We shall consider two main areas. The strategy by which I/O modules communicate with the CPU. The interface between I/O modules and the device(s) connected to them. 14 EXTERNAL DEVICES Provide a means of exchanging data between the external environment and the computer. Three categories: i. Human readable – communicate with the computer user Screen, printer, keyboard ii. Machine readable – communicate with equipment Monitoring and control iii. Communication – communicate with remote devices Modem Network Interface Card (NIC) 15 EXTERNAL DEVICE BLOCK DIAGRAM 16 TYPICAL I/O DATA RATES 17 I/O MODULE FUNCTION 1. Control & Timing Coordinate the flow of traffic between internal resources and external devices 2. CPU Communication Command decoding, data, status reporting, address recognition 3. Device Communication Involves commands, exchanges status information and data 4. Data Buffering 5. Error Detection 18 I/O STEPS CPU checks I/O module device status I/O module returns status If ready, CPU requests data transfer I/O module gets data from device I/O module transfers data to CPU 19 I/O MODULE DIAGRAM 20 I/O MODULE DECISIONS Hide or reveal device properties to CPU Support multiple or single device Control device functions or leave for CPU Also O/S decisions e.g. Unix treats everything it can as a file 21 INPUT OUTPUT TECHNIQUES / STRATEGIES 1. Programmed 2. Interrupt driven 3. Direct Memory Access (DMA) 22  1. PROGRAMMED I/O The simplest strategy for handling communication between the CPU and an I/O module is programmed I/O. Using this strategy, the CPU is responsible for all communication with I/O modules, by executing instructions which control the attached devices, or transfer data. For example, if the CPU wanted to send data to a device using programmed I/O, it would first issue an instruction to the appropriate I/O module to tell it to expect data. The CPU must then wait until the module responds before sending the data. If the module is slower than the CPU, then the CPU may also have to wait until the transfer is complete. This can be very inefficient. 23 PROGRAMMED I/O Another problem exists if the CPU must read data from a device such as a keyboard. Every so often the CPU must issue an instruction to the appropriate I/O module to see if any keys have been pressed. This is also extremely inefficient. Consequently this strategy is only used in very small microprocessor controlled devices. 24 PROGRAMMED I/O - DETAIL CPU requests I/O operation I/O module performs operation I/O module sets status bits CPU checks status bits periodically I/O module does not inform CPU directly I/O module does not interrupt CPU CPU may wait or come back later 25 PROGRAMMED I/O (SUMMARY) CPU has direct control over I/O Sensing status Read/write commands Transferring data CPU waits for I/O module to complete operation Wastes CPU time 26 PROGRAMMED I/O I/O COMMANDS CPU issues address Identifies module (& device if >1 per module) CPU issues command Control - telling module what to do e.g. spin up disk Test - check status e.g. power? Error? Read/Write Module transfers data via buffer from/to device 27 PROGRAMMED I/O ADDRESSING I/O DEVICES Under programmed I/O data transfer is very like memory access (CPU viewpoint) Each device given unique identifier CPU commands contain identifier (address) 28  PROGRAMMED I/O I/O MAPPING Memory mapped I/O Devices and memory share an address space I/O looks just like memory read/write No special commands for I/O Large selection of memory access commands available Isolated I/O Separate address spaces Need I/O or memory select lines Special commands for I/O Limited set 29 2. INTERRUPT DRIVEN I/O The biggest problem of programmed I/O is CPU waste of time in waiting for data to be read/written or checking status of I/O module Solution: CPU issues commands to device and continues with other activities No waiting time for CPU No repeated CPU checking of device I/O module interrupts when ready 30 INTERRUPT DRIVEN I/O A more common strategy is to use interrupt driven I/O. This strategy allows the CPU to carry on with its other operations until the module is ready to transfer data. When the CPU wants to communicate with a device, it issues an instruction to the appropriate I/O module, and then continues with other operations. When the device is ready, it will interrupt the CPU. The CPU can then carry out the data transfer as before. This also removes the need for the CPU to continually poll input devices to see if it must read any data. When an input device has data, then the appropriate I/O module can interrupt the CPU to request a data transfer. 31 INTERRUPT DRIVEN I/O BASIC OPERATION An I/O module interrupts the CPU simply by activating a control line in the control bus. The sequence of events is as follows. The I/O module interrupts the CPU. The CPU finishes executing the current instruction. The CPU acknowledges the interrupt. The CPU saves its current state. The CPU jumps to a sequence of instructions which will handle the interrupt. 32 INTERRUPT DRIVEN I/O CPU VIEWPOINT Issue read command Do other work Check for interrupt at end of each instruction cycle If interrupted:- Save context (registers) Process interrupt Fetch data & store 33 INTERRUPT DRIVEN I/O DESIGN ISSUES How do you identify the module issuing the interrupt? How do you deal with multiple interrupts? i.e. an interrupt handler being interrupted 34 INTERRUPT DRIVEN I/O IDENTIFYING INTERRUPTING MODULE (1) Different line for each module Limits number of devices Software poll CPU asks each module in turn Slow 35 INTERRUPT DRIVEN I/O IDENTIFYING INTERRUPTING MODULE (2) Daisy Chain or Hardware poll Interrupt Acknowledge sent down a chain Module responsible places vector on bus CPU uses vector to identify handler routine Bus Master Module must claim the bus before it can raise interrupt e.g. PCI & SCSI 36 INTERRUPT DRIVEN I/O MULTIPLE INTERRUPTS Each interrupt line has a priority Higher priority lines can interrupt lower priority lines If bus mastering only current master can interrupt 37 3. DIRECT MEMORY ACCESS Although interrupt driven I/O is much more efficient than program controlled I/O, all data is still transferred through the CPU. This will be inefficient if large quantities of data are being transferred between the peripheral and memory. The transfer will be slower than necessary, and the CPU will be unable to perform any other actions while it is taking place. Many systems therefore use an additional strategy, known as direct memory access (DMA). 38 DIRECT MEMORY ACCESS DMA uses an additional piece of hardware - a DMA controller. The DMA controller can take over the system bus and transfer data between an I/O module and main memory without the intervention of the CPU. Whenever the CPU wants to transfer data, it tells the DMA controller the direction of the transfer, the I/O module involved, the location of the data in memory, and the size of the block of data to be transferred. It can then continue with other instructions and the DMA controller will interrupt it when the transfer is complete. 39 DIRECT MEMORY ACCESS DMA FUNCTION Additional Module (hardware) on bus DMA controller takes over from CPU for I/O 40 DIRECT MEMORY ACCESS DMA MODULE DIAGRAM 41 DIRECT MEMORY ACCESS DMA OPERATION CPU tells DMA controller:- Read/Write Device address Starting address of memory block for data Amount of data to be transferred CPU carries on with other work DMA controller deals with transfer DMA controller sends interrupt when finished 42  DIRECT MEMORY ACCESS DMA TRANSFER The CPU and the DMA controller cannot use the system bus at the same time, so some way must be found to share the bus between them. One of two methods is normally used. 1. Cycle stealing 2. Burst mode 43 DIRECT MEMORY ACCESS DMA TRANSFER: CYCLE STEALING DMA controller takes over bus for a cycle Transfer of one word of data Not an interrupt CPU does not switch context CPU suspended just before it accesses bus i.e. before an operand or data fetch or a data write Slows down CPU but not as much as CPU doing transfer 44 DIRECT MEMORY ACCESS DMA TRANSFER: BURST MODE The DMA controller transfers blocks of data by halting the CPU and controlling the system bus for the duration of the transfer. The transfer will be as quick as the weakest link in the I/O module/bus/memory chain, as data does not pass through the CPU, but the CPU must still be halted while the transfer takes place. 45 DIRECT MEMORY ACCESS DMA CONFIGURATIONS (1) Single Bus, Detached DMA controller Each transfer uses bus twice I/O to DMA then DMA to memory CPU is suspended twice 46 DIRECT MEMORY ACCESS DMA CONFIGURATIONS (2) Single Bus, Integrated DMA controller Controller may support >1 device Each transfer uses bus once DMA to memory CPU is suspended once 47 DIRECT MEMORY ACCESS DMA CONFIGURATIONS (3) Separate I/O Bus Bus supports all DMA enabled devices Each transfer uses bus once DMA to memory CPU is suspended once 48 I/O CHANNELS I/O module that takes on most of the detailed processing burden, presenting a high-level interface the processor. I/O devices getting more sophisticated e.g. 3D graphics cards CPU instructs I/O controller to do transfer I/O controller does entire transfer Improves speed Takes load off CPU Dedicated processor is faster 49 I/O INTERFACES The interface of an I/O module is the connection to the peripheral(s) attached to it. The interface handles synchronization and control of the peripheral, and the actual transfer of data. 50 I/O INTERFACES For example, to send data to a peripheral, the sequence of events would be as follows. 1. The I/O module sends a control signal to the peripheral requesting permission to send data. 2. The peripheral acknowledges the request. 3. The I/O module sends the data (this may be either a word at a time or a block at a time depending on the peripheral). 4. The peripheral acknowledges receipt of the data. This process of synchronization is known as handshaking. The internal buffer allows the I/O module to compensate for some of the difference in the speed at which the interface can communicate with the peripheral, and the speed of the system bus. 51 I/O INTERFACES I/O interfaces can be divided into two main types. Parallel interfaces There are multiple wires connecting the I/O module to the peripheral, and bits of data are transferred simultaneously, as they are over the data bus. This type of interface is used for high speed peripherals such as disk drives. Serial interfaces Only a single wire connects the I/O module to the peripheral, and data must be transferred one bit at a time. This is used for slower peripherals such as printers and keyboards. 52  TMF1214 Computer Architecture 53