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Mahatma Gandhi University

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computer organization computer architecture operational concepts computer science

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This document provides full notes for a Bachelor of Computer Applications (BCA) course on Computer Organization and Architecture (COA). It covers operational concepts like Input Unit, Memory Unit, Arithmetic & Logic Unit, and Output Unit. It also explains the functions of registers and how processors and memory work together.

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lOMoARcPSD|26759719 COA full notes-1 - Hello Bachelor of Computer Applications (Mahatma Gandhi University) Studocu is not sponsored or endorsed by any college or university Downloaded by Dinkan Du (dinkandu22333@...

lOMoARcPSD|26759719 COA full notes-1 - Hello Bachelor of Computer Applications (Mahatma Gandhi University) Studocu is not sponsored or endorsed by any college or university Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Module 1 Syllabus Basic Computer Organization and Design Operational concepts, Instruction codes, Computer Registers, Computer Instructions, Memory locations and addresses, Instruction cycle, Timing and control, Bus organization. Operational concepts A Computer has five functional independent units like Input Unit, Memory Unit, Arithmetic & Logic Unit, Output Unit, Control Unit. Input Unit :- Computers take coded information via input unit. The most famous input device is the keyboard. Whenever we press any key it is automatically being translated to corresponding binary code & transmitted over a cable to memory or processor. Memory Unit :- It stores programs as well as data and there are two types- Primary and Secondary Memory Primary Memory is quite fast which works at electronic speed. Programs should be stored in memory before getting executed. Random Access Memory are those memory in which location can be accessed in a shorter period of time after specifying the address. Primary memory is essential but expensive so we went for secondary memory which is quite cheaper. It is used when large amount of data & programs are needed to store, particularly the information that we dont access very frequently. Ex- Magnetic Disks, Tapes Arithmetic & Logic Unit :- All the arithmetic & Logical operations are performed by ALU and this operation are initiated once the operands are brought into the processor. Output Unit :– It displays the processed result to outside world. Basic Operational Concepts Instructions take a vital role for the proper working of the computer. An appropriate program consisting of a list of instructions is stored in the memory so that the tasks can be started. The memory brings the Individual instructions into the processor, which executes the specified operations. Data which is to be used as operands are moreover also stored in the memory. Example: Add LOCA, R0 Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 This instruction adds the operand at memory location LOCA to the operand which will be present in the Register R0. The above mentioned example can be written as follows: Load LOCA, R1 Add R1, R0 First instruction sends the contents of the memory location LOCA into processor Register R0, and meanwhile the second instruction adds the contents of Register R1 and R0 and places the output in the Register R1. The memory and the processor are swapped and are started by sending the address of the memory location to be accessed to the memory unit and issuing the appropriate control signals. The data is then transferred to or from the memory. Analysing how processor and memory are connected :– Processors have various registers to perform various functions :- Program Counter :- It contains the memory address of next instruction to be fetched. Instruction Register:- It holds the instruction which is currently being executed. MDR :- It facilities communication with memory. It contains the data to be written into or read out of the addressed location. MAR :- It holds the address of the location that is to be accessed There are n general purpose registers that is R0 to Rn-1 Performance :- Performance means how quickly a program can be executed. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 In order to get the best performance it is required to design the compiler, machine instruction set & hardware in a coordinated manner. Connection B / W Processor & Memory Connection B/W Processor & Memory The above mentioned block diagram consists of the following components 1) Memory 2) MAR 3) MDR 4) PC 5) IR 6) General Purpose Registers 7) Control Unit 8) ALU The instruction that is currently being executed is held by the Instruction Register. IR output is available to the control circuits, which generates the timing signal that control the various processing elements involved in executing the instruction. The Memory address of the next instruction to be fetched and executed is contained by the Program Counter. It is a specialized register. It keeps the record of the programs that are executed. Role of these registers is to handle the data available in the instructions. They store the data temporarily. Two registers facilitate the communication with memory. These registers are: 1) MAR (Memory Address Register) 2) MDR (Memory Data Register) Memory Address Register: The address of the location to be accessed is held by MAR. Memory Data Register: It contains the data to be written into or to be read out of the addressed location. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Working Explanation A PC is set to point to the first instruction of the program. The contents of the PC are transferred to the MAR and a Read control signal is sent to the memory. The addressed word is fetched from the location which is mentioned in the MAR and loaded into MDR. Instruction codes While a ​Program​, as we all know, is, A set of instructions that specify the operations, operands, and the sequence by which processing has to occur. An ​instruction code is a group of bits that tells the computer to perform a specific operation part. Operation Code The operation code of an instruction is a group of bits that define operations such as add, subtract, multiply, shift and compliment. The number of bits required for the operation code depends upon the total number of operations available on the computer. The operation code must consist of at least ​n bits for a given ​2^n operations. The operation part of an instruction code specifies the operation to be performed. Register Part The operation must be performed on the data stored in registers. An instruction code therefore specifies not only operations to be performed but also the registers where the operands(data) will be found as well as the registers where the result has to be stored. Stored Program Organisation The simplest way to organize a computer is to have a Processor Register and instruction code with two parts. The first part specifies the operation to be performed and second specifies an address. The memory address tells where the operand in memory will be found. Instructions are stored in one section of memory and data in another. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Some computers are with a single processor register, known as ​Accumulator (AC)​. The operation is performed with the memory operand and the content of AC. Common Bus System The basic computer has 8 registers, a memory unit and a control unit. Paths must be provided to transfer data from one register to another. An efficient method for transferring data in a system is to use a ​Common Bus System​. The output of registers and memory are connected to the common bus. Load(LD) The lines from the common bus are connected to the inputs of each register and data inputs of memory. The particular register whose ​LD input is enabled receives the data from the bus during the next ​clock pulse transition​. Before studying about instruction formats lets first study about the operand address parts. When the 2nd part of an instruction code specifies the operand, the instruction is said to have ​immediate operand​. And when the 2nd part of the instruction code specifies the address of an operand, the instruction is said to have a ​direct address​. And in ​indirect address​, the 2nd part of instruction code, specifies the address of a memory word in which the address of the operand is found. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Computer Instructions The basic computer has three instruction code formats. The ​Operation code (opcode) part of the instruction contains 3 bits and remaining 13 bits depends upon the operation code encountered. There are three types of formats: 1. Memory Reference Instruction It uses ​12 bits to specify the address and ​1 bit to specify the addressing mode (​I​). ​I is equal to 0​ ​for ​direct address​ and ​1​for ​indirect address​. 2. Register Reference Instruction These instructions are recognized by the opcode ​111 with a ​0 in the left most bit of instruction. The other 12 bits specify the operation to be executed. 3. Input-Output Instruction These instructions are recognized by the operation code ​111 with a ​1 in the leftmost bit of instruction. The remaining 12 bits are used to specify the input-output operation. Format of Instruction The format of an instruction is depicted in a rectangular box symbolizing the bits of an instruction. Basic fields of an instruction format are given below: 1. An operation code field that specifies the operation to be performed. 2. An address field that designates the memory address or register. 3. A mode field that specifies the way the operand of effective address is determined. Computers may have instructions of different lengths containing varying numbers of addresses. The number of address fields in the instruction format depends upon the internal organization of its registers. Computer Registers Registers are a type of computer memory used to quickly accept, store, and transfer data and instructions that are being used immediately by the CPU. The registers used by the CPU are often termed as Processor registers. A processor register may hold an instruction, a storage address, or any data (such as bit sequence or individual characters). Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The computer needs processor registers for manipulating data and a register for holding a memory address. The register holding the memory location is used to calculate the address of the next instruction after the execution of the current instruction is completed. Following is the list of some of the most common registers used in a basic computer: Register Symbol Number of bits Function Data register DR 16 Holds memory operand Address register AR 12 Holds address for the memory Accumulator AC 16 Processor register Instruction register IR 16 Holds instruction code Program counter PC 12 Holds address of the instruction Temporary register TR 16 Holds temporary data Input register INPR 8 Carries input character Output register OUTR 8 Carries output character The following image shows the register and memory configuration for a basic computer. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The Memory unit has a capacity of 4096 words, and each word contains 16 bits. The Data Register (DR) contains 16 bits which hold the operand read from the memory location. The Memory Address Register (MAR) contains 12 bits which hold the address for the memory location. The Program Counter (PC) also contains 12 bits which hold the address of the next instruction to be read from memory after the current instruction is executed. The Accumulator (AC) register is a general purpose processing register. The instruction read from memory is placed in the Instruction register (IR). The Temporary Register (TR) is used for holding the temporary data during the processing. The Input Registers (IR) holds the input characters given by the user. The Output Registers (OR) holds the output after processing the input data. Computer Instructions Computer instructions are a set of machine language instructions that a particular processor understands and executes. A computer performs tasks on the basis of the instruction provided. An instruction comprises groups called fields. These fields include: Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The Operation code (Opcode) field which specifies the operation to be performed. The Address field which contains the location of the operand, i.e., register or memory location. The Mode field which specifies how the operand will be located. A basic computer has three instruction code formats which are: 1. Memory - reference instruction 2. Register - reference instruction 3. Input-Output instruction Memory - reference instruction In Memory-reference instruction, 12 bits of memory is used to specify an address and one bit to specify the addressing mode 'I'. Register - reference instruction The Register-reference instructions are represented by the Opcode 111 with a 0 in the leftmost bit (bit 15) of the instruction. Note: The Operation code (Opcode) of an instruction refers to a group of bits that define arithmetic and logic operations such as add, subtract, multiply, shift, and compliment. A Register-reference instruction specifies an operation on or a test of the AC (Accumulator) register. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Input-Output instruction Just like the Register-reference instruction, an Input-Output instruction does not need a reference to memory and is recognized by the operation code 111 with a 1 in the leftmost bit of the instruction. The remaining 12 bits are used to specify the type of the input-output operation or test performed. Note The three operation code bits in positions 12 through 14 should be equal to 111. Otherwise, the instruction is a memory-reference type, and the bit in position 15 is taken as the addressing mode I. When the three operation code bits are equal to 111, control unit inspects the bit in position 15. If the bit is 0, the instruction is a register-reference type. Otherwise, the instruction is an input-output type having bit 1 at position 15. Instruction Set Completeness A set of instructions is said to be complete if the computer includes a sufficient number of instructions in each of the following categories: Arithmetic, logical and shift instructions A set of instructions for moving information to and from memory and processor registers. Instructions which controls the program together with instructions that check status conditions. Input and Output instructions Arithmetic, logic and shift instructions provide computational capabilities for processing the type of data the user may wish to employ. A huge amount of binary information is stored in the memory unit, but all computations are done in processor registers. Therefore, one must possess the capability of moving information between these two units. Program control instructions such as branch instructions are used change the sequence in which the program is executed. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Input and Output instructions act as an interface between the computer and the user. Programs and data must be transferred into memory, and the results of computations must be transferred back to the user. Memory locations and addresses MEMORY-LOCATIONS & ADDRESSES Memory consists of many millions of storage cells (flip-flops). Each cell can store a bit of information i.e. 0 or 1 (Figure). Each group of n bits is referred to as a word of information, and n is called the word length. The word length can vary from 8 to 64 bits. A unit of 8 bits is called a byte. Accessing the memory to store or retrieve a single item of information (word/byte) requires distinct addresses for each item location. (It is customary to use numbers from 0 through 2ˆk-1 as the addresses of successive-locations in the memory). If 2ˆk = no. of addressable locations; then 2ˆk addresses constitute the address-space of the computer. For example, a 24-bit address generates an address-space of 2ˆ24 locations (16 MB). Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 BYTE-ADDRESSABILITY A byte is always 8 bits, but the word length typically ranges from 16 to 64 bits. In byte-addressable memory, successive addresses refer to successive byte locations in the memory. Byte locations have addresses 0, 1, 2..... If the word-length is 32 bits, successive words are located at addresses 0, 4, 8.. with each word having 4 bytes. Instruction cycle A program residing in the memory unit of a computer consists of a sequence of instructions. These instructions are executed by the processor by going through a cycle for each instruction. In a basic computer, each instruction cycle consists of the following phases: 1. Fetch instruction from memory. 2. Decode the instruction. 3. Read the effective address from memory. 4. Execute the instruction. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Input-Output Configuration In computer architecture, input-output devices act as an interface between the machine and the user. Instructions and data stored in the memory must come from some input device. The results are displayed to the user through some output device. The following block diagram shows the input-output configuration for a basic computer. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The input-output terminals send and receive information. The amount of information transferred will always have eight bits of an alphanumeric code. The information generated through the keyboard is shifted into an input register 'INPR'. The information for the printer is stored in the output register 'OUTR'. Registers INPR and OUTR communicate with a communication interface serially and with the AC in parallel. The transmitter interface receives information from the keyboard and transmits it to INPR. The receiver interface receives information from OUTR and sends it to the printer serially. Design of a Basic Computer A basic computer consists of the following hardware components. 1. A memory unit with 4096 words of 16 bits each 2. Registers: AC (Accumulator), DR (Data register), AR (Address register), IR (Instruction register), PC (Program counter), TR (Temporary register), SC (Sequence Counter), INPR (Input register), and OUTR (Output register). 3. Flip-Flops: I, S, E, R, IEN, FGI and FGO Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Note: FGI and FGO are corresponding input and output flags which are considered as control flip-flops. 1. Two decoders: a 3 x 8 operation decoder and 4 x 16 timing decoder 2. A 16-bit common bus 3. Control Logic Gates 4. The Logic and Adder circuits connected to the input of AC. Timing and control The timing for all registers in the basic computer is controlled by a master clock generator. The clock pulses are applied to all flip-flops and registers in the system, including the flip-flops and registers in the control unit. The clock pulses do not change the state of a register unless the register is enabled by a control signal. The control signals are generated in the control unit and provide control inputs for the multiplexers in the common bus, control inputs in processor registers, and microoperations for the accumulator. There are two major types of control organization: 1. hardwired control and 2. microprogrammed control. In the hardwired organization​, the control logic is implemented with gates, flip-flops, decoders, and other digital circuits. It has the advantage that it can be optimized to produce a fast mode of operation. In the microprogrammed organization, the control information is stored in a control memory. The control memory is programmed to initiate the required sequence of microoperations. A hardwired control, as the name implies, requires changes in the wiring among the various components if the design has to be modified or changed. In the microprogrammed control​, any required changes or modifications can be done by updating the microprogram in control memory. The block diagram of the control unit is shown in Fig. 5.6. It consists of two decoders, 1. a sequence counter, and 2. a number of control logic gates. An instruction read from memory is placed in the instruction register (IR).position of this register in the common bus system is indicated in Fig 5.4. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The instruction register is shown again in Fig. 5.6, where it is divided into three parts: 1. the 1 bit, 2. the operation code, and 3. bits 0 through 11. The operation code in bits 12 through 14 are decoded with a 3 x 8 decoder. The eight outputs of the decoder are designated by the symbols D​0 through D​7​. The subscripted decimal number is equivalent to the binary value of the corresponding operation code. Bit 15 of the instruction is transferred to a flip-flop designated by the symbol I. Bits 0 through 11 are applied to the control logic gates. The 4-bit sequence counter can count in binary from 0 through 15. The outputs of the counter are decoded into 16 timing signals T​0​ through T​15​. Downloaded by Dinkan Du ([email protected]) lOMoARcPSD|26759719 The sequence counter SC can be incremented or cleared synchronously. Most of the time, the counter is incremented to provide the sequence of timing signals out of the 4 x 16 decoder. Once in a while, the counter is cleared to 0, causing the next active timing signal to be T​0​. As an example, consider the case where SC is incremented to provide timing signals T​0​, T​1​, T​2​, T​3​, and T​4 in sequence. At time T​4​, SC is cleared to 0 if decoder output D​3 is active. This is expressed symbolically by the statement D​3​T​4​: SC

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