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PARUL INSTITUTE OF ENGINEERING AND TECHNOLOGY - (DIPLOMA STUDIES) COMPUTER ENGINEERING DEPARTMENT COMPUTER ARCHITECTURE AND ORGANIZATION (03606215) QUESTION BANK  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) UNIT-1 (STRUCTUR OF COMPUTER)...

PARUL INSTITUTE OF ENGINEERING AND TECHNOLOGY - (DIPLOMA STUDIES) COMPUTER ENGINEERING DEPARTMENT COMPUTER ARCHITECTURE AND ORGANIZATION (03606215) QUESTION BANK  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) UNIT-1 (STRUCTUR OF COMPUTER) 1. Basic functional units of computer system. [4 MARKS] 2. What is bus structure? Explain with neat diagram. [4 MARKS] 3. Explain Von-Neumann architecture with neat diagram. [3 MARKS] 4. What is bus structure? Explain with diagram. [3 MARKS] 5. What are error detecting codes? Explain VRC, LRC and CHECKSUM. [4 MARKS] 6. Explain data representation fixed- and floating-point representation with example. [4 MARKS] UNIT 2 (REGISTER TRANSFER AND MICRO-OPERATION) 1. What is register? [ 2 MARKS] 2. What is register transfer and what is micro-operation? [2 MARKS] 3. Give the list of micro-operation. [2 MARKS] 4. What is logic micro-operation? [3 MARKS] 5. Explain Arithmetic micro-operation. [3 MARKS] 6. What is bus transfer and memory transfer? [ 3 MARKS] 7. What is RTL? Explain in detail. [2 MARKS] 8. Explain Shift micro-operation and explain arithmetic logic shift unit. [3 MARKS] UNIT-3 (Programming the Basic Computer) 1. What is machine language? [ 2 MARKS] 2. Explain machine language format. [ 2 MARKS] 3. Briefly explain Single-byte, Two-byte and Three-byte instruction [ 3 MARKS] 4. What do you mean by opcode and operand. [ 2 MARKS] 5. List Addressing modes and explain it with example. [2 MARKS] 6. What is data transfer operation? Explain its instruction. [3 MARKS] 7. Briefly explain logical operation and its instruction. [ 3 MARKS] 8. Explain branch and stack operation with diagram. [ 4 MARKS] 9. I/O operation. [ 3 MARKS] COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) 10.What is ALP? Usage of it. [ 2 MARKS] UNIT 4 (Memory Organization) 1. What is cache memory? [ 2 MARKS] 2. Gives the difference between memory and register. [ 4 MARKS] 3. Make hierarchy of memory. [ 3 MARKS] 4. Differentiate RAM, ROM, PROM and EPROM [ 3 MARKS] 5. What is virtual memory? [ 2 MARKS] 6. What is associative memory? [ 2 MARKS] UNIT-5 (Pipeline and Vector Processing) 1. What is parallel processing in pipelining? [ 4 MARKS] 2. Explain Arithmetic pipeline? [ 4 MARKS] 3. Explain Instruction pipeline. [ 4 MARKS] 4. Give the difference between RISC and CISC. [3 MARKS] 5. RISC pipeline vector processing. [ 4 MARKS] 6. Array processors with example. [3 MARKS] COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) UNIT-1 (Structure of computers) 1. What is computer functional units? A computer in its simplest form comprises of five units namely input unit, output unit, memory unit, arithmetic and logical unit and control unit. INPUT UNIT Input units are used by the computer to read the data. The most commonly used input devices are keyboards, mouse, joysticks, trackballs, microphones, etc. CENTRAL PROCESSING UNIT Central processing unit commonly known as CPU can be referred to as an electronic circuitry within a computer that carries out the instructions given by a computer program by performing the basic arithmetic, logical, control and input/output (I/O) operations specified by the instructions. MEMORY UNIT The Memory unit can be referred to as the storage area in which programs are kept which are running, and that contains data needed by the running programs. The Memory unit can be categorized in two ways namely, primary memory and secondary memory. COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) It enables a processor to access running execution applications and services that are temporarily stored in a specific memory location. Primary storage is the fastest memory that operates at electronic speeds. Primary memory contains a large number of semiconductor storage cells, capable of storing a bit of information. The word length of a computer is between 16-64 bits. Cache memory is also a kind of memory which is used to fetch the data very soon. They are highly coupled with the processor. The most common examples of primary memory are RAM and ROM. Secondary memory is used when a large amount of data and programs have to be stored for a long-term basis. The most common examples of secondary memory are magnetic disks, magnetic tapes, and optical disks Examples of input devices: Joysticks Trackballs Mouse scanner ARITHMETIC AND LOGICAL UNIT Most of the computer operators are executed in ALU of the processor like addition, subtraction, division, multiplication, etc. the operands are brought into the ALU from memory and stored in high-speed storage elements called register. Then according to the instructions, the operation is performed in the required sequence. The control and the ALU are many times faster than other devices connected to a computer system. This enables a single processor to control a number of external devices such as keyboards, displays, magnetic and optical disks, sensors and other mechanical controllers. CONTROL UNIT It effectively is the nerve centre that sends signals to other units and senses their states. The actual timing signals that govern the transfer of data between input unit,processors. OUTPUT UNIT COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) These actually are the counterparts of the input unit. Its basic function is to send the processed results to the outside world. Examples shown below: Printers Speakers and Monitors 2. What is bus structure? Explain with neat diagram. The simplest and most common way of interconnecting various parts of the computer. To achieve a reasonable speed of operation, a computer must be organized so that all its units can handle one full word of data at a given time. A group of lines that serve as a connecting port for several devices is called a bus. Since the bus can be used for only one transfer at a time, only two units can actively use the bus at any given time. Bus control lines are used to arbitrate multiple requests for use of one bus. Single bus structure is, Low cost Very flexible for attaching peripheral devices. Performance: Let us examine the flow of program instructions and data between the memory and the processor. At the start of execution, all program instructions and the required data are stored in the main memory. As the execution proceeds, instructions are fetched one by one over the bus into the processor, and a copy is COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) placed in the cache later if the same instruction or data item is needed a second time, it is read directly from the cache. Example: Suppose a few instructions are executed repeatedly over a short period of time as happens in a program loop. If these instructions are available in the cache, they can be fetched quickly during the period of repeated use. The same applies to the data that are used repeatedly. 3. What is bus structure? Explain with neat diagram. Von-Neumann proposed his computer architecture design in 1945 which was later known as Von-Neumann Architecture. It consisted of a Control Unit, Arithmetic, and Logical Memory Unit (ALU), Registers and Inputs/Outputs. Von Neumann architecture is based on the stored-program computer concept, where instruction data and program data are stored in the same memory. This design is still used in most computers produced today. A Von Neumann-based computer: Uses a single processor. Uses one memory for instructions and data. Executes programs following fetch-decode-execute-cycle. COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) Components of Von-Neumann model: 1. Central processing unit 2. ALU and buses 3. Memory unit Processing unit The part of the computer that performs bulk operations in a single unit is known as CPU (Central processing unit). The Central Processing Unit can also be defined as an electric circuit responsible for executing the instructions of a computer program. The major components of CPU are Arithmetic and Logic Unit (ALU), Control Unit (CU) and a variety of registers. ALU (Arithmetic logical unit) The Arithmetic and Logic Unit (ALU) performs the required micro-operations for executing the instructions. In simple words, ALU allows arithmetic (add, subtract, etc.) and logic (AND, OR, NOT, etc.) operations to be carried out. CU (Control Unit) COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) The Control Unit of a computer system controls the operations of components like ALU, memory and input/output devices. Registers Registers refer to high-speed storage areas in the CPU. The data processed by the CPU are fetched from the registers. Following is the list of registers that plays a crucial role in data processing. Buses Buses are how information is shared between the registers in a multiple-register configuration system. A bus structure consists of a set of common lines, one for each bit of a register, through which binary information is transferred one at a time. Control signals determine which register is selected by the bus during each particular register transfer. Von-Neumann Architecture comprised three major bus systems for data transfer. Memory unit A memory unit is a collection of storage cells together with associated circuits needed to transfer information in and out of the storage. The memory stores binary information in groups of bits called words. The internal structure of a memory unit is specified by the number of words it contains and the number of bits in each word. Two major types of memories are used in computer systems: 1. RAM (Random Access Memory) 2. ROM (Read Only Memory) COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) 3.What bus and memory transfer? Explain common bus system with neat diagram. Bus and memory transfers: A more efficient scheme for transferring information between registers in a multiple-register configuration is a Common Bus System. A common bus consists of a set of common lines, one for each bit of a register. Control signals determine which register is selected by the bus during each register transfer. Different ways of constructing a Common Bus System. 1. Using Multiplexers 2. Using Tri-state Buffers 1. Common bus system is with multiplexers: The multiplexers select the source register whose binary information is then placed on the bus. COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) The construction of a bus system for four registers is shown in the Figure. The bus consists of four 4 x 1 multiplexers each having four data inputs, 0 through 3, and two selection inputs, S1 and S0. For example, output 1 of register A is connected to input 0 of MUX 1 because this input is labelled A1. The diagram shows that the bits in the same significant position in each register are connected to the data inputs of one multiplexer to form one line of the bus. Thus MUX 0 multiplexes the four 0 bits of the registers, MUX 1 multiplexes the four 1 bits of the registers, and similarly for the other two bits. The two selection lines Si and So are connected to the selection inputs of all four multiplexers. The selection lines choose the four bits of one register and transfer them into the four-line common bus. When S1S0 = 00, the 0 data inputs of all four multiplexers are selected and applied to the outputs that form the bus. This causes the bus lines to receive the content of register A since the outputs of this register are connected to the 0 data inputs of the multiplexers. Similarly, register B is selected if S1S0 = 01, and so on. Table 4-2 shows the register that is selected by the bus for each of the four possible binary value of the selection line as shown in example In general bus system has: COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) Multiplex “k” Registers. Each register of “n” bits To produce “n-line bus” No. of multiplexers required = n Size of each multiplexer = k x 1 When the bus is includes in the statement, the register transfer is symbolized as follows: BUS← C, R1← BUS The content of register C is placed on the bus, and the content of the bus is loaded into register R1 by activating its load control input. If the bus is known to exist in the system, it may be convenient just to show the direct transfer. R1← C Common bus system is with Tri-State Buffer: COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) 4. What is error detecting codes? Explain error detecting techniques (LRC, VRC and checksum). Error-detecting codes are a sequence of numbers generated by specific procedures for detecting errors in data that has been transmitted over computer networks. When bits are transmitted over the computer network, they are subject to get corrupted due to interference and network problems. The corrupted bits lead to spurious data being received by the receiver and are called errors. Error – detecting codes ensures messages to be encoded before they are sent over noisy channels. The encoding is done in a manner so that the decoder at the receiving end can detect whether there are errors in the incoming signal with high probability of success. Features of error detecting codes: Error detecting codes are adopted when backward error correction techniques are used for reliable data transmission. In this method, the receiver sends a feedback message to the sender to inform whether an error-free message has been received or not. If there are errors, then the sender retransmits the message. Error-detecting codes are usually block codes, where the message is divided into fixed-sized blocks of bits, to which redundant bits are added for error detection. Error detection involves checking whether any error has occurred or not. The number of error bits and the type of error does not matter. Error detecting techniques: VRC(vertical Redundancy Check) LRC(Longitudinal Redundancy Check) Checksum CRC(Cyclic Redundacny Check) COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) VRC/Parity Bit Check: Parity check is done by adding an extra bit, called parity bit to the data to make number of 1s either even in case of even parity, or odd in case of odd parity. While creating a frame, the sender counts the number of 1s in it and adds the parity bit in following way In case of even parity: If number of 1s is even then parity bit value is 0. If number of 1s is odd then parity bit value is 1. In case of odd parity: If number of 1s is odd then parity bit value is 0. If number of 1s is even then parity bit value is 1. On receiving a frame, the receiver counts the number of 1s in it. In case of even parity check, if the count of 1s is even, the frame is accepted, otherwise it is rejected. Similar rule is adopted for odd parity check. COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) LRC (Longitudinal Redundancy Check) LRC generally applies to a single parity bit per bit stream. Although simple longitudinal parities only detect errors, a combination with additional error control coding, such as a transverse redundancy check, are capable of correcting errors. Blue one’s are the result of Longitudinal Redundancy Check 1 1 1 1 0 0 0 1 1 COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) Checksum (Most reliable method) This is a block code method where a checksum is created based on the data values in the data blocks to be transmitted using some algorithm and appended to the data. When the receiver gets this data, a new checksum is calculated and compared with the existing checksum. A non-match indicates an error. Error Detection by Checksums For error detection by checksums, data is divided into fixed sized frames or segments. Sender’s End − The sender adds the segments using 1’s complement arithmetic to get the sum. It then complements the sum to get the checksum and sends it along with the data frames. Receiver’s End − The receiver adds the incoming segments along with the checksum using 1’s complement arithmetic to get the sum and then complements it. Suppose that the sender wants to send 4 frames each of 8 bits, where the frames are 11001100, 10101010, 11110000 and 11000011. COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) The sender adds the bits using 1s complement arithmetic. While adding two numbers using 1s complement arithmetic, if there is a carry over, it is added to the sum. After adding all the 4 frames, the sender complements the sum to get the checksum, 11010011, and sends it along with the data frames. The receiver performs 1s complement arithmetic sum of all the frames including the checksum. The result is complemented and found to be 0. Hence, the receiver assumes that no error has occurred. COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) 5. Explain Fixed- and floating-point representation with example. Fixed and Floating-Point Number: In digital technology, data is stored in memory registers with binary bits 0’s and 1’s because the computer only understands binary language. When we enter data in the system, it is converted into binary bits, and it is processed and used in the CPU in different ways. Memory registers have a format and a specific range to store data. Scientists have designed a real number representation method in memory registers of 8-bit, 16 bits, 32bit. Digital Computers use Binary number system to represent all types of information inside the computers. Alphanumeric characters are represented using binary bits (i.e., 0 and 1). Digital representations are easier to design, storage is easy, accuracy and precision are greater. There are various types of number representation techniques for digital number representation, for example: Binary number system, octal number system, decimal number system, and hexadecimal number system etc. But Binary number system is most relevant and popular for representing numbers in digital computer system. Fixed-point representation: This representation has fixed number of bits for integer part and for fractional part. For example, if given fixed-point representation is IIII.FFFF, then you can store minimum value is 0000.0001 and maximum value is 9999.9999. There are three parts of a fixed-point number representation: the sign field, integer field, and fractional field. 1 00010011 10010101 Sign bit Integer Number Fractional part. Floating-point representation: This representation does not reserve a specific number of bits for the integer part or the fractional part. Instead, it reserves a certain number of bits for the number COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) (called the mantissa or significand) and a certain number of bits to say where within that number the decimal place sits (called the exponent). The floating number representation of a number has two parts: the first part represents a signed fixed-point number called mantissa. The second part of designates the position of the decimal (or binary) point and is called the exponent. The fixed-point mantissa may be fraction or an integer. Representation Single Precision Double Precision Single Precision Format Representation 1 00010011 10010101 1 bit 8 bits 23 bits Sign bit Exponent Mantissa Double Precision Format Representation 1 00010011011 10010101.. N 1 bit 11 bits 52 bits Sign bit Exponent Mantissa How we can distinguish base, mantissa and exponent here in floating-point: COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) 1.N * 2 ^ E-127 1.N * 2 ^ E-1023 Formula Single and Double precision format. Example: 0 10000101 01010100100000000000000 Number Sign Exponent Mantissa Bit 254756.145 0 10000101 01010100100000000000000 Can be written in hexadecimal form 42AA4000. COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) UNIT-2 (Overview of Register Transfer and Microoperations Logic) 1. What is register? Computer registers are designated by upper case letters (and optionally followed by digits or letters) to denote the function of the register. For example, the register that holds an address for the memory unit is usually called a memory address register and is designated by the name MAR. Other designations for registers are PC (for program counter), IR (for instruction register, and R1 (for processor register). The individual flip-flops in an n-bit register are numbered in sequence from 0 through n-1, starting from 0 in the rightmost position and increasing the numbers toward the left. Figure shows the representation of registers in block diagram form. The most common way to represent a register is by a rectangular shape with the name of the register inside. 2. 2. What is register transfer and what is micro-operation? Register transfer: Information transfers from one register to another register in a symbolic form by means of a replacement operator. The statement R2← R1 denotes a transfer of the content of register R1 into register R2. It designates a replacement of the content of R2 by the content of R1. COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) The content of the source register R 1 does not change after the transfer. If we want the transfer to occur only under a predetermined control condition, then it can be shown by an if-then statement. if (P=1) then R2← R1. P is the control signal generated by a control section. We can separate the control variable from the register transfer operation by specifying a control function. Control function is a Boolean variable that is equal to 0 or 1. control function is included in the statement as P: R2← R1. Control condition is terminated by a colon implies transfer operation be executed by the hardware only if P=1. Every statement written in a register transfer notation implies a hardware construction for implementing the transfer. Figure shows the block diagram that depicts the transfer from R1 The n outputs of register R1 are connected to the n inputs of register R2. The letter n will be used to indicate any number of bits for the register. It will be replaced by an actual number when the length of the register is known. Register R2 has a load input that is activated by the control variable P. It is assumed that the control variable is synchronized with the same clock as the one applied to the register. COMPUTER ENGINEERING PIET DS  COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) The basic symbols of the register transfer notation are listed in below table Symbols Description Examples Letters (and numerals) Denotes a register MAR, R2 Denotes parts of a Parenthesis () R2(0-7), R2(L) register Denotes transfer of Arrow  R2R1 information Separates two micro- Comma, R2 R1, R1 operations A comma is used to separate two or more operations that are executed at the same time. The statement T: R2← R1, R1← R2 (exchange operation) denotes an operation that exchanges the contents of two registers during one common clock pulse provided that T=1. 3. Give the list of micro-operations! In computer central processing units, micro-operations (also known as micro-ops) are the functional or atomic operations of a processor. They transfer data between registers and between external buses of the CPU and also perform ALU (Arithmetic and logical operations) on registers. Execution of program consists of sequential execution of instructions and each execution is executed during an instruction cycle made up of shorter sub cycle, For E.g., (fetch, Indirect, execute and interrupt) The performance of each cycle involves one or more operation, knows as microoperation COMPUTER ENGINEERING PIET DS COMPUTER ORGANIZATION AND ARCHITECTURE (03606215) Register Transfer This type of microoperations is used to transfer from one register to another binary information. 4. Explain Arithmetic Micro-operations with examples. We can perform arithmetic operations on the numeric data which is stored inside the registers. R3