JSS Technical Education Electronics & Communication Engineering Assignment PDF

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Summary

This document is an assignment for a course in electronics and communication engineering at JSS ACADEMY OF TECHNICAL EDUCATION. It covers topics such as pn junction diodes, and includes questions and diagrams related to the subject.

Full Transcript

**JSS MAHAVIDYAPEETHA** **JSS ACADEMY OF TECHNICAL EDUCATION, NOIDA** **Approved by All India Council for Technical Education (AICTE), New Delhi.** **UG programs are Accredited by National Board of Accreditation (NBA), New Delhi.** **Affiliated to Dr APJ Abdul Kalam Technical University, Uttar P...

**JSS MAHAVIDYAPEETHA** **JSS ACADEMY OF TECHNICAL EDUCATION, NOIDA** **Approved by All India Council for Technical Education (AICTE), New Delhi.** **UG programs are Accredited by National Board of Accreditation (NBA), New Delhi.** **Affiliated to Dr APJ Abdul Kalam Technical University, Uttar Pradesh, Lucknow.** **www.jssaten.ac.in** **ELECTRONICS & COMMUNICATION ENGINEERING** **A[SSIGNMENT -- 1 \[Unit 1\] ]** **[pn Junction Diode and their Applications ]** **Faculty** **:** **Dr. Chhaya Grover** **AY** **: 2024-25** -------------- ------- --------------------------------------- ------------------ ------- --------------- **Subject** **:** **Fundamentals of Electronics Engg.** **Subject Code** **:** **BEC-101** **Semester** **:** **I** **Section** **:** **EE-B6** C105.1 CO1 Comprehend PN junction diodes and apply its concept for different applications -------- ----- ----------------------------------------------------------------------------------------- C105.2 CO2 Interpret construction and operation of BJT, FET and MOFET C105.3 CO3 Apply the concept of Operational amplifier to design linear and non-linear applications C105.4 CO4 Perform number systems, conversions, binary arithmetic and minimize logic functions C105.5 CO5 Acquire the knowledge of communication system and their applications +-----------------------+-----------------------+-----------------------+ | **Q.** | **Questions** | **BL** | | | | | | **No.** | | | +=======================+=======================+=======================+ | **1.** | Determine the level | BL2 | | | of Vo for the network | | | | given below: | | +-----------------------+-----------------------+-----------------------+ | **2.** | Determine Vo and ID | BL2 | | | for the networks | | | | given below: | | | | | | | | ![](media/image10.png | | | | ) | | +-----------------------+-----------------------+-----------------------+ | **3.** | Determine Vo and I | BL2 | | | for the networks | | | | shown below: | | +-----------------------+-----------------------+-----------------------+ +-----------------------+-----------------------+-----------------------+ | | ![](media/image1.png) | | +=======================+=======================+=======================+ | **4.** | Determine Vo and ID | BL2 | | | for the network shown | | | | below: | | +-----------------------+-----------------------+-----------------------+ | **5.** | Two silicon diodes, | BL3 | | | with a forward | | | | voltage drop of 0.7 | | | | V, are used in the | | | | circuit shown in the | | | | figure. Calculate the | | | | range of input | | | | voltage Vi for which | | | | the output voltage V0 | | | | is equal to Vi. | | | | | | | | ![](media/image9.png) | | +-----------------------+-----------------------+-----------------------+ | **6.** | Compute and sketch vo | BL2 | | | and iR for the | | | | network given below: | | +-----------------------+-----------------------+-----------------------+ | **7.** | Determine *vo* for | BL2 | | | each of the network | | | | given below for the | | | | input shown: | | +-----------------------+-----------------------+-----------------------+ +-----------------------+-----------------------+-----------------------+ | | ![](media/image11.png | | | | ) | | +=======================+=======================+=======================+ | **8.** | Sketch vo for each of | BL2 | | | the Diode clamper | | | | network given below | | | | for the input vi. | | | | ![](media/image2.png) | | +-----------------------+-----------------------+-----------------------+ | **9.** | Design the network | BL3 | | | shown in the figure | | | | below to maintain VL | | | | at 12 V for a load | | | | current IL from 0 mA | | | | to 200 mA. That is, | | | | determine RS and VZ. | | | | Also compute PZ max | | | | for the Zener diode. | | +-----------------------+-----------------------+-----------------------+ | **10.** | In the circuit shown | BL2 | | | below, the knee | | | | current of the ideal | | | | Zener diode is 10 mA. | | | | Calculate the minimum | | | | value of RL in Ω and | | | | the minimum power | | | | rating of the Zener | | | | diode in Mw to | | | | maintain 5 V across | | | | RL. | | | | | | | | ![](media/image5.png) | | +-----------------------+-----------------------+-----------------------+ +-----------------------+-----------------------+-----------------------+ | **11.** | Determine the voltage | BL2 | | | available from the | | | | voltage doubler if | | | | the secondary voltage | | | | of the transformer is | | | | 120 V (rms). Also | | | | determine the | | | | required PIV ratings | | | | of the diodes in | | | | terms of the peak | | | | secondary voltage Vm | | +=======================+=======================+=======================+ | **12.** | Differentiate | BL1 | | | between: | | | | | | | | a\. Avalanche | | | | breakdown and Zener | | | | Breakdown | | | | | | | | b\. Zener Diode and | | | | normal P-N junction | | | | diode | | | | | | | | c\. LED and | | | | Photodiode | | +-----------------------+-----------------------+-----------------------+

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