MOSCAP 1 PDF

Department of Electronics and Communication Engineering Course Title of the course Program Total Number of contact hours Credit Code Core (PCR) Lecture Tutorial (T) Practical Total / Electives (L)...

Department of Electronics and Communication Engineering Course Title of the course Program Total Number of contact hours Credit Code Core (PCR) Lecture Tutorial (T) Practical Total / Electives (L) (P) Hours (PEL) ECC 302 Semiconductor PCR 3 0 0 3 3 Devices and Technology Pre-requisites Course Assessment methods (Continuous (CT) and end assessment (EA)) XEC02: Basic Electrical and CT+EA Electronics Engineering Course CO1: Explain basic semiconductor material physics Outcomes CO2: Analyze the characteristics of various electronic devices like diode, transistor etc. CO3: Illustrate the qualitative knowledge of special purpose devices. CO4: Understand basics of fabrication processes CO5: Learn the latest technological changes 10/14/2024 ECC 302, ECE Department, NIT Durgapur 1 Topics Covered Module 1: Physics of Semiconductor Devices: Equilibrium carrier concentrations; Thermal Equilibrium and wave particle duality; Intrinsic semiconductor : Bond and band models; Extrinsic semiconductor: Bond and band models, density of states and Fermi Dirac statistics, calculation of carrier concentrations from allowed energy states, ,Carrier transport; Random motion; Drift Diffusion Generation/Recombination; mobility, velocity saturation, Excess carriers; Injection level; Lifetime; Direct and indirect semiconductors; Procedure for analyzing semiconductor devices; Basic equations and approximations Module 2: P-N Junction Diode: Unbiased & biased p-n junction, Diode current equation, Voltage- current characteristics, Junction capacitances, Effect of high field on charge carriers in semiconductors, Impact ionization, Carrier multiplication, avalanche breakdown of junction, Zener diode and Zener breakdown, Photodiode, Solar cell, Metal-Semiconductor Schottky Barrier Diode. Module 3: Field Effect Transistor: Device structure and operation, Metal Oxide Semiconductor (MOS) capacitance: C-V characteristics, MOS Device Physics; threshold voltage, body effect. MOSFET: Device structure and operation, MOSFET Device Physics, Common Source DC characteristics. FET small-signal equivalent circuit Module 4: Bipolar Junction Transistor (BJT): Basic principle of operation, Base width modulation, Eber- Moll model, hybrid-pi model, Equivalent circuit of BJT, Switching Characteristics, Photo transistor, High frequency transistor. Module 5: Process Technology: Crystal Growth, Oxidation, Diffusion, Implantation, Lithography, Thin Film Deposition, Metallization, CMOS process flow Module 6: Recent Developments: Moore’s Law and scaling challenges, Emerging Devices 10/14/2024 ECC 302, ECE Department, NIT Durgapur 2  Text Books, Text Books: and/or reference 1. Solid State Electronics Devices- Streetman, Banerjee, PHI, New Delhi material 2. Semiconductor Physics and Devices – D.A. Neaman, Tata McGraw Hill 3. Physics of Semiconductor devices, S. M. Sze, John Willey & Sons, N.Y 4. M. S. Tyagi, “Introduction to Semiconductor Materials and Devices”, John Wiley, 2004 References 1. Robert Pierret, “Advanced Semiconductor Fundamentals,” Pearson, 2002 2. C.T. Sah, “Fundamentals of Solid State Electronics”, World Scientific Publishing, 1991 3. Amitava DasGupta and Nandita DasGupta, “Semiconductor Devices: Modelling and Technology”, Prentice Hall India, 2004 10/14/2024 ECC 302, ECE Department, NIT Durgapur 3  Introduction to MOS Transistors  Ideal voltage controlled switch (logic gate):  Output tracks state of input  Consumes power (draws I from Vsupply) ONLY when switching (No load resistor(s) drawing power in one logic state) Extreme low power => low battery drain / High packing density in circuit "CMOS" = Complementary MOS circuitry 10/14/2024 Used for ~ all low-power / battery ECC 302, ECE operated Department, digital devices NIT Durgapur 4  Introduction to MOS Transistors Do you remember the MOSFET… (Metal-Oxide-Semiconductor-Field- Effect-Transistor) Why is it called a field effect transistor?? It is due to the fact that its operation depends on using a field to control the current running from the source to the drain. We use the field to form the No current flows between the source and the thin channel at the surface of drain in equilibrium. the MOSFET. The p-type region separating creates built-in The MOSFET is sometimes electric fields which creates a large potential referred to as a surface field barrier. effect device. Using the field at the gate to invert the surface of the semiconductor allows current to flow from the source to the drain.  MOS Capacitor (MOSCAP) “MOS” = Metal- Oxide- Semiconductor “MOS” actually refers to “Metal”– Silicon Dioxide – Silicon Other material systems have similar “MIS” structures formed by Metal –Insulator – Semiconductor The substrate is normally taken to be grounded and the “Gate” electrode can be biased with a voltage, VG 10/14/2024 ECC 302, ECE Department, NIT Durgapur 6  MOS Capacitor (MOSCAP) Key assumptions: (Ideal Case) 1) Metal is an equipotential region. 2) Oxide is a perfect insulator with zero current flow. 3) Neither oxide nor oxide-semiconductor interface have charge centers. 4) Semiconductor is uniformly doped. 5) An ohmic contact has been established on the back side of the wafer. 6) Analysis will be one-dimensional. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 7  MOS Capacitor (MOSCAP) Energy Band Diagram Diagrams of Separate Materials EO= Vacuum Energy Level. The minimum energy an electron must have to free itself from the material. q ϕ ⋅ = "Work function" = Energy to pull electron at Fermi level clear out of the material q χ ⋅ = "Electron affinity" =This is the energy difference from the conduction band minimum in the semiconductor to the vacuum energy level. Note that this energy does NOT depend on doping 10/14/2024 ECC 302, ECE Department, NIT Durgapur 8  MOS Capacitor (MOSCAP) Let’s start with the ideal situation, ФM = ФS Gate Voltage (VG) = 0 Since the insulator prevents any current from flowing, when we bring the materials together, the Fermi-energy must be flat. Charges only exist at the surface of the metal We assume that there are no charges or dopants located in the oxide region Note the assumption of an equipotential surface in the metal simply states that a perfect conductor can not support an electric field (electrostatics). 10/14/2024 ECC 302, ECE Department, NIT Durgapur 9  MOS Capacitor (MOSCAP) Block Charge Diagram A positive voltage on the gate puts positive charge on the gate electrode. Gauss’s law forces an equal negative charge to form near the semiconductor- insulator interface. Charge separated by a distance implies an electric field across the insulator. These two layers of charge make up the CAPACITOR Key to understanding MOSFETS 10/14/2024 ECC 302, ECE Department, NIT Durgapur 10  MOS Capacitor (MOSCAP) Under Bias VG The applied bias (VG) separates the Fermi levels at the metal and semiconductor ends by qVG EF(metal) - EF(semiconductor) = -qVG If the semiconductor is grounded (fixed at any constant potential we can call ground):  Metal side Fermi level moves downward if VG > 0  Metal side Fermi level moves upward if VG < 0 Applying Poisson’s equation to the oxide, since there are no charges in the oxide, Since the potential varies linearly with x, so does the energy bands 10/14/2024 ECC 302, ECE Department, NIT Durgapur 11  MOS Capacitor (MOSCAP) Under Bias VG For an n-type semiconductor  When VG > 0 the metal Fermi-energy is lowered (E=-qVG), the insulator has an electric field across it that terminates almost immediately in the near perfectly conducting metal, but terminates over a finite distance in the semiconductor of “finite resistivity”.  The charge model indicates that negative charge must be created in the semiconductor near the interface. This charge is in the form of electrons.  The electron concentration in the semiconductor near interface increases. This is called accumulation 10/14/2024 ECC 302, ECE Department, NIT Durgapur 12  MOS Capacitor (MOSCAP) Under Bias VG For an n-type semiconductor  When VG < 0 the metal Fermi-energy is raised (E=-qVG), the insulator has an electric field across it that terminates almost immediately in the near perfectly conducting metal, but terminates over a finite distance in the semiconductor of “finite resistivity”.  The charge model indicates that positive charge must be created in the semiconductor near the interface. This charge is in the form of ionized donors.  The electron concentration in the semiconductor near interface decreases. This is called depletion 10/14/2024 ECC 302, ECE Department, NIT Durgapur 13  MOS Capacitor (MOSCAP) Under Bias VG For an n-type semiconductor  For higher magnitudes of bias (VG < 0) the Fermi-energy near the interface crosses-the intrinsic energy and the “type” of material swaps from n-type to p-type (only locally near the interface).  The charge model indicates that positive charge must be created in the semiconductor near the interface. This charge is in the form of ionized donors and holes. Continued…… 10/14/2024 ECC 302, ECE Department, NIT Durgapur 14  MOS Capacitor (MOSCAP) Under Bias VG For an n-type semiconductor  The hole concentration near the interface must equal the donor concentration. Thus, This is called inversion.  The onset of inversion occurs for a voltage called the threshold voltage VT (not thermal voltage)  Detailed calculations taking into account the charge distribution as a function of position in the semiconductor indicates that inversion occurs when, 10/14/2024 ECC 302, ECE Department, NIT Durgapur 15  MOS Capacitor (MOSCAP) Under Bias VG For an n-type semiconductor  For still higher magnitudes of bias (VG < 0) the hole concentration continues to increase resulting in a very high concentration of holes near the interface. This is known as strong inversion. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 16  MOS Capacitor (MOSCAP) Under Bias VG for P-type Material 10/14/2024 ECC 302, ECE Department, NIT Durgapur 17  MOS Capacitor (MOSCAP) 10/14/2024 ECC 302, ECE Department, NIT Durgapur 18  MOS Capacitor (MOSCAP) Quantitative Analysis Let φ(x) = electrostatic potential inside the semiconductor at a depth x (measured from the oxide interface) 10/14/2024 ECC 302, ECE Department, NIT Durgapur 19  MOS Capacitor (MOSCAP) The n-type surface that forms as a result of the applied electric field is the key to transistor operation! Define a potential qφS which determines how much band bending there is at the surface. When qφS = 0 we are in flat band condition. When qφS < 0 we have hole accumulation at the surface. When qφS > 0 we have electron accumulation at the surface. When qφS > qφF we have inversion at the surface. Surface should be as strongly n-type as the body is p-type. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 20  MOS Capacitor (MOSCAP) Quantitative Analysis We know 10/14/2024 ECC 302, ECE Department, NIT Durgapur 21  MOS Capacitor (MOSCAP) Quantitative Analysis  Since the MOS-Capacitor is symmetric (equal charge on metal as is in the semiconductor) and has no charge in the oxide, we can solve for the electrostatic variables using only the semiconductor section of material. Things to note:  Charge due to accumulation bias and inversion bias results in a very narrow charge distribution near the interface.  Charge due to depletion bias results in a wide “depletion width”, W 10/14/2024 ECC 302, ECE Department, NIT Durgapur 22  MOS Capacitor (MOSCAP) Quantitative Analysis What other physical information can we obtain from this structure? Electron and hole concentrations are related to the potential… ni Electrons Holes 10/14/2024 ECC 302, ECE Department, NIT Durgapur 23  MOS Capacitor (MOSCAP) Use Poisson equation and total charge density to get the total charge… Substitute in our knowledge of carrier concentrations and we get… Integrate from the bulk (where the bands are flat, there are no electric fields, and the doping alone sets the carrier concentrations) towards the Electric Field surface… Debye length (LD) – distance at which charge fluctuations are screened out to look like neutral entities. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 24  MOS Capacitor (MOSCAP) So what does the surface charge density look like? Use Gauss’ Law to find the charge: At φs = 0 there is no space charge. When φs is negative we accumulate majority holes at the surface. When φs is positive initially the linear term in the electric field solution dominates as a result of the exposed, immobile dopants. Depletion extends over several hundred nm until we reach strong inversion and the exponential field term dominates. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 25  MOS Capacitor (MOSCAP) What is the charge distribution on an inverted surface? For simplicity, let’s assume complete depletion for 0 < x < W and neutral material for x > W.  Charge due to uncompensated acceptors  Positive charge on the metal QM is balanced by negative charge QS in the semiconductor which is the depletion layer charge plus the charge due to the inversion region QN. What is the charge distribution on an inverted surface? The depletion width here is exaggerated and is typically only on the order of 10 nm. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 26  MOS Capacitor (MOSCAP) Quantitative Analysis What about the electric field and the potential?  The electric field does not penetrate the metal. M O S  It is constant across the oxide as there are no charges or impurities in the oxide.  The electric field in the semiconductor M O S drops linearly, as we would expect.  The potential is constant in the metal.  It is drops linearly across the oxide (Vi).  The potential is also dropped across the depletion region of the semiconductor, φS. 10/14/2024 ECC 302, ECE Department, NIT Durgapur 27  MOS Capacitor (MOSCAP) Quantitative Analysis Apply the “Depletion Region Approximation” (neglect all charges but those due to ionized dopants) and assume p-type material, where W is depletion width Poisson’s equation using a boundary condition that the electric field goes to zero at the depletion region edge, And finally, the electrostatic potential can be found by integrating using a boundary condition that the electrostatic potential goes to zero at the depletion region edge 10/14/2024 ECC 302, ECE Department, NIT Durgapur 28  MOS Capacitor (MOSCAP) Quantitative Analysis The depletion width, W, can be found by noting that φ=φS at x=0  The depletion region grows with voltage until strong inversion is reached. So what is the maximum value of the depletion width? The depletion width at the inversion-depletion transition, Wm, can be found by noting that 2φF=φS (inv) And the charge in the depletion region at strong inversion. NOTE: To obtain the equations for n-type substrates, we simply repeat the above procedure replacing NA with -ND 10/14/2024 ECC 302, ECE Department, NIT Durgapur 29