Processors PDF

Processors  Processors Processor Application General Specific Single Purpose (GP) Instruction Purpose (SP)...

Processors  Processors Processor Application General Specific Single Purpose (GP) Instruction Purpose (SP) -Set (ASIP) Many of us thinks that processor is usually associated with programmable software processor, however… – Any digital circuit that performs a computation tasks is a processor as well. 3  General Purpose Processor General Intel 80x86 Purpose Processor Motorola 68HCxxx Embedded Intel® XScale™ General Purpose Mostly based on Processor QualComm Snapdragon Advanced RISC Machine (ARM) Architecture DEC StrongARM Intel® XScale™ – GSM/CDMA Communication module, etc. QualComm SnapDragon – Toshiba TG01 smartphone, ASUS Eee PC, etc. Quiz: Can you name DEC StrongARM recent Intel embedded – PDA (HP iPAQ), set top box, etc. processor product? 4  General Purpose Processor (1) Programmable device used in a variety of applications Controller Datapath – Also known as “microprocessor” Control Register Features: logic and file State register – Program memory (ROM, FLASH) – Data memory (RAM) General – General datapath with large register file IR PC ALU and general ALU User benefits: Program Data – Low time-to-market and NRE costs memory memory – High flexibility Assembly code for: “Pentium” the most well-known, but there are hundreds of others total = 0 for i =1 to … Source: Embedded System Design 5  General Purpose Processor (2) Source: http://www.liafa.jussieu.fr/~carton/ Enseignement/Architecture/Cours/ Gallery/Processors/ Figure shows Motorola 68k microprocessor and a system designed based on the M68k – Can you guess where is the processor located in the picture? 6 Processor – The Brain of the Embedded System (2) Processor Application General Specific Single Purpose (GP) Instruction Purpose (SP) -Set (ASIP) 7  Application Specific Instruction- Set Processor Application Specific Instruction -Set (ASIP) Microcontroller DSP Processor Network Processor Media Processor I/O Processor Microcontroller – Intel, Motorola, Hitachi, TI, Phillips, PIC, ATMEL, etc. DSP Processor – Texas Instrument, Analog Devices (SHARC, TigerSHARC), Motorola 5600xx, etc. Media Processor – Texas Instrument (DSP TMS320DM310), Phillips (Trimedia, PNX1300, PNX1500), etc. 8  Application Specific Instruction- Set Processor (1) Programmable processor optimized for a Controller Datapath particular class of applications having common characteristics Control Registers – Compromise between general-purpose and logic and State register single-purpose processors Features: Custom ALU – Program memory (ROM/FLASH) IR PC – Data Memory (RAM) – Optimized datapath Data Program memory – Special functional units memory All features are in a single chip SoC(System- on-Chip) as opposed to general-purpose Assembly code processor. for: Benefits total = 0 for i =1 to … – Some flexibility, good performance, size and SoC power implementation Source: Embedded System Design 9  Microcontroller Commonly used exemplary for Small Scale Embedded System (8/16-bit Microcontroller) 8051 family PIC16F8X family Hitachi H8 68HC11xx ATMEL AVR® 8-bit RISC *Please note that X-bits microcontroller normally representing the data bus width 10  Microcontroller(1) Source: http://sfprime.net/pic16f84/index.htm Source: http://www.geocities.com/ykirill/sas/sas1_1.html Figure shows PIC16F84 microcontroller and a system designed based on the PIC16F84 – Can you guess where is the processor located in the picture? 11  Digital Signal Processing (DSP) processor DSP processor is designed specifically to perform common operations on digital signals – digital encodings of analog signals like audio, image and video. Common signal processing task includes: – Signal filtering – Signal transformation Such operations are usually math-intensive (multiply-add, shift-add), therefore DSP processor has a a special- purpose datapath components: – Multiply-accumulate hardware – Special hardware to fetch sequential data memory locations in parallel with other operation 12  Digital Signal Processing (DSP) processor (1) Source: http://electronicspecifier.com Source: http://www.seeddsp.com/eng/evm/dec137.htm Figure shows TMS320C674X DSP processor and a DSP Embedded Controller based on TMS320C674x. – Can you guess where is the processor located in the picture? 13  Processor – The Brain of the Embedded System (2) Processor Application General Specific Single Purpose (GP) Instruction Purpose (SP) -Set (ASIP) 14  Single-Purpose Processor Digital circuit designed to execute exactly one program Controller Datapath – a.k.a. coprocessor, accelerator or peripheral Control index – Eg: Floating-point coprocessor, CMOS Pixel logic coprocessor, graphic/speech processor, adaptive total filtering processor, encryption/decryption engine, State communication protocol stack processor, register + Video/Java accelerator. Features – Contains only the components needed to Data execute a single program memory – No program memory Source: Embedded System Design Benefits – Fast – Low power – Small size 15  Processor – How do We Choose Them for Our Design Application? Processors vary in their customization for the problem at hand total = 0 for i = 1 to N loop total += M[i] end loop Desired functionality General-purpose Application-specific Single-purpose processor processor processor Source: Embedded System Design 16  Overview - Von Neumann vs. Harvard Architecture Von Neumann Harvard Standard Systems Design(instruction)  Basic Architecture for General-Purpose & Application-Specific Processor Control unit and Processor datapath Control unit Datapath – Note similarity to Control ALU Controller single-purpose /Status processor Key differences Registers – Datapath is general – Control unit doesn’t PC IR store the algorithm – the algorithm is “programmed” into I/O the memory Memory 19  Datapath Operation Load Processor – Read memory Control unit Datapath location into register ALU ALU operation Controller Control +1 /Status – Input certain registers through ALU, store Registers back in register Store 10 11 – Write register to PC IR memory location I/O Memory... 10... 11 20  Control Unit Control unit: configures the datapath operations Processor – Sequence of desired operations Control unit Datapath (“instructions”) stored in ALU memory – “program” Controller Control /Status Instruction cycle – broken into several sub-operations, each one clock cycle, e.g.: Registers – Fetch: Get next instruction into IR – Decode: Determine what the PC IR instruction means R0 R1 – Fetch operands: Move data from memory to datapath I/O register 100 load R0, M Memory... – Execute: Move data through the 500 10 101 inc R1, R0 ALU 102 store M, R1 501... – Store results: Write data from register to memory 21  Control Unit Sub-Operations Fetch Processorx – Get next Control unit Datapath instruction into IR Controller Control ALU – PC: program /Status counter, always Registers points to next instruction PC100 IR R0 R1 – IR: holds the load R0, M fetched instruction I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 22  Control Unit Sub-Operations Decode Processor – Determine what Control unit Datapath the instruction Controller Controller Control ALU means /Status Registers PC100 IR R0 R1 load R0, M I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 23  Control Unit Sub-Operations Fetch operands Processor – Move data from Control unit Datapath memory to Controller Control ALU datapath register /Status Registers 10 PC100 IR R0 R1 load R0, M I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 24  Control Unit Sub-Operations Execute Processor – Move data Control unit Datapath through the ALU Controller Control ALU – This particular /Status instruction does Registers nothing during this sub-operation 10 PC100 IR R0 R1 load R0, M I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 25  Control Unit Sub-Operations Store results Processor – Write data from Control unit Datapath register to Controller Control ALU memory /Status – This particular Registers instruction does nothing during 10 PC100 IR this sub-operation R0 R1 load R0, M I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 26  Instruction Cycles PC=100 Processor Fetch Decode Fetch Exec. Store Control unit Datapath ops results ALU clk Controller Control /Status Registers 10 PC100 IR R0 load R0, M R1 I/O 100 load R0, M Memory 500 10 101 inc R1, R0 102 store M, R1 501... 27  Instruction Cycles PC=100 Processor FetchDecode Fetch Exec. Store Control unit Datapath ops results ALU clk Controller Control +1 /Status PC=101 Fetch Decode Fetch Exec. Store Registers ops results clk 10 11 PC 101 IR R0 R1 inc R1, R0 I/O 100 load R0, M Memory... 500 10 101 inc R1, R0 102 store M, R1 501... 28  Instruction Cycles PC=100 Processor FetchDecode Fetch Exec. Store Control unit Datapath ops results ALU clk Controller Control /Status PC=101 FetchDecode Fetch Exec. Store Registers ops results clk 10 11 PC102 IR R0 R1 store M, R1 PC=102 Fetch Decode Fetch Exec. Store I/O ops results 100 load R0, M Memory clk 500 10 101 inc R1, R0 102 store M, R1 501 11... 29 End of Lecture