Computer Architecture PDF - University of Benghazi
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University of Benghazi
Amna Al-Ojeli
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This document is an introductory lecture to Computer Architecture from the University of Benghazi. It covers fundamental concepts of computer architecture, including architectural and organizational attributes, the structure and function of computers, the different operations involved in data processing and storage, and the top level structure of a computer and its processors.
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UNIVERSITY OF BENGHAZI FACULTY OF INFORMATION TECHNOLOGY COMPUTER ARCHITECTURE Chapter 1 Introduction...
UNIVERSITY OF BENGHAZI FACULTY OF INFORMATION TECHNOLOGY COMPUTER ARCHITECTURE Chapter 1 Introduction Instructor: Amna Al-Ojeli Architecture & Organization Architecture is those attributes visible to the programmer Instruction set, number of bits used for data representation, I/O mechanisms, addressing techniques. e.g. Is there a multiply instruction? Organization is how features are implemented Control signals, interfaces, memory technology. e.g. Is there a hardware multiply unit or is it done by repeated addition? Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition 1 Structure & Function Structure is the way in which components relate to each other Function is the operation of individual components as part of the structure Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition Functional View All computer functions are: Data processing Data storage Data movement Control Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition 2 Operations (a) Data movement The computer must be able to move data between itself and the outside world Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition Operations (b) Storage The computer must temporarily store at least those pieces of data that are being worked on at any given moment Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition 3 Operation (c) Processing from/to storage Example: Any number-crunching application that takes data from memory and stores the result back in memory. Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition Operation (d) Processing from storage to I/O The data may take a wide variety of forms, and the range of processing requirements is broad. Files of data are stored on the computer for subsequent retrieval and update. Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition 4 The Computer - Top Level Structure Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition The Processor The purpose of the processor (CPU) is to fetch and execute instructions. The CPU consists of the following components: Arithmetic Logic Unit (ALU): performs calculations and logical decisions. Control Unit: sends signals to control how data moves around the CPU. Cache: provides fast access to frequently used instructions and data. Registers: Program Counter (PC) Memory Address Register (MAR) Memory Data Register (MDR) Accumulator (ACC) Amna Al-Ojeli Chapter 1 William Stallings Computer Organization and Architecture 9th Edition 5 UNIVERSITY OF BENGHAZI FACULTY OF INFORMATION TECHNOLOGY COMPUTER ARCHITECTURE Chapter 2 Computer Evolution and Performance Instructor: Amna Al-Ojeli Von Neumann Machines An example of computer architecture and organization, which is used by modern computers as a reference. Von Neumann machines is a computer’s category based on Von Neumann architecture (stored- program concept). Data and program stored in the same space (memory). Thus, the machines it self can alter either its programs or its internal data. Amna Al-Ojeli Chapter 2 William Stallings Computer Organization and Architecture 9th Edition 6 Von Neumann Machines\ Cont. Stored Program concept Main memory storing programs\ instructions and data An arithmetic and logic unit (ALU) capable of operating on binary data Control unit interprets instructions from memory and executes them Input and output (I/O) equipment operated by the control unit At the Princeton Institute for Advanced Studies The IAS computer Amna Al-Ojeli Chapter 2 Started 1946 - Finished 1952 William Stallings Computer Organization and Architecture 9th Edition Structure of Von Neumann Machine Amna Al-Ojeli Chapter 2 William Stallings Computer Organization and Architecture 9th Edition 7 Computer Registers Set of registers (storage in CPU) Memory Buffer Register: Contains a word to be stored in memory or sent to the I/O unit, or is used to receive a word from memory or from the I/O unit. Memory Address Register: Specifies the address in memory of the word to be written from or read into the MBR. Instruction Register: Contains the 8-bit opcode instruction being executed. Amna Al-Ojeli Chapter 2 William Stallings Computer Organization and Architecture 9th Edition Computer Registers\ Cont. Set of registers (storage in CPU) Instruction Buffer Register: Employed to hold temporarily the righthand instruction from a word in memory. Program Counter: Contains the address of the next instruction-pair to be fetched from memory. Accumulator: Employed to hold temporarily operands and results of ALU operations. Amna Al-Ojeli Chapter 2 William Stallings Computer Organization and Architecture 9th Edition 8 IBM Systems The major manufacturer of punched-card processing equipment 1953 - the 701 IBM’s first stored program computer Scientific calculations 1955 - the 702 Business applications Amna Al-Ojeli Lead to 700/7000 series Chapter 2 William Stallings Computer Organization and Architecture 9th Edition Transistors Replaced vacuum tubes Smaller Cheaper Less heat dissipation Solid State device Made from Silicon (Sand) Invented 1947 at Bell Labs Second generation machines Amna Al-Ojeli Chapter 2 William Stallings Computer Organization and Architecture 9th Edition 9 Semiconductor Memory In the 1950s and 1960s, most computer memory was constructed from tiny rings of ferromagnetic material called a core In 1970, Fairchild produced the first relatively capacious semiconductor memory. This chip, about the size of a single core, could hold 256 bits of memory. Much faster than core Amna Al-Ojeli Chapter 2 Capacity approximately doubles each year William Stallings Computer Organization and Architecture 9th Edition Evolution of Intel Microprocessors A breakthrough was achieved in 1971, when Intel developed its 4004. The first chip to contain all of the components of a CPU on a single chip Can add two 4-bit numbers and can multiply only by repeated addition Followed by 8008 in 1972 Was the first 8-bit microprocessor and was almost Amna Al-Ojeli twice as complex as the 4004. Chapter 2 Both designed for specific applications William Stallings Computer Organization and Architecture 9th Edition 10 Evolution of Intel Microprocessors Followed by 8080 in1974 Intel’s first general purpose microprocessor with 8- bit 8086 at the end of the 1970s 16-bit microprocessors began to be developed 80386 in 1985 Amna Al-Ojeli Intel introduced its own 32-bit microprocessor Chapter 2 William Stallings Computer Organization and Architecture 9th Edition Speeding it up Branch prediction The processor looks ahead in the instruction code fetched from memory and predicts which branches, or groups of instructions, are likely to be processed next. Data flow analysis The processor analyzes which instructions are dependent on each other’s results, or data, to create an optimized schedule of instructions. Speculative execution Using branch prediction and data flow analysis, some processors speculatively execute instructions ahead of Amna Al-Ojeli their actual appearance in the program execution, holding Chapter 2 the results in temporary locations. William Stallings Computer Organization and Architecture 9th Edition 11 UNIVERSITY OF BENGHAZI FACULTY OF INFORMATION TECHNOLOGY COMPUTER ARCHITECTURE Chapter 3 Computer Function Interconnection Instructor: Amna Al-Ojeli What is a program ? A sequence of steps For each step, an arithmetic or logical operation is done For each operation, a different set of control signals is needed Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 12 Function of Control Unit For each operation a unique code is provided e.g. ADD, MOVE A hardware segment accepts the code and issues the control signals Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Components The Control Unit and the Arithmetic and Logic Unit constitute the Central Processing Unit Data and instructions need to get into the system and results out Input/output Temporary storage of code and results is needed Main memory Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 13 Instruction Cycle Two steps: Fetch Execute Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Fetch Cycle Program Counter (PC) holds address of next instruction to fetch Processor fetches instruction from memory location pointed to by PC Increment PC Unless told otherwise Instruction loaded into Instruction Register (IR) Amna Al-Ojeli Processor interprets instruction and performs required actions Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 14 Execute Cycle Processor-memory data transfer between CPU and main memory Processor I/O Data transfer between CPU and I/O module Data processing Some arithmetic or logical operation on data Control Alteration of sequence of operations e.g. jump Amna Al-Ojeli Chapter 3 Combination of above William Stallings Computer Organization and Architecture 9th Edition Instruction Cycle State Diagram Amna Al-Ojeli Chapter 3 15 Interrupts Mechanism by which other modules (e.g. I/O) may interrupt normal sequence of processing Program e.g. division by zero Timer Generated by internal processor timer Used in preemptive multitasking I/O From I/O controller to signal completion of an operation or an error. Hardware failure Amna Al-Ojeli e.g. memory parity error Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Interrupt Cycle Added to instruction cycle Processor checks for interrupt Indicated by an interrupt signal If no interrupt, fetch next instruction If interrupt pending: Suspend execution of current program Save context Set PC to start address of interrupt handler routine Process interrupt Amna Al-Ojeli Restore context and continue interrupted program Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 16 Connecting All the units must be connected Different type of connection for different type of unit Memory Input/ Output CPU Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 1. Memory Connection Receives and sends data Receives addresses (of locations) Receives control signals Read Write Timing Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 17 2. Input/ Output Connection Similar to memory from computer’s viewpoint Output Receive data from computer Send data to peripheral Input Receive data from peripheral Send data to computer Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 2. Input/ Output Connection Cont. Receive control signals from computer Send control signals to peripherals e.g. spin disk Receive addresses from computer e.g. port number to identify peripheral Send interrupt signals (control) Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 18 3. CPU Connection Reads instruction and data Writes out data (after processing) Sends control signals to other units Receives (& acts on) interrupts Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Buses There are a number of possible interconnection systems Single and multiple BUS structures are most common e.g. Control/Address/Data bus (PC) Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 19 What is a Bus? A communication pathway connecting two or more devices Usually broadcast Often grouped A number of channels in one bus e.g. 32 bit data bus is 32 separate single bit channels Power lines may not be shown Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Data Bus Carries data Remember that there is no difference between “data” and “instruction” at this level Width is a key determinant of performance Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 20 Address bus Identify the source or destination of data e.g. CPU needs to read an instruction\ data from a given location in memory Bus width determines maximum memory capacity of system Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition Control Bus Control and timing information Memory read/write signal Interrupt request Clock signals Amna Al-Ojeli Chapter 3 William Stallings Computer Organization and Architecture 9th Edition 21 UNIVERSITY OF BENGHAZI FACULTY OF INFORMATION TECHNOLOGY COMPUTER ARCHITECTURE Chapter 4 MEMORY SYSTEM Instructor: Amna Al-Ojeli Memory Hierarchy Registers In CPU Internal or Main memory May include one or more levels of cache “RAM” External memory Backing store Amna Al-Ojeli Chapter 4 William Stallings Computer Organization and Architecture 9th Edition 22 Amna Al-Ojeli Memory Hierarchy – Diagram Chapter 4 William Stallings Computer Organization and Architecture 9th Edition Performance Access time Time between presenting the address and getting the valid data Memory Cycle time Time may be required for the memory to “recover” before next access Cycle time is access + recovery Transfer Rate Amna Al-Ojeli Chapter 4 Rate at which data can be moved William Stallings Computer Organization and Architecture 9th Edition 23 Access Methods Sequential Start at the beginning and read through in order Access time depends on location of data and previous location e.g. tape Direct Individual blocks have unique address Access is by jumping to vicinity plus sequential search Amna Al-Ojeli Access time depends on location and previous Chapter 4 location e.g. disk William Stallings Computer Organization and Architecture 9th Edition Access Methods\ Cont. Random Individual addresses identify locations exactly Access time is independent of location or previous access e.g. RAM Associative Data is located by a comparison with contents of a portion of the store Amna Al-Ojeli Access time is independent of location or previous Chapter 4 access e.g. cache William Stallings Computer Organization and Architecture 9th Edition 24 Internal Memory Random Access Memory (RAM) Misnamed as all semiconductor memory is random access Read/Write Volatile Temporary storage Static or dynamic Amna Al-Ojeli Chapter 4 William Stallings Computer Organization and Architecture 9th Edition Internal Memory Dynamic Random Access Memory (DRAM) Bits stored as charge in capacitors\ Charges leak Need refreshing even when powered Simpler construction Smaller per bit Less expensive Need refresh circuits Slower Main memory Amna Al-Ojeli Essentially analogue Chapter 4 Level of charge determines value William Stallings Computer Organization and Architecture 9th Edition 25 Internal Memory Static Random Access Memory (SRAM) Bits stored as on/off switches No charges to leak No refreshing needed when powered More complex construction Larger per bit More expensive Does not need refresh circuits Faster Amna Al-Ojeli Cache Chapter 4 Digital Uses flip-flops William Stallings Computer Organization and Architecture 9th Edition Internal Memory Read Only Memory (ROM) Permanent storage Nonvolatile Microprogramming Library subroutines Systems programs Function tables Amna Al-Ojeli Chapter 4 William Stallings Computer Organization and Architecture 9th Edition 26