Semiconductor Manufacturing: Deep Silicon Etch PDF

Semiconductor device manufacturing: MEMS: can be used both as a SENSOR, the device catches a physical change and translates this change in a signal, and ACTUATOR, they can translate a signal into a physical change => they are in the MICROWORLD = their dimensions can vary from micrones to millimeters...

Semiconductor device manufacturing: MEMS: can be used both as a SENSOR, the device catches a physical change and translates this change in a signal, and ACTUATOR, they can translate a signal into a physical change => they are in the MICROWORLD = their dimensions can vary from micrones to millimeters depending on the step of the fabrication process => these devices are fabbricated using a SEMICONDUCTOR MANUFACTURING PROCESS that allows a precise control of the SIZE & SHAPE MOORE’S LAW: is the term used to refer to the observation made by the late Gordon Moore (cofounder of INTEL) in 1965 that the number of transistor in a dense integrated circuit doubles every 2 years FEYNMAN: was the first person that thought of mechanical machines in the micro dimension System on a chip => the complexity stays in the size of the single chip System in package => the difficulty stays in connecting different parts and chips to make them work together PRODUCTION CHAIN: 1. we need to DESIGN the device (to do that we need both design software and intellectual properties) 2. Wafer Fab and electrical wafer sorting => FRONT END MANUFACTURING (the entirety of all the steps needed to realize the devices on the wafer => this part ends at the manufacturing of the IC 3. Packaging and testing => BACK END MANUFACTURING (all the steps needed to put the device inside the packaging and test the correct working) => ends at the die separation 4. END PRODUCT => this chain is independent on the type of application of the device IDM = integrated device manufacturing, is a company that manages all the phases of production,design and costumer service => we manage the entire chain explained before FABLESS = we just design the devices and consumer service but we don’t manage the production because as the name says we don’t have a FAB FOUNDRIES = they manage the manufacturing process but not the design => there are also companies specialized in the assembling and testing ACCELEROMETERS: are sensors that DETECT THE ACCELERATION, is formed by a MASS connected to a SPRING and a CAPACITOR that changes his balance and this makes possible to detect the acceleration => accelerometers can be sensible just in one direction or in more than one simultaneously GYROSCOPES: detect an angular rate, their principle of operation is the excitation of a vibration mode in response to Coriolis force acting on a proof mass => a gyroscope needs to move, there is always a movement that makes possible to detect the angular rate => thickness of the mass moving is 30micrometers => we can have a device that has both a gyroscope and accelerometer inside this will be called COMBO ThELMA = thick epitaxial layer for micro-gyroscopes & accelerometers => this process needs the fabrication of 2 wafers: one sensor wafer which includes micro-mechanical components and one cap wafer as sealing element at wafer level => to speak with the environment we need a circuit that is able to change the capacitor change of charge into mV digits that can be read by other devices => a MEMS is formed by 2 parts a mechanical part and an electronic part PRESSURE SENSOR: is used to measure a pressure these can be different depending on the application => in these systems there is a THIN MEMBRANE that deflects based on the pressure change, this membrane is linked to a capacitor connected with a Wheatstone bridge configuration VENSENS: is the fabrication process to produce pressure sensors, in these systems there is a part of silicon that is membrane suspended to obtain this we use a process that at first generates piles on which is layed the silicon membrane then with an other step the piles are disintegrated leaving the membrane suspended => in the packaging we find 2 chimneys that makes possible the contact between the external world and the membrane CLEAR ROOMS: are the environment in which the devices are manufactured, these must be extremely clean and controlled for the amount of contaminants => these can have 2 different structure OPEN SPACE or TUNNEL, in clear room the actual clear part is called the WHITE AREA, in the clear rooms we need to control: temperature, humidity, internal pressure respect to the external one and air recirculation => if some of the parameters is not in the range that we want we need to find what went wrong => to control the air flow we have a system of AIR RECIRCULATION that uses filters to keep the air clean => in clear rooms we also need to have: GASES DISTRIBUTION, CHEMICAL DISTRIBUTION, POWER ENERGY SUPPLY, in order to design a clear room we need to keep in mind the architecture to the power supply, to the safety, facility supply, environment control and control to maintain the parameters needed SILICON WAFERS are a substrate is the foundation of the devices, they need to be polished and without contaminants => when we talk about semiconductor manufacturing we are working layer by layer (as a building with many floors), all these layers need to be in contact to have at the end a working device => on the wafer all the devices are produced at the same time (the process ends at the same time for all the dies on the wafer), due to the fact that all the parts on the wafer are produced at the same time we can test one and if that works than all the others will work => at the end of the entire production process are tested again one by one to see if they work under a real situation SILICON: has a very similar structure to GERMANIUM but silicon is preferred because thee is plenty of it in nature so is cheaper and is also more stable => silicon is a crystal (has a structure that is precise and repeats in space always equal) => silicon atoms share 8 electrons to generate a structure in which electrons don’t move when a current is imposed => silicon when a current is imposed can act as a conductor (?) => silicon has also good mechanical properties, silicon is versatile because doesn’t undergo plastic deformation => silicon is used because has a GOOD BEHAVIOR BOTH IN MECHANICAL AND ELECTRONIC APPLICATIONS LITHOGRAPHY: => the MEMS manufacturing process we use a PLANAR APPROACH in which we stack multiple layers of 2D structures defined through lithography techniques on top of each other, the lithography step defines a planar image of the device that gets then obtained through different types of fabrications modes to create a 3D structure => The Lithography is a process technique of fundamental importance in the realization of accurate structure for MEMS device. The Lithography technology permits to transfer a pattern to a photosensitive material and define the geometry of the device on wafer and it determines the resolution and accuracy of the device on the substrate. Subsequently the pattern transferred on the substrate by the lithography technique can be either etched into the underlying surface or used to define the patterning of a layer deposited onto the masked surface. => we can separate the steps needed for lithography in 3 groups: 1) STEPS INVOLVED IN COATING PROCESS: we have a Surface preparation, coating with sensible materials, soft bake 2) EXPOSURE: exposure to ultraviolet light that permits to the Photoresist to react 3) STEPS INVOLVED IN DEVELOP PROCESS: PEB, developer, Hard bake => through these steps we reveal the pattern obtain trough the exposure => SURFACE PREPARATION: is very important to obtain a good photoresist adhesion on the substrate, Photoresist adhesion must be enough to guarantee stability not only during lithography steps, but also during following technology steps => a poor photoresist adhesion can cause: high undercut during wet etch step, notching during dry etch step, photoresist lifting To increase the adhesion is used a PRIMER that is a chemical layer usually in vapor phase which has the capability to bond with the wafer surface providing a partially hydrophobic surface, chemically modify the substrate surface to optimize the photoresist adhesion => COATING: this step can be characterized in function of several aspects: photoresist thickness requirements, photoresist optical properties, chemical resistance to dry or wet etch processes, step coverage capability => the most used coating techniques are SPIN-ON & DRY FILM LAMINATION 1) SPIN-ON COATING= with this method the thickness of the photoresist can be easily tuned by changing the rotation speed, thanks to this we can use the spin-on technique in a thickness range that goes from less than 1um up to higher than 50 um => Photoresist thickness is characterized through the “Spin Curve” method, that consist to measure photoresist thickness at different rotation speeds analyzing the data obtained with this methodology it is possible to find out best rotation speed to match photoresist thickness required by following process => if we increase the rotating speed the thickness will decrease 2) DRY FILM LAMINATION = uses a solid film, results very useful when the wafer surface has big cavities, in fact with this method the dry film can hang over the cavities => the solid film is laminated through a machine with rollers on the substrate Dry film could also be patterned with exposure step and develop step using dedicated chemical solution. Some dry films could become permanent with a dedicated thermal treatment and could be used as permanent bonding material => the main process parameters are: roller pressure, chuck speed, chuck temperature => EXPOSURE: is a necessary step to perform a chemical reaction on the photoresist to replicate the pattern present on the MASK (these are elements that avoid the exposure of some parts of the photoresist and permit the formation of the image of the structure on the photosensible polymer => masks present some chrome parts that are conserved and some transparent parts where the light passes through and makes the photoresist react) the exposure step is mainly characterize by lens and sources properties of exposure equipment => the DEPTH OF FOCUS defines the photoresist maximum thickness that could be exposed obtaining a vertical profile; the RESOLUTION is the minimum dimension that could be defined on the photoresist => Once fixed the equipment, the main exposure process parameters are exposure dose and focus value => usually for the exposure are used I-LINE PHOTORESIST (peak wavelength sensibility: 365nm; thickness range ~1um to ~ 40um) => in function of their behavior photoresist are decided into 2 main families: POSITIVE TONE PHOTORESIST=> become soluble in develop chemical solution only after exposure step, so we are going to expose only the parts that we don’t need (everything except the design of the structure); NEGATIVE TONE PHOTORESIST => during the exposure step the light reacts with the structure of the photoresist producing a polymerization reaction, the polymerized photoresist is no longer soluble in develop chemical solution (we expose the parts that we want to keep) The photomask, used to expose photoresist is a glass/quartz plate on which it has been patterned a chrome layer that follow the layout drawn on the design of device. Two big exposure families could be defined: Mask Aligner: The design of device is defined with a single exposure step on wafer, The mask contain the device design, of all wafer, No reduction factor in the optical system, The mask is direct aligned to wafer Stepper: The design of mask is transferred on wafer with multiple exposure steps, in each step, layout present on mask is exposed at the same time, the image patterned on the mask is reduced of 5 or 2 times on the wafer to reproduce the device layout, alignment between wafer and mask is indirect. => on the mask we have ALIGNMENT MARKS used to align the wafer on the X & Y direction => during the processes the wafer can get deformed, when we use a stepper we can use the alignment marks position information and lens adjust capability to follow the wafer deformation => for every layer we will have a mask Mask Aligner equipment is a “quite” simple exposure tools. Through a lens system, the light is directed on master and through it arrives on wafer to pattern the layout on photoresist. On mask aligner the mask is close to the wafer and through the chuck movement it is possible to perform a direct alignment between mask and wafer. The tunable distance between wafer and mask represent the focus parameter of exposure step, while exposure dose is characterized by source power and exposure time => with this method we have a great flexibility in terms of alignment modes: FRONT TO FRONT, BACK TO FRONT (permits to define the technology process on both sides), IR ALIGNMENT (permits to define technology process on bonded wafers) => On mask aligner the alignment between mask and wafer is direct. During alignment step, the center of alignment marks present on the mask is directly overlapped to the alignment mark present on wafer. On mask aligner, the mask is exposed with a single exposure shot and it is not possible to compensate the wafer distortion. The only solution to compensate the wafer distortion is design the features of the mask with a dedicate shift for each device. => usually in the ThELMA and GYRO devices the stepper is used to expose the masks related to the SENSOR WAFER => MASKLESS SYSTEMS: they exist and are used in laboratories, in these machines a S.L.M (special light modulator) is used to project directly the design onto the wafer => DEVELOP: During develop step the photoresist is completely immersed in a chemical solution that is able to remove exposed photoresist (positive resist) or unexposed photoresist (negative resist) => this step could also include optional bakes treatment for example: PEB (post exposure bake) that is useful to reduce standing waves effect due to substrate light reflection HARD BAKE (HB) it increases the resistance of the photoresist to the chemicals of the following steps LITHOGRAPHY SET UP: Once it has chosen the best lithography equipment and the best photoresist to match process requirements it is necessary to characterize the lithography process set up. The most used method to define the best lithography process conditions and to evaluate the lithography process window is the Focus Expo Matrix (FEM) evaluation. The FEM is obtained performing the exposure step on a coated wafer, using a stepper exposure tool, varying the exposure dose and focus value at each exposure step. A CD* measurement is performed on Scanning Electronic Microscope (SEM) for each couple of dose and focus. With this method it is possible to evaluate the CD and photoresist profile variation in function of exposure dose and focus value. In a graph, called Bossung plot, CD measurements are reported for each exposure dose explored in function of focus values. Bossung plot is a powerful method for lithography process window evaluation. => LIFT OFF APPROACH: is used in cases in which we can’t etch easily, we take off part of the material on top of the photoresist Techniques: We have different types of techniques used to form the THIN FILM on our substrate, this techniques are used in different cases depending on the application => all these processes take place before the preparation of the surface of which we talked about during the lithography, first we deposit the layer of film then we use lithography & etching to obtain our structure of the layer we are working on this happens for every layer => depending on the function of each layer we use a different material and deposition process THERMAL OXIDATION: SiO2 (silicon dioxide) is used for its Dielectric properties to separate the starting Silicon substrate from the other conductive layers. => Thermal Oxidation of silicon is the formation of Silicon Dioxide (SiO2) starting from bulk Silicon in oxidizing ambient (O2 , H2O) in microelectronics thermal dioxide is used and can range from 1um => already at room temperature a native oxide of approximately 10nm => THERMAL OXIDATION IS A CONVERSION OF Si INTO SiO2 IT IS NOT A DEPOSITION => the oxidation proceeds by the diffusion of oxidizing species through the oxide to the Si-SiO2 interface where the reaction occurs => the reaction can be of 2 different types: DRY REACTION or WET REACTION => for the growth of an oxide of thickness d a layer X of silicon with a thickness 0.44 is consumed => we can predict the thickness of our thermal oxidation layer through the “DEAL AND GROOVE’S MODEL” => the diffusion process is very fast, we can obtain a curve that describes the thickness of the oxidation depending on time, the oxide grow rate is not linear with time the oxidation rate slows down with the thickness grow ( is more difficult to reach the correct interface for the reaction to happen) => the OXIDATION RATE depends on TEMPERATURE & OXIDATION KINETICS => wet oxidation is faster than the dry one ( one order of magnitude of difference for the case at T=900°) => temperature is the MAIN PARAMETER to speed up the oxidation grow rate HARDWARE: to obtain this process we use a tool that is a VERTICAL FURNACE that can process more than 150 wafer at the time => the gases are introduced by a tube at the top of the furnace through a quartz tube (?), the temperature is obtained through a system of HEATING ELEMENTS that make sure we obtain an omogenee temperature in the entire system => in these machine the wafer are put in a Si CARBIDE BOAT there is also a PUMP that pumps continuously the non reacted gases into the exhausted => the reaction happens on all the exposed surfaces of the substrate if we don’t want the oxide in some parts we can add a step of the process chain in which we remove the oxide => changing the process parameters we can obtain different materials that are used in different applications => THERMAL SILICON DIOXIDE it’s better in some cases than the one obtained with deposition because this second type generates a less strong bounding between the two materials and a more defective layer CHEMICAL VAPOR DEPOSITION (CVD): the gases are introduced into the deposition chamber, reacting to and form a film on the surface of the substrate, the simplest CVD process uses an atmospheric deposition chamber but we have also the low pressure case => the steps involved in the CVD are: transportation of reactant by forced convection to the deposition region S Transport of reactant by diffusion from the main gas stream through the boundary layer to the wafer surface; Most important to determine r Adsorption of reactants on the wafer surface Theovere la Surface processes: Chemical decomposition, Surface migration to attachment sites, Site incorporation, Other; race Desorption of byproducts; Transport of byproducts through the boundary layer Transport of byproducts by forced convection away from deposition region We have 2 different phenomenon that compete for the deposition: 1) DIFFUSIN to precursors from the gas to the wafer surface, 2) REACTION RATE of precursors or the wafer surface We can obtain a graph of the growth velocity over the 1/T in a logarithmic scale => The Net growth velocity is result of the surface reaction and gas-phase mass transfer processes acting in series so that the slower of the two dominates at any temperature. => The variability in the boundary layer thickness and transport through that layer would result in nonuniformity layer. Operating in the surface reaction limited regime where transport is not important would avoid these problems. => 1) this can be achieved by going to a lower T but the deposition rate can decrease significantly 2) Lowering the total pressure of the gas stream increase the diffusion and extends the reaction-controlled regime to higher T; 3) We can recall the CVD deposition rate: 𝜐 =(𝑘𝑠∗ℎ𝐺/𝑘𝑠+ℎ𝐺)∗(𝐶𝑇/𝑁)∗ 𝑌 , where 𝑘𝑠 is the surface reaction coeff. and ℎ𝐺 is the mass transfer coeff. (?) HARDWARE: is very similar to the one thermal oxidation process => wee have injectors that distribute the gases are introduced, another difference is the fact that the BOAT CAN ROTATE because the injectors are fixed and to obtain a constant flow for all the wafers we rotate the boat LOW PRESSURE CHEMICAL VAPOR DEPOSITION (LPCVD): the deposition can be done using different types of gases that obtain different properties and characteristics of the layer => TEOS(=tetraethly orthosilicate) with this material we can obtain a good uniformity in the thickness of the layer also in the case of an already worked surface (so also on peaks and valleys) => the deposition of this material can occur through the LCVD process at higher T or through a PECVD that occurs at lower T => this material is used as SACRIFICIAL OXIDE or DIELECTRIC LAYER => SILICON NITRATE: this material permits to have a high conformality of the film, good thermal stability and a lower percentage of residual hydrogen incorporated inside the layer respect to PECVD => also the deposition of this material can both happen through LPCVD or PECVD => this material is a DIELECTRIC LAYER used for oxygen diffusion, barrier against water, as passivation => POLYSILICON: can be obtained both with LPCVD (lower T) or growth by EPITAXY (higher T), also this material for the LCVD deposition method gives a high conformal film and a good thermal stability => with this material we are depositing a crystal with periodic orientation of grains (=portion of the crystalline structure is the same) => polysilicon is a CONDUCTIVE MATERIAL that is used for electric connections or as the electrode of a capacitor => CRYSTALLINE SILICON is a semiconductor that has a band gap, this gap is too high to allow electrons conduction at room temperature => PolySi can be DOPED with P- or N-TYPE: (1) P-type: an acceptor is a dopant atom that when substituted into a semiconductor lattice forms a p-type region. When boron substitutes a silicon atom in a crystal lattice, its three valence electrons form covalent bonds with three silicon neighbors, leaving one bond unsatisfied. At room temperature, an electron from a neighboring bond can fill the unsatisfied bond, creating an electron hole. This hole, being positively charged, attracts another electron, causing the hole to move through the crystal as a charge carrier.This movement can sustain an electric current, useful in electronic circuits. (2) N-type: a donor is a dopant atom that, when added to a semiconductor, can form a n-type region.When substituting a Si atom in the crystal lattice, four of the valence electrons of phosphorus form covalent bonds with the neighbouring Si atoms but the fifth one remains weakly bonded. If that electron is liberated, the initially electro-neutral donor becomes positively charged. At room temperature, the liberated electron can move around the Si crystal and carry a current, thus acting as a charge carrier. => PolySi is typically in-situ doped with BORON or PHOSPHORUS (in MEMS we use Phosphorus that has one more valence electron than silicon that can easily move to the conduction band) => we can monitor the amount of dopants inside the polysilicon => the bottom electrode of the gyroscope is made by a LPCVD polysilicon 1um layer VAPOR PHASE EPITAXY: epitaxy describes an ordered crystalline growth on a single crystal substrate, Epitaxial growth is the deposition of a monocrystalline layer of a given atomic species on a substrate of the same or a different material, but similar from a crystallographic point of view. => vapor phase epitaxy is a part of the CVD DEPOSITION, this happens at HIGH TEMPERATURE (900-1200°C) or sub-atmospheric pressure, at this high T the absorbed Si atoms have high mobility on the surface and can replicate the starting substrate lattice => DEPENDING ON THE T WE CHOOSE THE REAGENT => we use epitaxy because guaranties: a precise doping in a wide resistivity range, better crystallographic quality than the starting substrate, fabrication of P/N junction with dopants, great purity (=low O2 content) => if our starting substrate is monocrystalline silicon, polycrystalline silicon can be grown => the main difference between Epi-poly and LPCVD poly are: 1) Epi-poly has a higher growth rate, 2) Epi-poly grains have a columnar structure instead of small grains HARDWARE: for epitaxy we use chambers in which we can process one (in some particular case 2) wafer at time, in these tools the wafer is inserted horizontally, the heating is obtained through the Use of high power lamps or inductive coupling, the gases flow horizontally and Are diluted in H2, the temperatures reached are quite high T= 850-1200°C To avoid the excessive heating of the walls and the deposit of material the walls of the QUARZ CHAMBER must be TRANSPARENT IN A WIDE RANGE OF WAVELENGTHS, in the chamber the susceptor rotates to have a uniform Growth and uniform resistivity on the wafer, it’s also very important to have a TEMPERATURE UNIFORMITY into the chamber during the growing deposition step to avoid crystal defectivity => we can modulate the parameters of the process to obtain materials with a specific properties needed for some particular applications => in gyroscopes we use this process to obtain the sensor part (free mass and springs), we use this process because the layer is quite high (30um) another important parameter is the Epi-Poly residual stresses => PRESSURE SENSOR: the membrane is able to feel the outside pressure thanks to the cavity underneath => to obtain this cavity we grow using epitaxy pillars and than a roof on top of them then with a process of H2 ANEALING we make the silicon migrate the silicon from the pillars to the top or bottom of the cavity making the pillars disappear => in many cases we need to separate the substrate from the other layers through an isolation layer we risk to have the substrate collaborating with the other parts and this can be a problem => THE SUBSTRATE IS A BASE ON WHICH WE CREATE OUR DEVICES (FOUNDATION) in some particular cases we could not need the substrate so it will be removed after the generation of the entire structure on top of it PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION FOR DIELECTRIC: is a method used to deposit vapor at lower T than the thermal CVD, this method is compatible with restrictions on the temperature that the substrate can be exposed to, compared to CVD at lower temperatures we can see that the growth velocity is higher and the film quality is better, and also the film properties are a function of temperature => PLASMA is generated by applying a potential difference between parallel plate electrodes in a low-pressure gas ambient, the plasma contains neutrals and roughly equal n° of positive ions and free electrons and it’s a CONDUCTIVE MEDIUM => the upper electrode is called SHOWERHEAD and from this the gases exit while the Bottom electrode is grounded and is where the wafer is positioned => between these two electrodes the spacing could be variable, the showerhead is usually cooled through the use of water => the showerhead delivers the gases through the Radio Frequency (RF) power supply, the choice of plasma excitation frequency can be high/low/mixed frequency => this system is designed to have a uniform distribution into the chamber The typical deposition T is in the range 100-400°C => the tool used can be made to load single or multiple wafers => BULK REGION is that area in which the plasma is a good conductor, however the regions near the electrodes are of limited conductivity => the voltage drop at the electrodes depends on the relativity surface of the area of the electrodes ( ?) => as a general statement we can say that the low frequency gives more ion bombardment as a consequence we have: more compressive stresses, higher film density, potential damage to sensitive devices => the steps of the process are the following: => in some applications could be important to have a CONFORMAL STEP COVERAGE all over the geometry of the layer (also on the vertical sides of the steps the thickness must be uniform) => STICKING COEFFICIENT: is defined as the ratio of the n° of species that stay on the surface relative to the n° of incident species (0 < Sc < 1) => to achieve a conformal deposition the sticking probability should be small => the species that do not stick may deposit elsewhere after bouncing around => depending on the material chosen we have different techniques that can be used to deposit it and we will get different characteristics of the layer RESIDUAL STRESSES: is defined as the existence of a state of stress in a material without being externally applied any forces. According to the atoms per unit volume and forces affecting bond lengths, stress can be defined as COMPRESSIVE or TENSILE. => it’s important to account for the residual stresses of the material in the MEMS design and manufacturing => because for this reason some parts could band and change their shape, this would cause the sensor to detect values that are distorted because the design needed a planar part to work correctly => we can easily tune the properties of the materials => films are mostly not perfectly stoichiometric => possible incorporation of byproducts => not all the combinations of gas precursors are possible, the choice of the gas precursors is important and has a crucial role, the choice depends also on the application of the device => SILICON OXIDE (USG): USG stands for Undoped Silicon/Silicate Glass, and it usually refers to SiOx layers deposited with silane (SiH4) as gas source for silicon => silane can be supplied as either pure or diluted, typical carrier/dilution gases are Ar, He, N2 => film stresses in this case typically range from compressive to neutrals => USG is used to typically to cover planar surfaces, sloped surfaces or low aspect ratio trenches => SILICON OXIDE (TEOS): TEOS (Si(OC2H5)4) is a relatively inert liquid at Room Temperature. A delivery system (boiler, bubbler, or injection systems) is used to send TEOS vapor to process chamber. Gas such as N2, Ar or He are usually used as carriers of the vapor => in this case the stresses typically range from compressive to tensile => TEOS-based SiOx is used for more demanding coverage applications => SILICON NITRIDE: Silicon Nitride provides excellent scratch protection, serves as a moisture barrier, and prevents sodium diffusion => it is usually used as the encapsulating material for final passivation of the device => in this case the film stresses range from compressive to tensile (it is a function of process parameters, it is also affected by moisture exposure and temperature cycling, hydrogen content and the amount of stress in the film are closely correlated => to tune the stresses in this case we have different possibilities: 1. addition of low frequency power => requires additional hardware and it is not sustainable if sensitive devices are present 2. Addition of helium to standard gas mixture => helium increases the incorporation of N bond in the film, this results in a compressive stress due to volume expansions of the SiN layer PECVD IN PROCESS FLOW (ThELMA PLATFORM): 1) sacrificial layer because in some part it will be later removed to make the MEMS masses movable, it’s deposited using PECVD with TEOS 2) hard mask layer is used as a protection for underneath layers during etching => in PECVD if we want to obtain the film on both sides we need to repeat the process 2 times one for each surface because the deposition of the film happens only on the exposed surfaces, so one at the time because the wafer is on one side in contact with the electrode PVD TECHNOLOGY: PVD= physical vapor deposition, it groups all the deposition methods that are used in vacuum to generate THIN ULTRA PURE FILMS AND COATING PVD is characterized by a process in which the material goes from a condensed phase to a “vapor phase” and then back to a thin film condensed phase => the advantages of the SPUTTERING are: deposition on cluster tool: in situ surface preparation and stacked film deposition, deposition of all metal layers including refractory materials, deposition of alloy with high composition control and reactive deposition, deposition of dielectric film as piezoelectric materials => to obtain this deposition we use a chamber that is vacuumed at very high level, in this system we have the ejection of atoms from a high purity target, the sputtered atoms are transported to the substrate to form a thin layer => to improve the sputter process efficiency we use ROTATING MAGNETS Above the target that induce a magnetic field that confine the plasma near the target => the wafer is positioned on the PEDESTAL and the TARGET is on top and is bigger than the actual wafer (this is the part of pure material, 99/99,5%, where the atoms are extracted) => if we remove the target we can see the design in which are positioned the magnets, their organization and rotating speed depends on the material to deposit, behind the target there is also a WATER COOLING SYSTEM => from the used target we can see that the erosion is not uniform => Metal stack film properties are defined by deposition process condition sputter power, pressure, temperature => the main film properties are: sheet resistance, grain size, stress, surface roughness, adhesion on substrate => deposition rate is a key parameter for sputter process, in defining the parameters we need to find a tread off between film quality and deposition rate => a DOWNSIDE of this process is that we have a poor film conformity due to the directional deposition (this causes the thickness of the layer to become thinner on the structure sides) => to improve this problem we can increase the T or use a cold/hot deposition sequence => HARDWARE: the front panel that is visible in the clean room is quite easy (monitor and loading part) => the entire system is behind and is quite complex => Degas step is used to remove from wafer surface adsorbed species and avoid degassing during the deposition step => Cooldown step allow the cooling of the wafer before the unloading on cassette to avoid wafer sticking on carrier/ risk for operators => for sputter deposition is mandatory to clean the interface removing native oxides and allow low contact resistance => temperature is very important parameter and to obtain a uniform heating of the wafer we have different options: 1) the wafer can be clamped to the chamber a con of this technique is that the deposition is not uniform in fact on the edge there is no deposition 2) the wafer is fixed by using an electrostatic chuck to guarantee the correct thermal coupling => in these machine there is a process kit that is a metallic chamber cover that is replaced at every preventive maintenance to avoid flaking => film stress control is one of the most challenging parameters for MEMS device functionality => in case of metal we could change the parameters but this could also cause the change of some important properties of the film we need to choose which problem is the least problematic one => the only film that we can tune to stresses are piezoelectric materials Ge DEPOSITION FOR Al-Ge BONDING: In MEMS device is widely used Al-Ge eutectic bonding for device fabbrication allowing permanent wafer to wafer bonding => Ge layer is deposited on the cap wafer and AlCu stack is deposited and patterned on the sensor wafer then by eutectic bonding process (at high T) Ge-AlCu intermixing is promoted Ge DEPOSITION: Even if Ge is semiconductor material, it’s not required a dedicated hardware for PVD deposition Deposition criticality is maily related to fragility of the target and the high risk of cracking, Dedicated process set-up and chamber management has to be set-up in order to have a manufacturable process GETTER DEPOSITION: this is a layer used to decrease the pressure inside cavities, this material can absorb gases of the environment, the getter layer is deposited using PVD, this layer is a solid material (Zinc-Co based alloyed) chemically active that can absorb reactive gases species from the surrounding environment => a thermal activation of gather is required => Deposition process is optimized in order to guarantee a columnar growing of the film in order to maximize active area Etching processes: => we are still in the FRONT END MANUFACTURING part ETCH= is a process in which we transfer a pattern on the wafer in a permanent way => to see these patterns we need to use a scanning electron microscope => in the device each layer has a PRECISE FUNCTION in the working principle (in some cases there are also layers that are deposited to be removed after => the process chain is the following: LAYER DEPOSITION, PHOTOLITHOGRAPY, ETCHING & MASK REMOVAL => in etching we are transferring a pattern that we printed with the photolithograpy in a permanent way => we start with the substrate without anything on top we then deposit a film and put on top the photoresist that gets exposed and developed we then transfer the mask pattern on the layer using the ETCHING PROCESS at the end we remove the photoresist, in each device we have plenty of layers all generated with this process flow even if each layer has it’s own pattern and mask => we have some important parameters that can be defined as the table shows: => theoretically the etch should finish where the thin film deposited ends but in reality we etch slightly also the substrate this happens because the photoresist during the etch process gets consumed a little bit so we can end up having the OVERETCHING PHENOMENON => for this reason we are interested in SELECTIVITY because we want the photoresist to be consumed slowly and the layer quickly => we are interested in the ANISOTROPY of the process because when we transfer a layer we want to obtain the exact width of our pattern but if the reaction is ISOTROPIC ETCH in the end we will get a dimension that is larger this won’t happen in the case of an ANISOTROPIC ETCHING => we need to control and measure every value to see if everything worked as wanted => there are 2 ways to etch: 1) DRY ETCH; 2) WET ETCH DRY APPROACH: with this method wee can transfer in a good way the geometry but the tools used are very expensive, in this method we use PLASMA to remove the material => PLASMA is an IONISED GAS, we can reach plasma from a solid by increasing the energy in the structure => plasma emits light, PLASMA IS AN INERT GAS but can react very well when we apply an electric field, in this kind of process the main responsible for the etching process are the electrons => in the plasma there are REACTIVE SPECIES that are absorbed by the surface and the BY-PRODUCTS are emitted and then pumped away from the system => on the surface of the wafer during the etching we have: a CHEMICAL ETCH, PHYSICAL ETCH (bombarding of the material), chemical etch enhanced by ion bombarding => in principle the process that generates the etch is the chemical etch but we can see that through the use of both processes chemical etch and bombarding of the surface the etch rate grows a lot respect the case of only chemical or physical etch => ion bombardement is important because if we didn’t have it we would have a ISOTROPIC reaction but with the ion bombardement we get a SLIGHTLY ANISOTROPIC ETCH => when we need to etch a vertical surface we use a PASSIVATION LAYER on the sides to be able to protect the sidewalls from the chemical etch => when we etch a layer we need to find the correct gases for the plasma in order to obtain the etch, during the choice of the gases we need to keep in mind that the by-products will be then pumped away in a gas phase => the PUMPING SYSTEM keeps the pressure constant and takes away the byproducts => the plasma changes during the process because at the start we don’t have any byproducts then the amount of these gases increases at the end of the etching process the amount of byproducts goes to zero and the amount of chemicals increases a lot because there is no more material to consume => by looking at the light emitted by the plasma with a SPECTROMETER we can understand how the etch is proceeding because we have that at each species is associated a wavelength and by observing which species we have and in which amount we can understand which phase of the etch is taking place PLASMA CHAMBER: is a kind of box in which inside we have 2 ELECTRODES one on which the wafer is placed and another from which the strike of electrons comes => the entire etching process is made in vacuum => the design of the chamber is important to optimize the process MAIN ISSUES OF PLASMA ETCH: 1. we need to keep in mind the type of profile we need to obtain 2. We need to analyze the type of film and mask 3. The uniformity of the surface is important because the plasma is sensible to the geometry ( ?) 4. The surface quality is important because in some cases if we use plasma could cause damages WET APPROACH: WET PROCESSES: the wafer is in contact with a liquid => we can obtain this with an IMMERSION TOOL (after this process the wafer are dipped into another tank in which we rinse it) or through a SPRAY TOOL where the chemicals are sprayed on the wafer that spins => we can choose one method or the other depending on the needs SURFACE CLEANING: these are mainly processes done to REMOVE CONTAMINATIONS present on the wafer surface this contaminants can come from the human body, other chemicals,… => if we don’t clean the surface the presence of contaminations can have an impact on the FILM DEPOSITION, WETABILITY OF THE SURFACE & THERMAL TREATMENT => some contaminants are METAL CONTAMINANTS usually the these are devided into 3 groups and we need to remove all 3 to do that we follow 5 steps: 1) STANDARD CLEANING 1 (SC1)=> per togliere i contaminanti organici 2) RINSE 3) STANDARD CLEANING 2 (SC2)=> per togliere i contaminanti metallici 4) RINSE 5) DRY => after this steps the wafer is now ready for the other processes WET ETCH: when we define a dimension with the mask we want to obtain it on the film => is an ISOTROPIC PROCESS This process is used for a SOFT LANDING ON the substrate => BLANKET SILICON OXIDE ETCH: the higher will be the concentration of HF the higher will be the etch rate, this method is also very selective on silicon and is stable and uniform => in this type of process the photoresist masks are not suitable due to the low pH levels BUFFED OXIDE ETCH is a good compromise because has a lower acid concentration so a lower etch rate but also a good selectivity on the photoresist => in this method we can also change a bit the T and other parameters in order to increase the etch rate => the chemical etch has a etch rate that theoretically is the same in all directions but in reality some bad adhesion of the resist and infiltration can cause the rate on the horizontal direction to be greater this means that the CD increases a lot respect the one we wanted ALUMINIUM WET ETCH: we use it in the case we need a very sloped profile => AlCu has a etch rate that is much higher than the one of Al => in some cases we could need to have sloped profiles when we deposit on top of Al a dielectric that would break and crack if placed on top of a steep profile SILICON WET ETCH: is the only wet etch that is anisotropic, the etch rate depends strongly on the crystallographic planes, if we play with the concentrations and the temperature we can start from a shape and end up with another, so shapes can be modulated by process T and concentrations => we can play with the solution to obtain different etch shapes on the same wafer LIFT OFF: if a layer is hard to be etched both with the dry and wet methods => we use a NEGATIVE PHOTORESIST and then deposit on the material that will be both on the photoresist and substrate, on the bottom of the sidewalls there will be small cracks where the develop will enter to remove the photoresist and the material on top of it to leave us with the pattern that we wanted => the immersion time must be very long to permit ti the solution to erode the entire photoresist, another important thing is that the solvent must be choose to not be aggressive towards the substrate RESIST REMOVAL: the photoresist removal after the wet etch is quite easy because the photoresist is not damaged, in this case is usually removed through the use of acid or solvents, in the case of the dry etch the resist is left with sputtered residues also on the sidewalls => the removal can be done with te use of a DRY PROCESS using oxygen plasma => the removal can be done with the use of a WET PROCESS using sulfuric acid solution that is very aggressive towards the resist => post etch residues after plasma etch: after the resist is removed there can still be some residues that simply fall on the film etched (ex: the passivation used to preserve the vertical surfaces) to remove them we use a acid based solvent that takes the residues away => we need to be sure that during the removal steps all the photoresist has been taken away to be sure that it doesn’t act as a mask in the following deposition ELECTROCHEMICAL DEPOSITION (ECD): we deposit a metal through a solution, the metal gets deposited on the surface from a solution on the wafer => the tools used for this process in the clear room are very big and complex there is a liquid recirculating and an anode inside on the cathode is placed the wafer that is placed upside down (this process is done after the lithography)=> through the use of this method we can obtain very THICK LAYERS OF MATERIAL and in some cases is also cheaper than sputtering, we can also get many different shapes of profile => we can play with metal stacks and it can also be used to bond 2 wafers together => the material grows between the photoresist parts Bonding process: This process is part of the FRONT END MANUFACTURING is a very peculiar step done for MEMS because in this type of systems we need to create a housing for the device and in this house we need specific conditions => we will have a SENSOR WAFER & CAP WAFER this 2 are kept together through a glass frit or other types of bonding materials We can divide the bonding in 2 families: 1) TEMPORARY BONDING, 2) PERMANENT BONDING this second family can be divided in 2 groups: without an intermediate layer and with intermediate layer GLASS FRIT BONDING: glass frit is a mixture of a lot of different things with a solvent that makes a paste like consistency, this paste will be applied where needed then cooked, to make the solvent evaporate, to be ready for the bonding fase => we could have in some cases the LEAD PARTECIPATION to avoid it we use a silicon dioxide in between the wafer and the paste SCREEN PRINTING: to apply the mask we use a stencil, the glass frit paste is deposited onto a STENCIL and a SQUEEGEE (=spatula) that travels on the surface squeezes the paste through the stencil apertures and onto the substrate => the stencil is a stainless steel mesh which is covered with photosensitive polymer that gets exposed and then the exposed polymer is developed to obtain the shape we want on the mask After the deposition on the wafer the paste it’s not ready for the bonding yet because it needs to be Heated through 3 steps: SOLVENT OUTGASSING, BINDER BURN OUT & GLAZING => the limits of this technique are the dimensions of the paste lines because they are quite big, the smallest dimensions we can get are 80-120 um which can be obtained through the use of quite expensive devices BONDING: we put the wafer in the bonding machine that heats the wafer, the critical parameter of the bonding phase is the TEMPERATURE, another important parameter is the PRESSURE measured in millibar => when the paste wets the surface the bonding with the silicon happens => STICKTION PROBLEM: in our devices we have some moving parts in some cases this could get really close to the fixed ones and get stacked we say that we are in sticktion, this problem could be temporary or permanent => we don’t want this to happen, we can observe that with the growth of the pressure used for the bonding phase the yield loss percentage increases (we get less defective devices) => the GETTER is an alloy that can absorb all gases except for the nobel ones, when we want to obtain a certain pressure on our device we use this material because if the type and quantity of the gases used in the bonding chamber is known we can obtain easily the pressure we will get inside the device => when we heat the wafer the getter absorbs the gases except for the nobel ones and we are left with a cavity in which there are only the nobel gas, this means a lower pressure that the one imposed at the start => with this method we can also obtain on a same wafer and with the same pressure set-point devices with different pressures inside (EX: we put the getter where we want the lower pressure => in the combo the gyro needs a lower pressure than the accelerometer and we can lower the pressure in the gyro to be sure that it always moves and measures the right accelerations, if we increase the pressure the devices tend to move slower) => if there weren’t the nobel gases it would be difficult to control the pressure after the bonding phase => the mixture of gases used in the bonding phase for the combo it was lowered from 1%Ar to 0,15%Ar this caused the need to change the pressure used in the bonding phase, and this change caused an increase of the Q-factor of the gyro and decrease of the Q-factor in the accelerometer obtaining a BETTER PERFORMANCE => the new total pressure inside the gyroscope is 0.3 mbar Ar while the on in the accelerometer is 200 mbar the delta is bigger than before Q-FACTOR: is a parameter that measures how much the device is damped => higher Q-factor higher damping => to see what was the quantity of gases that the getter was able to absorb it was done a study in which some wafers’ area was covered in different % with getter and then they were used to see where the getter wold saturate => we obtained that at 25% getter area doesn’t sustain 300 mbar bonding pressure set-point => SAFE SET-POINT= 200 mbar for 0,15% Ar/n2 at 25% getter area doesn’t sustain 300 mbar bonding pressure set-point => SAFE SET-POINT= 200 mbar for 0,15% Ar/n2 mixture => the area of the getter plays the main role in the ability to absorb the gases, changing the thickness doesn’t change the absorption ability of the getter => in the glass frit used for bonding there is LEAD which is a polluting substance, for this reason lately the industry tried to move to more sustainable alternatives, creating an option without lead => changing the paste it’s quite easy what is more difficult is what changes in the process cause in a more general point of view => changes imply a process set-up phase in which we need to check if the same parameter that were used before are still ok and also if the devices still work in the same way and have the same characteristics (don’t rip apart) METALLIC BONDING: the bonding can be done with the use of a metal layer that gets etched where we don’t need it, by using this technique we can save a lot of space in our devices => going from a glass frit to a metal bonding we have ~25% REDUCTION OF THE DIE SIZE => AlGe: these 2 materials really like each other and when during th bonding process they go from the liquid to the solid phase we get in our bonding both phases of the material (alpha solid and solid eutectic) => in this case surface preparation is a critical step because we need to get rid of all the oxides to be able to use this method, to do that we use gases => we then put in contact the 2 materials at a p > 15MPa to achieve intimate contact BONDING PROCESS CONTROL: (process control can be done by the R&D or also in production) the bonding process is quite difficult to control because is a MUTE PROCESS it doesn’t tell much so we don’t have many parameters to tell us if everything is going smoothly but we can do IN LINE CONTROLS: MECHANICAL CHARACTERIZATION: SHEAR TEST=> we apply a shear force through a tip on the cap and measure the force needed to separate the cap wafer from the base, this test can be done for many different conditions of the bonding => we can also see where the bonding is stronger and if it rips apart in an omogeneus way or not PULL TEST => instead of applying a shear foce we apply a pull force to the cap, also in this case we can do the check for different kind of materials and see which one is better: we obtain that in the case of glass frit the worst case is for silicon silicon bonding ()MASZARA TEST => is a way to measure the adhesion force between 2 wafers by applying between the 2 pats a blade ? PROCESS TELEMETRY => the information collected from the machines can be also used to monitor the processes WAFER TO WAFER ALIGNMENT: it can be done in 2 different ways => SCALING: is when the wafers can be aligned in the center but not in the sides; WARPAGE=> has an impact in the workability of the wafer stack shape (?) SAM INSPECTION: (SAM=scanning acoustic microscopy) works in the same way of ECOGRAPHY in the medical field, it’s used a coupling medium (water) to couple the scanning part and the device, this method is used to find voids in the bonding of the devices, if they are present this means that the bonding didn’t happen in the right way in some points => the results obtained are analyzed by a software called WADI SOFTWARE that generate a map of the defective dies so that the machines know which ones need to be scrapped away => THIS TECHNIQUE IS USED FOR CHECKS ON GLASS FRIT IR INSPECTION: an IR microscope (because silicon is transparent to IR) is used to observe the devices and thanks to the reflections of the bonding metal we can understand if the dies are defective or not => the EVALUATION CRITERIA depend strongly on the type of metal we are observing and they are not easy to define at all => there is a software that evaluates the observations => THIS METHOD IS USED FOR METAL BONDING EQUIPMENT: for bonding we usually have different modules => there is always an aligner and then we have different bonding chambers => we have BOND TOOLS where the wafer that needs to be bounded is aligned with it’s cap => when the alignement is found the 2 wafers are clamped in position and separated by a FLAG that is needed to have the evacuation of the gases Deep silicon etch: => is part of the FRONT END MANUFACTURING, is a particular technique that was developed for MEMS due to the need of a certain depth of the etched part => at the beginning we could etch only up to a few micrometers nowadays we can etch up to 400um => in this process we can have to etch 2 different types of wafers: BULK WAFER = the entire height of the wafer is silicon, they usually have a thickness of 725um SILICON ON INSULATOR (SOI) = is a wafer with a silicon base then a oxide layer called BURIED OXIDE and on top of it another silicon film => in the case of the SOI the etch goes on until it reaches the buried oxide layer, while for BULK WAFERS the etch can go on for the entire height of the wafer, in a more general definition we can decide when the etches finishes In many cases when we need to etch the entire depth of the wafer we complete the process through 2 etch steps one from the top and then the last part is done starting from the bottom (on both sides we will have a resist mask) => when we complete an etch that goes through the entire thickness of the wafer this will become much more fragile than before => with this method we can also etch through 2 already bonded wafers, the complexity is due to the fact that inside the 2 wafers are already defined some geometries => this technique is used in the production of: MICROPHONES: in which we etch from one side only and land on a membrane of a different material (there the etch will stop because there is no more silicon) that will then vibrate when it interacts with sound waves AUTOFOCUS APPLICATION: also in this case there is a deep etch will lend on a membrane of another material that will act as a lens EXPOSITION OF Al PADS: this technique is used to expose the aluminium pads used to connect the wires of the electric circuit, in this case the etch will involve 2 wafers already bonded PIEZO INKJET PRINTHEAD: this is the etch of 3 bonded wafer to generate a circuit for the fluid to flow through INSULINE MICROPUMP: also this etches through 3 bounded wafers to generate a circuit for insuline to flow through MIRRORS APPLICATION: under the mirrors we need to have a cavity to let the mirrors move so that they can reflect the light => a difficulty of this etch is to not ruin the mirror at the bottom For this type of process we use DRY ETCH, the choice was driven by the fact that the plasma etch is anisotropic and almost an ideal etch, therefore we can have cavity that has the same dimensions as the ones decided on the mask => with this type of etch we can TRANSFER A DIMENSION IN THE DEPTH OF THE ETCH also in the case of big depth => in the chamber we need to have the correct type of gases for the etch and then an electrode from which the PLASMA STRIKES and a system that accelerates the plasma towards the wafer => we need 2 generators to generate this dry etch a first one to SWITCH ON THE PLASMA far away from the wafer (top generator, the anode for this system is the plasma), a second one to ACCELERATE IN A CONTROLLED WAY THE PLASMA TOWARDS THE WAFER (bottom generator) we use this type of system to be able to switch the plasma on easily and quickly avoiding to stick to limitations due to the direct connection to the wafer (we can use a high power in the top system and lower in the bottom one) => the 2 systems are decoupled To obtain this kind of etch we could use: CHLORINE, a downside is that it gives a poor etch rate, BROMINE, this has lower etch rates than the chlorine, to obtain a high etch rate we tend to use FLORINE even if it gives a purely isotropic etch and generates heat at the wafer surface => to solve this and obtain an anisotropic etch we have 2 different options: the first one (CRYOGENIC) implies teh cool down of the wafer to -110°C using liquid nitrogen through this process we slow down the part of the reaction that generates the isotropic behavior but this method requires very expensive tools that are not very reliable for a production of a high number of wafers, the second technique called BOSH maintains the wafer at room temperature and uses SF6 plasma for the etch and C4F8 that is used to as a passivation layer to protect the sidewalls BOSH PROCESS: this process is divided into 3 steps => a) PASSIVATION STEP: the passivation layer used to protect the sidewalls is deposited on all surfaces covering also the mask; b) PASSIVATION REMOVAL STEP: the passivation layer is preferentially removed from the bottom of the structure; c) ETCHING STEP: the silicon is removed from the bottom and the isotropic nature of the reaction is revealed through the sidewalls roughness => these three steps are repeated in a loop to obtain the wanted depth in this process we through this loop sequence we expose the material to the Florine only for a small period of time thanks to this fast exposure we reduce the isotropic effect, this will result much less visible in comparison to the case in which we obtain the entire depth of the etch through a classical dry etch process => using this method makes possible to TRANSFER THE CD ALONG THE DEPTH OF THE CAVITY => in this type of process the machine needs to change 3 plasma (deposition of the polymer layer, removal of part of the polymer and etch) multiple times during the entire etch process => the passivation layer remains on the sidewalls until teh end of the process and it will be later removed through a wet chemical removal process => when the polymer is removed from the bottom of the cavity it’s also removed from the top surface of the wafer and partially removed also on the sidewalls, this way we don’t have the accumulation of the polymer (we always have to be sure the polymer it doesn’t get totally removed from the sidewalls because this would cause defects in the etch, for example holes on the sidewalls) => in this type of etch we can use as a mask a PHOTORESIST, or in some cases are also used OXIDE & NITRATE, usually when the photoresist is too weak to resist the entire etch process) => important parameters of the deep etch are temperature and pressure, another important parameter is the DEPOSITION/ETCH RATIO because if we have more etch than deposition the profile will tend to open while if we have more deposition than etch it will close => the ETCH RATIO depends on: shape, dimensions, local density, dependance on the surrounding area and dimensions We will need different set up for different dimensions of the scale => when we have a charge build up the plasma will deviate at the bottom towards the sides and generate a bigger diameter at the bottom of the cavity (NOTCHING EFFECT) HARDWARE: this tools are different from the typical dry etch tools because we need to have: fast gas switching, fast response matching systems, special power supply generators and also the softwares associated must be fast and different from the one used normally for dry etch processes => in general if we use higher parameters we need to switch faster from one step to another (the duration of each cycle, all 3 steps, needs to be lower)