27 Questions
What is the formula for two-level memory EAT (Effective Access Time)?
H x AccessC + (1 – H) x AccessMM
In a system with a main memory access time of 200ns, cache access time of 10ns, and cache hit rate of 99%, what is the Effective Access Time (EAT)?
11ns
What is the purpose of a victim cache in improving cache performance?
To hold blocks that have been evicted recently
What is the function of a trace cache in a computer system?
Holds decoded instructions for program branches
What is the main distinction between inclusive and exclusive caches?
Inclusive caches have the same data at multiple levels, exclusive caches permit only one copy
How do multilevel cache hierarchies contribute to better system performance?
By forming their own small memory hierarchy
Where is Level 1 cache typically situated in a system?
On the processor itself
What are the key variables involved in selecting between inclusive and exclusive caches?
Access time, memory size, circuit complexity
What is a strict inclusive cache guarantee?
All data in a smaller cache exists in the next higher level
How does a victim cache differ from an inclusive cache?
It holds recently evicted blocks; inclusive caches guarantee presence at higher levels
What is the main purpose of cache memory in a computer system?
To store recently used data closer to the CPU for faster access
In a direct mapped cache, how is the cache block that a main memory address maps to determined?
The cache block is determined by taking the main memory address modulo the number of cache blocks
What is the purpose of the offset field in a main memory address for a direct mapped cache?
The offset field is used to identify the specific byte or word within a cache block
What is the key difference between a fully associative cache and a direct mapped cache?
In a fully associative cache, memory blocks can be placed anywhere in the cache, while in a direct mapped cache, they are placed in specific locations based on the address
How does the size of the main memory address and the number of cache blocks determine the size of the block field and tag field in a direct mapped cache?
The size of the block field is determined by the number of cache blocks, and the size of the tag field is determined by the size of the main memory address
What is the purpose of the tag field in a direct mapped cache?
The tag field is used to store additional metadata about the cache block
What is the key advantage of a fully associative cache over a direct mapped cache?
Fully associative caches have a higher cache hit rate
How does the size of the main memory and the number of cache blocks affect the mapping of main memory blocks to cache blocks in a direct mapped cache?
The size of the main memory and the number of cache blocks both determine the mapping in a complex way
Which type of cache mapping requires special, costly hardware to search all tags in parallel?
Fully associative cache
What is the size of each block in the cache described in the text?
8 bytes
What is the size of the memory addresses in the system described in the text?
14 bits
How many blocks are in the cache described in the text?
16
What is the main distinction between direct mapped cache and set associative cache?
Direct mapped cache has a fixed mapping, while set associative cache can map to a subset of cache slots.
What is the purpose of the replacement policy in a fully associative or set associative cache?
To determine which block to evict when a new memory reference needs a block that is already in the cache.
What is the key difference between an optimal replacement policy and a practical replacement policy?
Optimal policy is impossible to implement, while practical policy can be implemented.
Why is the victim block important in a direct mapped cache?
The victim block is the block that is evicted from the cache when a new memory reference needs that block.
What is the purpose of a set associative cache?
To combine the benefits of a direct mapped cache and a fully associative cache.
Study Notes
Types of Memory
- Random Access Memory (RAM)
- Read-Only Memory (ROM)
Dynamic RAM (DRAM)
- Consists of capacitors that slowly leak their charge over time
- Must be refreshed every few milliseconds to prevent data loss
- Considered "cheap" due to its simple design
Static RAM (SRAM)
- Consists of circuits similar to the D flip-flop
- Very fast memory that doesn't need to be refreshed like DRAM
- Used to build cache memory, requires very little charge to retain its memory
The Memory Hierarchy
- Organized in a hierarchical fashion to provide the best performance at the lowest cost
- Small, fast storage elements are kept in the CPU
- Larger, slower main memory is accessed through the data bus
- Larger, permanent storage in the form of disk and tape drives is still further from the CPU
Cache Memory
- Speeds up accesses by storing recently used data closer to the CPU
- Smaller than main memory, with access time being a fraction of that of main memory
- Simplest cache mapping scheme is direct mapped cache
- Maps main memory blocks to cache blocks based on memory address
- Mapping depends on:
- Number of bits in the main memory address
- Number of blocks in cache
- Number of addresses (bytes or words) in a block
Direct Mapped Cache
- Consists of N blocks of cache
- Block X of main memory maps to cache block Y = X mod N
- Binary main memory address is partitioned into:
- Offset field: uniquely identifies an address within a specific block
- Block field: selects a unique block of cache
- Tag field: whatever is left over
- Sizes of these fields are determined by characteristics of both memory and cache
Fully Associative Cache
- Places memory blocks anywhere in cache
- Memory address is partitioned into only two fields: tag and offset
- Requires special, costly hardware
Set Associative Cache
- Combines direct mapped cache and fully associative cache
- Memory reference maps to a set of several cache blocks
- Can map only to a subset of cache slots
Replacement Policy
- Evicts a block whenever another memory reference needs that block
- Block that is evicted is the victim block
- Depends on the locality being optimized (e.g. temporal locality)
- Optimal replacement policy looks ahead to see which blocks won't be needed for the longest period of time
- Least Recently Used (LRU) algorithm: keeps track of the last time a block was accessed and evicts the block that has been unused for the longest period of time
- First-In, First-Out (FIFO) policy: evicts the block that has been in the cache the longest
- Random replacement policy: picks a block at random and replaces it with a new block
Effective Access Time (EAT)
- Measures the performance of hierarchical memory
- Weighted average of hit ratio and relative access times of successive levels of memory
- Two-level memory: EAT = H x AccessC + (1 - H) x AccessMM
- H = cache hit rate, AccessC = access times for cache, AccessMM = access times for main memory
Learn about the different types of computer memory including Random Access Memory (RAM) and Read-Only Memory (ROM). Understand the characteristics of Dynamic RAM (DRAM) and Static RAM (SRAM) and how they are used in computing.
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