🎧 New: AI-Generated Podcasts Turn your study notes into engaging audio conversations. Learn more

Loading...
Loading...
Loading...
Loading...
Loading...
Loading...
Loading...

Document Details

DesirousChocolate

Uploaded by DesirousChocolate

Tags

digital electronics logic gates computer architecture

Full Transcript

Homework • Reading – Tokheim, Chapter 3, 4, and 6.1 - 6.3 • Labs – Continue in labs with your assigned section 1 Combining Basic Logic Gates • • • • • • • Decoders Encoders Selectors - Multiplexers ALUs Control Units Buses Simple computers 2 Binary Decoder • Logic with n input lines and 2n o...

Homework • Reading – Tokheim, Chapter 3, 4, and 6.1 - 6.3 • Labs – Continue in labs with your assigned section 1 Combining Basic Logic Gates • • • • • • • Decoders Encoders Selectors - Multiplexers ALUs Control Units Buses Simple computers 2 Binary Decoder • Logic with n input lines and 2n output lines • Only one output is a 1 for any given input n inputs Binary Decoder 2n outputs 3 Building a Binary Decoder • Start with a 2-bit decoder: X0 X1 AND Y0 AND Y1 AND Y2 AND Y3 X0 0 0 1 1 X1 Y 0 Y0=1 1 Y1=1 0 Y2=1 1 Y3=1 Enable 4 Then Add Two to Make Three... X0 X1 X2 2-bit Decoder Y0 Y1 Y2 Y3 NOT 2-bit Decoder Y4 Y5 Y6 Y7 5 Developing an Encoder • If we can decode, then we need to encode • Encode from 1 out of n into a binary weighted form • A keyboard encoder does this X0 X1 X2 X3 X4 ... X7 NC OR Y0 OR Y1 OR Y2 6 Next Comes a Selector • Like a switch; also called a multiplexer or MUX S1 S2 a b c MUX or Selector y d • Again, build it up from simple basic logic gates 7 A 1-bit Selector S1 S2 Decoder a b c d AND AND O R AND y AND 8 A 4-bit Selector S S0 S1 A a0 b0 c0 d0 B Y0 Y1 D S A B Y3 Y C Y2 a3 b3 c3 d3 MUX C D 2 4 4 4 MUX 4 Y 4 9 The ALU Is Next • Logical and arithmetic operations • Variations in – Base • Binary • Decimal • BCD (binary coded decimal) A Control Signals B ALU CCs – Implementation • Serial • Parallel • Pipelined f(A,B) 10 Simple Example - Binary Adder • Develop a half-adder (HA) • Use two HA’s to build a full-adder (FA) 11 The Half-Adder and or not Sum = (a • b) + (a • b ) = (a + b ) • (a + b) Carry = a • b a b a b HA Sum Cout XOR Sum AND Cout a b 0 0 1 1 0 1 0 1 Sum Carry 0 1 1 0 0 0 0 1 12 From HA to FA Truth table for FA a b cin a b b cin Sum 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 0 1 0 1 Cout Sum Full Adder cout Cout Half Adder sum cin a Half Adder XOR Cout 0 1 1 0 1 0 0 1 0 0 0 1 0 1 1 1 Cout Sum 13 Using Full Adders for 2-bit Addition 0 a0 b0 C0 a1 b1 00 + 11 (0) 1 1 Full Adder Full Adder 00 +01 (0) 0 1 Sum0 C0 Sum1 C1 11 11 +01 +1 1 (1) 0 0 (1) 1 0 Note: The carry flag value after the addition represents the N+1 bit value in the result a b Cin Sum0 C0 LSB 0 0 0 1 1 0 1 1 0 0 0 0 0 1 1 0 0 0 0 1 MSBs 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 Cn-1 Sumn Cn 0 0 0 1 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 0 1 1 1 1 14 Using Full Adders for Subtraction Difference = a =a =a =a 1 a0 ~b0 C0 a1 ~b1 (1) 0 0 - 11 01 Full Adder Full Adder 00 +01 (0) 0 1 - b + (-b) + (~b + 1) + ~b + 1 Sum0 C0 Sum1 C1 (0)1 1 -01 10 11 +1 1 (1) 1 0 Note: The carry flag value after the ~ and addition is the opposite of the subtract borrow condition a ~b C0 Sum C1 LSB 0 0 0 1 1 0 1 1 1 1 1 1 1 0 0 1 0 1 1 1 MSBs 0 0 0 0 0 1 0 1 1 0 1 0 1 1 1 1 Cn-1 0 1 0 1 0 1 0 1 0 1 1 0 1 0 0 1 Cn 0 0 0 1 0 1 1 1 15 Configurable Add/Subtract ALU Subtract/Add # From Instruction Decoding Logic (0 for add 1 for subtract) a0 b0 . . . bn-1 Full Adder XOR . . . XOR C0 Cn-2 an-1 . . . Full Adder EFlags Register Sum0 . . . NOR Sumn-1 Cn-1 XOR Zero Flag Sign Flag Overflow Flag = Cn-2*Cn-1# Carry Flag 16

Use Quizgecko on...
Browser
Browser