Mansoura University Assembly Language Lecture Notes (2020-2021) PDF

Mansoura University Faculty of Computers and Information Department of Computer Science First Semester: 2020-2021 [CS214P] Assembly Language Grade: Third Year (Computer Science) Sara El-Metwally, Ph.D. Faculty of Computers and Information, Mansoura Univers...

Mansoura University Faculty of Computers and Information Department of Computer Science First Semester: 2020-2021 [CS214P] Assembly Language Grade: Third Year (Computer Science) Sara El-Metwally, Ph.D. Faculty of Computers and Information, Mansoura University, Egypt.  Addressing Data in Memory o An absolute address: 20-bit value that directly references a specific location in memory. o A segment : offset address, combines the starting address of a segment with an offset value.  Addressing Data in Memory An absolute address 04A27 04A26 -------- 00001 00000 Memory (Stack)  Addressing Data in Memory 04F03 = 04F00 + 0003 04F03 04F02 04F01 Segment offset 04F00 04F00 Segment Segment start address (array) 04C00 04A00  Segments and Addressing Program z = x+y; x=5, y=6; calc(x,y) Instructions Subroutines Data (Functions) Code segment Data segment stack segment  Segments and Addressing 04F03 offset Segment start address Stack 04F02 04F01 04F00 04F00 Segment registers Data 04C00 Code 04A00 Segments and Addressing 04F03 offset SS Stack 04F02 04F01 04F00 04F00 Data 04C00 DS CS Code 04A00  Segments and Addressing o A segment begins on a paragraph boundary, which is an address divisible by decimal 16, or hex 10 (i.e. always the rightmost hex digit is zero). o It is unnecessary to store the zero digit in segment register. o 038E0 H = 038E H= 038E H. o All memory locations within a segment are relative to the segment starting address.  Segments and Addressing Consider DS= 038E(0)H, offset = 0032H What is the actual memory address used by the processor? Data segment start address Offset Actual Address  Segments and Addressing Give me one segment: offset value corresponding to this actual address 28F30H?  Registers Segment Pointer General Purpose Index Flag Registers Registers Registers Registers Register CS, DS, SS, ES SI, DI IP, SP, BP AX, BX, CX, DX  Registers IP: offset address of the next instruction that is to execute. The address used by the processor to locate the instruction will beCS:IP ……. SP: offset address The address used by the processor to locate SS:SP SS:BP the stack data will be …….  General Purpose Registers AX BX DX CX the only general-purpose register I/O I/O Value that controls the which may be used for indirect Arithmetic MUL, DIV of large number of times a loop is addressing MOV [BX], AX numbers repeated Computation AX:DX Value to shift bits left or right. String addressing and indexing Registers AX 16-bit AH AL 8-bit 8-bit EAX 32-bit  Flag Register 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OF DF IF TF SF ZF AF PF CF  Flag Register o A flag register has a value 0F19H, write the current status of your system. 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 OF DF IF TF SF ZF AF PF CF  Features of Operating System File Input Program Memory Interrupt management / Loading Management Handling Output  BIOS Boot Process Processor CS = FFFF H reset state IP =0000 Turning on the power FFFF0H, entry point to BIOS in ROM Interrupt Vector Table BIOS data area the boot strap loader loads BOIS checks disk for the system files from the disk system files and accesses into memory and transfer the boot strap loader. control to them.  BIOS Boot Process Processor CS = FFFF H IP =0000 reset state Turning on the power FFFF0H, entry point to BIOS in ROM  Clear memory locations to zero.  Perform parity check of memory. Interrupt Vector Table BIOS data area the boot strap loader loads system BOIS checks disk for the system files files from the disk into memory and and accesses the boot strap loader. transfer control to them.  BIOS Boot Process Processor reset CS = FFFF H state IP =0000 Turning on the power FFFF0H, entry point  First instruction to be to BIOS in ROM executed FFFF0H.  BIOS contains set of routines to provide device support (checks various ports to Interrupt Vector Table BIOS data area identify and initialize devices, services for I/O) the boot strap loader loads system BOIS checks disk for the system files files from the disk into memory and and accesses the boot strap loader. transfer control to them.  BIOS Boot Process Processor reset CS = FFFF H state IP =0000 Turning on the power FFFF0H, entry point to  IVT, begins at location 0 and BIOS in ROM contains 256 4-byte addresses in the form (segment: offset) for handling interrupts.  BIOS data area begins at location Interrupt Vector Table 40, status of attached devices. BIOS data area the boot strap loader loads system BOIS checks disk for the system files files from the disk into memory and and accesses the boot strap loader. transfer control to them.  I/O Interface User Programs Operating System BIOS Hardware/Devices  Types of executable programs o.COM consists of one segment that contains code, data, and stack. o.COM could be used as small utility program or a resident program in memory. o.EXE consists of separate segments for code, data, and stack.  Program loader Program segment 256-byte. prefix, PSP Store program state.exe stack Get command line arguments..exe Disk data Loads the address of PSP in DS and ES. SS :SP code CS :IP Memory Transfers control to the program for execution, beginning with first instruction at code segment with offset 0.  The Stack o Saves return address when a program calls a subroutine. o Saves data that will pass to a subroutine. o Saves the current status of system registers, so it can be used for other calculations. o SS:SP o It stores data at the highest location in the segment and stores data downward through memory.  The Stack o Portion of the stack that is reserved for a particular routine is called stack frame. o PUSH o POP o Suppose you need to push the contents of AX=026B, and BX=04E3 and SP=36.  The Stack AX=026B BX=04E3 offset Stack frame SP=36 34 0000 32 0000 30 0000 2E 0000  PUSH AX AX=026B Decrements SP by 2 BX=04E3 Stores contents of AX offset Stack frame SP=36 34 0000 32 0000 30 0000 2E 0000  PUSH AX AX=026B Decrements SP by 2 BX=04E3 Stores contents of AX offset Stack frame SP=36 34 6B02 SP=34 32 0000 30 0000 2E 0000  PUSH BX AX=026B Decrements SP by 2 BX=04E3 Stores contents of BX offset Stack frame SP=36 34 6B02 SP=34 32 E304 SP=32 30 0000 2E 0000  POP BX restores contents of BX Increments SP by 2 offset Stack frame SP=36 34 6B02 SP=34 32 E304 SP=32 30 0000 2E 0000  POP BX restores contents of BX Increments SP by 2 offset Stack frame SP=36 34 6B02 SP=34 32 E304 BX=04E3 30 0000 2E 0000  POP AX restores contents of AX Increments SP by 2 offset Stack frame SP=36 34 6B02 AX=026B 32 E304 BX=04E3 30 0000 2E 0000 What is meaning of SP=0? Instruction Execution and Addressing o An assembly language programmer writes a program in symbolic code and uses the assembler to translate it into machine code as a.COM or.EXE program. o For a program execution, the system loads only the machine code into memory. o Every instruction consists of at least one operation such as move, add, or return. o Depending on the operation, an instruction may have one or more operands that reference the data. Instruction Execution and Addressing o The basic steps the processor takes in executing an instruction: fetch, decode and execute. o The fetch, decode and execute operations can be overlapped. Fetch Decode Execute Fetch Decode Execute Fetch Decode Execute  Notes Assume the program loader determines to load.EXE program in memory beginning at location 05BE0H Stack  Program loader initializes CS=05BE, IP=0000 04F00  If word size =8 bit, Instruction size = 2 bytes, the processor will increment Data IP by 2 04C00  The address of the next instruction will be executed is : 05BE2 Code 05BE0  Notes Assume that the next instruction to be executed is: mov AL, Stack mov AL, A01600 05D26 4A Data  How the program accesses data? 05D10 1. Initialize DS= 05D1H, offset =0016 Code 00 2. The address will be 05D26H 16 4A 05C03 A0 AX  Notes Assume that the next instruction to be executed is: mov AL, AX 4A Stack Q What is the address of the next instruction to be executed? IP register will 05D26 4A Data increment by.. 05D10 1. 05C06 2. 3 Code 00 16 05C03 A0  Notes Assume that the next instruction to be executed is: mov ,AX AX 02 48 Stack 05D27 02 Offset =0017H 05D26 48 Offset =0016H Data 05D10 00 16 Code 05C03 A0  Instruction Operands o An Instruction may have zero, one, two, or three operands. WORDX DW 0 ………. MOV CX, WORDX Operand could be a normal name MOV CX, 25 MOV CX, BX Operand could be a number MOV CX, [BX] DS:BX