Electronic Devices Past Paper PDF

## Paper / Subject Code: 51122 / Electronic Devices **Duration:** 3hrs **[Max Marks: 80]** **N.B.:** (1) Question No 1 is Compulsory. (2) Attempt any three questions out of the remaining five. (3) All questions carry equal marks. (4) Assume suitable data, if required and state it clearly. **1**...

## Paper / Subject Code: 51122 / Electronic Devices **Duration:** 3hrs **[Max Marks: 80]** **N.B.:** (1) Question No 1 is Compulsory. (2) Attempt any three questions out of the remaining five. (3) All questions carry equal marks. (4) Assume suitable data, if required and state it clearly. **1** **Attempt any FOUR** [20] a Why is the JFET called as a square law device? b Write a short note on single electron transistors (SET). Include suitable neat sketches wherever necessary. c With neat sketch describe operation of the inductor (L) filter with appropriate waveforms. d Explain the concept of DC load line & Q- Point in bipolar junction transistor (BJT). e Describe combinational clipper circuits with neat diagram & transfer characteristics. **2** [10] a Describe the working or operation of a bridge type full wave rectifier with a neat sketch. Draw the output voltage waveforms & mention the expression for DC or average output voltage (Vdc). b With a neat sketch, explain the Zener diode as a voltage regulator. Describe its operation for both, varying load resistance with a constant DC supply voltage & a varying DC supply voltage with a constant load resistance. **3** [10] a Explain how a PN junction is formed with a neat diagram. b Explain with the help of neat diagram construction, working & VI characteristics of n channel depletion MOSFET. **4** [10] a Draw a circuit diagram of common source (CS) E-MOSFET amplifier, derive equation of voltage gain (Av), input resistance (Ri) & output resistance (Ro)? b For small signal amplifier in common emitter (CE) BJT configuration using voltage divider biasing perform small signal (AC) analysis using the hybrid - π model. **5** [10] a With a neat sketch, write a short note on solar cell describing its structure or construction, working & V-I characteristics. Mention few real-life applications of solar cells b Draw circuit diagram and explain the operation of different biasing circuits used for D-MOSFET. **6** [10] a Explain construction and working principle of Memristor. b Draw all the different biasing circuits of BJT. Derive the expression of stability factor (SI) for the voltage divider biasing circuit. ## Paper / Subject Code: 51123 / Digital Electronics **Time:** 3 Hrs **Marks: 80** **N.B.:** (1) Question No. 1 is Compulsory. (2) Attempt any three questions out of remaining five. (3) Each question carries 20 marks and sub-question carry equal marks. (4) Assume suitable data if required. **Q.1** Answer any four [20] a) Convert the decimal number (123)10 to their octal, hexadecimal, BCD and gray code equivalent. b) Explain characteristics of logic families. c) Design and implement full adder circuit. d) Write a short note on Hamming code. e) Explain the working of a two-inputs CMOS NOR gate with neat diagram f) Explain the structural VHDL description of 2 to 4 decoder in detail. **Q.2** [10] a) Draw the circuit diagram of TTL NAND gate with totem pole output and explain its working with the help of a truth table. b) Design and implement the following expression using a single 8:1multiplexer F(A,B,C,D)=m(0,1,3,4,8,9,15). **Q.3** [10] a) Design and implement D FF using SR FF. b) Explain the working of 3 bit asynchronous counter with proper timing diagram c) Design and implement 3 bit synchronous counter using SR FF. **Q.4** [10] a) What is shift register? Explain any one type of shift register. Give its application. b) Reduce the following state table using partitioning method of state reduction. **Q.5** [10] a) Implement following function using PLA. F1=Σ m = (0,1,3,4) and F2=Σ m = (1,2,3,4,5) b) Design 2 bit comparator and implement using logic gates. **Q.6** [10] a) Implement and explain 4 bit BCD adder using IC 7483 b) Write a Verilog code for 8:1 multiplexer using data flow modelling. ## Paper / Subject Code: 51122 / Electronic Devices **Duration:** 3hrs **[Max Marks: 80]** **N.B.:** (1) Question No 1 is Compulsory. (2) Attempt any three questions out of the remaining five. (3) All questions carry equal marks. (4) Assume suitable data, if required and state it clearly. **1** **Attempt any FOUR** [20] a Why is the JFET called as a square law device? b Write a short note on single electron transistors (SET). Include suitable neat sketches wherever necessary. c With neat sketch describe operation of the inductor (L) filter with appropriate waveforms. d Explain the concept of DC load line & Q- Point in bipolar junction transistor (BJT). e Describe combinational clipper circuits with neat diagram & transfer characteristics. **2** [10] a Describe the working or operation of a bridge type full wave rectifier with a neat sketch. Draw the output voltage waveforms & mention the expression for DC or average output voltage (Vdc). b With a neat sketch, explain the Zener diode as a voltage regulator. Describe its operation for both, varying load resistance with a constant DC supply voltage & a varying DC supply voltage with a constant load resistance. **3** [10] a Explain how a PN junction is formed with a neat diagram. b Explain with the help of neat diagram construction, working & VI characteristics of n channel depletion MOSFET. **4** [10] a Draw a circuit diagram of common source (CS) E-MOSFET amplifier, derive equation of voltage gain (Av), input resistance (Ri) & output resistance (Ro)? b For small signal amplifier in common emitter (CE) BJT configuration using voltage divider biasing perform small signal (AC) analysis using the hybrid - π model. **5** [10] a With a neat sketch, write a short note on solar cell describing its structure or construction, working & V-I characteristics. Mention few real-life applications of solar cells b Draw circuit diagram and explain the operation of different biasing circuits used for D-MOSFET. **6** [10] a Explain construction and working principle of Memristor. b Draw all the different biasing circuits of BJT. Derive the expression of stability factor (SI) for the voltage divider biasing circuit. ## Paper / Subject Code: 51122 / Electronic Devices **Duration:** 3hrs **[Max Marks: 80]** **N.B.:** (1) Question No 1 is Compulsory. (2) Attempt any three questions out of the remaining five. (3) All questions carry equal marks. (4) Assume suitable data, if required and state it clearly. **1** **Attempt any FOUR** [20] a Describe the pinch-off condition in JFET with neat labeled diagram. b Write a short note on memristors. Include suitable neat sketches wherever necessary. c With neat sketch describe operation of the capacitor (C) filter with appropriate waveforms. d Explain the concept of DC load line & Q- Point in bipolar junction transistor (BJT). e For the circuit shown below in Fig. 1 draw output waveform if an input signal of 20V peak-to-peak is applied. >**Fig. 1 for Q.1 (e)** > > ![Image of a circuit diagram] **2** [10] a Describe the working or operation of a bridge type full wave rectifier with a neat sketch. Draw the output voltage waveforms & mention the expression for DC or average output voltage (Vdc). b With a neat sketch, explain the Zener diode as a voltage regulator. Describe its operation for both, varying load resistance with a constant DC supply voltage & a varying DC supply voltage with a constant load resistance. **3** [10] a Explain how a PN junction is formed with a neat diagram. b Explain with the help of neat diagram construction, working & VI characteristics of n channel JFET. **4** [10] a Draw a circuit diagram of common source (CS) E-MOSFET amplifier, derive equation of voltage gain (Av), input resistance (Ri) & output resistance (Ro)? b For small signal amplifier in common emitter (CE) BJT configuration using voltage divider biasing perform small signal (AC) analysis using the hybrid - π model. **5** [10] a With a neat sketch, write a short note on solar cell describing its structure or construction, working & V-I characteristics. Mention few real-life applications of solar cells b Draw circuit diagram and explain the operation of different biasing circuits used for E-MOSFET. **6** [10] a Explain construction and working principle of Single Electron Transistor. b Draw all the different biasing circuits of BJT. Derive the expression of stability factor (SI) for the voltage divider biasing circuit.