Digital Electronics Past Paper MAY-2023 (C-20)

Summary

This is a digital electronics exam paper from May 2023 for the C-20 exam board. The questions cover topics such as logic gates, Boolean algebra, logic families including registers and multiplexers. The paper is suitable for undergraduate computer science students.

Full Transcript

7235 * C20-CM–302 7235 BOARD DIPLOMA EXAMINATION, (C-20) MAY—2023 DCME - THIRD SEMESTER EXAMINA...

7235 * C20-CM–302 7235 BOARD DIPLOMA EXAMINATION, (C-20) MAY—2023 DCME - THIRD SEMESTER EXAMINATION DIGITAL ELECTRONICS Time : 3 hours ] [ Total Marks : 80 PART—A 3×10=30 Instructions : (1) Answer all questions. (2) Each question carries three marks. (3) Answers should be brief and straight to the point and shall not exceed five simple sentences. 1. Convert 746(8) into decimal. 2. What is the importance of parity bit? 3. Draw the symbols and truth tables of basic gates. 4. List various postulates of Boolean algebra. * 5. Classify different logic families. 6. Differentiate between level clocking and edge triggering. 7. State the need for preset and clear inputs. 8. Classify registers based on data I/O. 9. List any three applications of decoders. 10. * the applications of multiplexers. List /7235 www.manaresults.co.in 1 [ Contd... * PART—B 8×5=40 Instructions : (1) Answer all questions. (2) Each question carries eight marks. (3) Answers should be comprehensive and criterion for valuation is the content but not the length of the answer. 11. (a) Convert the given numbers into decimal (i) 2B8(16) and (ii) 746(8). (OR) (b) Explain the use of alphanumeric codes (i) ASCII and (ii) EBCDIC. 12. (a) Give the steps of how the K-map reduces the given expression Y = m (1, 2, 3, 5, 6, 7, 8, 13). (OR) (b) Draw and explain 4-bit parallel adder using full adders. 13. (a) Draw the logic diagram, truth table and timing diagram for an edge triggered JK flip-flop. Explain its operation. (OR) (b) Draw the logic diagram, truth table and timing diagram for a SR flip-flop. Explain its operation. 14. (a) Write the steps to modify the UP counter to measure both UP and * DOWN with truth table. (OR) (b) Draw and explain the working of 4-bit shift left register with timing diagram. 15. (a) Recommend an encoder for transmitting 3 outputs with the 8 line controller with proper explanation. (OR) (b) Recommend a multiplexer using which 4 inputs are transmitted * on a line with proper explanation. /7235 www.manaresults.co.in 2 [ Contd... * PART—C 10×1=10 Instructions : (1) Answer the following question. (2) The question carries ten marks. (3) Answer should be comprehensive and the criterion for valuation is the content but not the length of the answer. 16. Design a circuit that has a 3-bit binary input and a single output z specified as follows : z = 0 when the input is less than 510 z = 1 otherwise (a) Write the truth table. (b) Derive Boolean expression from truth table.  * * /7235 www.manaresults.co.in 3 AA23–PDF

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