3rd Sem DEC Sessional 1 PDF - MANAV RACHNA
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Manav Rachna International Institute of Research and Studies
2022
MANAV RACHNA
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Summary
This is a past paper for a Digital Electronics & Circuits course at MANAV RACHNA INTERNATIONAL INSTITUTE OF RESEARCH & STUDIES, held in October 2022. The exam has multiple questions covering topics such as logic gates, conversions, and circuit design.
Full Transcript
Student Roll No: 1/21/FET/BCS) 294. MANAV RACHNA INTERNATIONAL INSTITUTE OF RESEARCH & STUDIES FACULTY OF ENGINEERING AND TECHNOLOGY Sessional Test-I October- 2022 Subject: Digital Electronics & Circuits Subject Code: BEC-DS-322 Class/Semester: 3(CSE(Normal), CSE Specialization) Department: ECE Max...
Student Roll No: 1/21/FET/BCS) 294. MANAV RACHNA INTERNATIONAL INSTITUTE OF RESEARCH & STUDIES FACULTY OF ENGINEERING AND TECHNOLOGY Sessional Test-I October- 2022 Subject: Digital Electronics & Circuits Subject Code: BEC-DS-322 Class/Semester: 3(CSE(Normal), CSE Specialization) Department: ECE Max. Marks: 30 Time Allowed: 90 minutes Note: Q.1 is compulsory. Attempt any two questions out of questions no. 2 to 4.. | Q. Nos | CO | BTL | Marks | |---|---|---|---| | 1. (a) What are universal logic gates? | 2 | 2 | 2 | | Express the following decimal numbers into binary, Gray and Excess-3 codes:- | 1 | 2 | 2 | | (b) i) 18 ii) 23 | 1 | 3 | 2 | | (c) Do the following conversions: (45)10 = ( )8 = ( )2 = ( ' )16 | 3 | 2 | 2 | | (d) Differentiate between latch and Flip flop? | 1 | 1 | 2 | | (e) What is logic gate? Explain each logic gate with its truth table. | 2 | 4 | 5 | | 2. a) The seven bit hamming code is received as 0010001. Assume that even parity has been used, check whether it is correct or not. If not, find the correct code. | 2 | 4 | 5 | | b) Subtract the following by 2's complement: | 2 | 4 | 5 | | 1) (19)10- (35)10 | | 2) (28)10 - (14)10 | | 3. a) Minimize the following function using K-map method:- | 2 | 5 | 5 | | F(A,B,C,D)= ∑m(0,1,2,3,5,7,8,10,12,13,15) | 2 | 5 | 5 | | Design Full Subtractor circuit using PLA. | 2 | 6 | 4 | | 4. a) Design 3-bit binary to gray code converter using logic gates. | 2 | 5 | 3 | | b) Design 16:1 multiplexer using 8:1 multiplexer. | 3 | 3 | 3 | | c) Draw and explain the working of SR Flip flop. | CO Wise Marks distribution A pie chart is shown. It is divided into three unequal sections. Each section is labelled with a numerical value. The values are: CO3 = 13%, CO1 = 7%, CO2 = 72%. BTL Marks Distribution A pie chart is shown. It is divided into three unequal sections. Each section is labelled with a numerical value. The values are: 12 = 37%, 3 = 36%, 16 = 30%. Signature of Subject Coordinator Signature of HOD Flip flop- engine