Analog Electronics Textbook PDF

Analog Electronics Published By: Physics Wallah ISBN: 978-93-94342-39-2 Mobile App: Physics Wallah (Available on Play Store) Website: www.pw.live Email: [email protected] Rights All rights will be reserved by Publisher. No part of this b...

Analog Electronics Published By: Physics Wallah ISBN: 978-93-94342-39-2 Mobile App: Physics Wallah (Available on Play Store) Website: www.pw.live Email: [email protected] Rights All rights will be reserved by Publisher. No part of this book may be used or reproduced in any manner whatsoever without the written permission from author or publisher. In the interest of student's community: Circulation of soft copy of Book(s) in PDF or other equivalent format(s) through any social media channels, emails, etc. or any other channels through mobiles, laptops or desktop is a criminal offence. Anybody circulating, downloading, storing, soft copy of the book on his device(s) is in breach of Copyright Act. Further Photocopying of this book or any of its material is also illegal. Do not download or forward in case you come across any such soft copy material. Disclaimer A team of PW experts and faculties with an understanding of the subject has worked hard for the books. While the author and publisher have used their best efforts in preparing these books. The content has been checked for accuracy. As the book is intended for educational purposes, the author shall not be responsible for any errors contained in the book. The publication is designed to provide accurate and authoritative information with regard to the subject matter covered. This book and the individual contribution contained in it are protected under copyright by the publisher. (This Module shall only be Used for Educational Purpose.)  Design Against Static Load ANALOG ELECTRONICS INDEX 1. Diode Circuits & Applications........................................................................................... 7.1 – 7.4 2. Zener Diodes Regulator Circuit......................................................................................... 7.5 – 7.6 3. BJT Biasing And Region of Operation.............................................................................. 7.7 – 7.8 4. Low Frequency BJT Amplifier........................................................................................... 7.9 – 7.16 5. MOSFET Amplifier with Biasing....................................................................................... 7.17 – 7.25 6. Feedback Amplifiers........................................................................................................ 7.26 – 7.30 7. Operational Amplifiers.................................................................................................... 7.31 – 7.36 GATE-O-PEDIA ELECTRONICS AND COMMUNICATION ENGINEERING  Design Against Static Load 1 DIODE CIRCUITS & APPLICATIONS 1.1. Diode A two terminal semiconductor device with PN junction is called a diode A PN junction diode is a two terminal device formed by doping with acceptor and dopant impurities at different regions. 1.2. VI Characteristics In ideal condition, a diode works as a short circuit at during forward bias and open circuit during reverse bias, i.e. like an ideal switch In practical condition a diode works as low resistance, and high resistance at reverse bias, i.e. like a practical switch. Ideal Characteristics Practical Characteristics 1.2.1. Application of Diode in Clipper circuit The Circuit clips a portion of the input signal On the basis of which part the circuit clips, the circuit is named as Positive or Negative clipper A series or shunt clipper is named according to the placement of diode in the circuit. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.1  Analog Electronics Positive Clipper Clips positive portion of the input signal. Series Clipper Shunt Clipper Response Transfer Characteristics Negative Clipper Clips negative portion of the input signal. Series Clipper Shunt Clipper Response Transfer Characteristics Application of Diode in Clamper Circuit A clamper circuit clamps or adds a DC shift to the input signal. Based on the polarity of shift, a Positive or Negative clamper is named. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.2  Analog Electronics Positive Clamper Circuit Adds a positive DC shift to the input signal. Negative Clamper Circuit Adds a negative DC shift to the input signal. Note: For Proper functioning of clamper circuit, time constant of circuit should be much greater than time period of input signal (RLC >> T) 1.3. Application of Diode in Peak Detector A peak detector detects the peak of the input signal. Positive Peak Detector Detects the positive peak of input signal. Negative Peak Detector Detects the negative peak of input signal GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.3  Analog Electronics 1.4. Application of Diode in Voltage Doubler Voltage doubler gives the output as double of the input signal. A level shifter or clamper followed by a peak detector gives a Voltage Doubler RLC >> T 1.5. Application of Diode in Voltage Multiplier Using multiple stages of a set of a clamper and peak detector gives voltage multiplier, also called as Cockroft-Walton Voltage Multiplier.  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.4  Analog Electronics 2 ZENER DIODES REGULATOR CIRCUIT 2.1. Zener Diode VI Characteristics A "reverse biased" diode blocks current in the reverse direction, but will suffer from premature breakdown or damage if the reverse voltage applied across it is too high. Zener Diode are basically the same as the standard PN junction diode but are specially designed to have a low predetermined Reverse Breakdown Voltage that takes advantage of this high reverse voltage. +I F Forward Current Forward Bias Region –VZ Reverse Bias –VR +VF I Z(min) Forward Bias VF 0.3 – 0.7v "Zener" Breakdown Region IZ(max) Reverse Constant Current Zener Voltage –IR Zener Diode in Forward Bias: Works same as a normal PN diode i.e short circuit ideally and a low resistance practically. Zener Diode in Reverse Bias: 1. V < VZ , works as a normal PN diode in reverse bias i.e open circuit ideally and a high resistance practically. 2. V > VZ, works as a voltage regulator i.e becomes a source of constant voltage for the connected load. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.5  Analog Electronics Ideal Zener Diode Practical Zener Diode Operating Conditions for Zener diode to maintain break down characteristics: 1. Current through Zener diode, IZ (knee)  I  IZ (max) 2. The magnitude of open circuit reverse voltage across the Zener diode should be greater than or equal to VZ. IZ (knee) is the minimum current required for the Zener diode to work as a voltage regulator IZ (max) is the maximum current the Zener diode can operate without damaging the device. It is specified by manufacturer. Zener Diode as Voltage Regulator Zener Diodes are used to produce a stabilised voltage output with low ripple under varying load current conditions. Output voltage : V0 = Vz = Zener voltage Vi − V0 Input current : Iin = R Source resistance : R = Vi − V0 IZ + IL Zener power dissipation : PZ (max) = I Z (max)VZ Note: Zener diodes can also be connected together in series along with normal silicon diodes to produce a variety of different reference voltage output values  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.6  Analog Electronics 3 BJT BIASING AND REGION OF OPERATION 3.1 Operating Region of BJT where, JE = Base-Emitter Junction JC = Collector-base Junction Normal Active Region In this region, JE operating in forward bias while JC operating in reverse bias. It is used as amplifier. Saturation Region Both JE and JC are operating in forward bias and is used as switch (ON). Cut-OFF Region Both JE and JC are operating in reverse bias and is used as switch (OFF). Reverse Active Region In this region, JE in reverse bias and JC in forward bias. It is used as attenuator. Some Standard values for npn transistor. Si Ge VBE (Active Region) 0.7 V 0.2 VBE (Saturation region) 0.8 V 0.3 V VCE (Saturation region) 0.2 V 0.1 V VBE (Cut-off region) 0 V – 0.1 V Note : If nothing is mentioned then we will assume transistor is silicon type. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.7  Analog Electronics 3.2. Different Methods used to Identify Operating Region of BJT Method-I Assume transistor in Saturation Region 1. IC  IB 2. VCE = VCE(sat) I (sat) 3. IB(min) = C (dC = hfe) dC 4. If IB  IB (min) then transistor will work in saturation region otherwise in active region. Method-II Assume transistor in active region. 1. IC = dc IB 2. IE = IC + IB = (I + dc)IB VCB  0 for npn transistor 3. For active region =  VCB  0 for pnp transistor  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.8  Analog Electronics 4 LOW FREQUENCY BJT AMPLIFIER 4.1. Amplifiers 4.1. Small Signal Modelling of BJT 1. h-parameter modelling: I1 I2 h V1 V2 parameter V1   h11 h12   I1   I  = h h  V   2   21 22   2  V1 = h11I1 + h12V2 V2 = h21I1 + h22V2 I1 h11 I2 + + 1 V1 h12V2 h21 I1 V2 h22 – – V1 h11 = = input impedance = hi I1 V =0 2 V1 h12 = = reverse voltage gain = hr V2 I1 = 0 GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.9  Analog Electronics I2 h21 = = forward current gain = h f I1 V2 = 0 I2 h22 = = output admittance = h0 V2 I1 = 0 2. Approximated h-model h-parameter model ib ic B C 1 hi hf ib h0 ie E 2. re modelling ib ic B C re ib r0 re Model ie E 3. r modelling ib ic B C + V r g mV r0 r  Model – pi-Model ie E Relation between small signal modelling parameters 1. hi = re = r 2. hf = 1 3. = r0 = VA / ICQ =  if no early effect h0 GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.10  Analog Electronics 4. ib = gmV = gm r ib = g m re ib = g m  re ib ⇒ gm = 1 re re = emitter dynamic resistance VT re =. I EQ Note: Practically r0 = 0, and 1/h0 = , if not mentioned explicitly. 4.2. Procedure of AC analysis Step 1: Do the mid frequency analysis (a) cc1 , cc2 , cE → short circuit CT , CD , Csh → Open circuit (b) all DC independent voltage source → Short circuit All independent current source = open circuit Step 2: Replace BJT with small signal equivalent. Internal Performance Parameter of an Amplifier 1. Current Gain (Ai) = – I2 / I1 2. Input Resistance (Ri) = V1/I1 3. Voltage Gain (Av) = V2/V1 4. Output Resistance (Ro) = 1/Output Admittance (1/yo) = I2 /V2 | VS = 0 CE Amplifier without RE GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.11  Analog Electronics Parameter Current Gain Input Resistance Voltage Gain Output Resistance h-model Al = −hfe Ri = hie RL R0 =    A =A  V l Ri RL = RL ‖ RC re model Al = −  VA Ri = r = gm  RL − RL A =A  =  R0 = r0 = IC VA =  V l Ri r −RL R0 = r0 =  VA =    A = −g R = V m L re RL = RL ‖ RC CE Amplifier with RE Parameter Current Gain Input Resistance Voltage Gain Output Resistance Ri = hie + (1 + h fe ) RE  h-model Al = −hfe RL R = AV = Al  0 Ri −RL AV  RE RL = RC ‖ RL re model Al = − Ri = r + (1 + ) RE AV = Al  RL R0 =  VA =  Ri −RL −R AV =  L r + (1 + )RE RE (1+)RE r  RL = RC ‖ RL GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.12  Analog Electronics CC Amplifier Parameter Current Gain Input Resistance Voltage Gain Output Resistance h-model Al = 1 + hfe Ri = hie + (1 + hfe ) RL Al RL RS  + hie   A =  1 R = 1 + h fe V 0 Ri RL = RE ‖ RL RS = Effective source impedance re model Al = 1 +  Ri = r + (1 + ) RL (1 + ) RL RS + r A =   1.0 R0 = If r  RS 1+  r + (1 + ) RL V r r RL = RE ‖ RL R0 =    1+   r 1 R0 =  =  gm CB Amplifier Parameter Current Gain Input Resistance Voltage Gain Output Resistance h-model hfe hie Al RL R0 =  A=  1 Ri =  A =  l 1 + hfe 1 + h fe V Ri RL = RC re model Al =  1 Ri  r r   = 1  A = 1 RL = gm RL R0 =  VA =  1+  1 +   gm V 1/ gm RL = RC GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.13  Analog Electronics Cascade Amplifier (Multistage Effect) RS1 RL 1 RS RL 2 RS RSn 2 3 1 2 3 n V0 RL Ri 1 R01 Ri 2 R02 Ri 3 Rin 1. RL1  f ( R01 , Rsa ) RL1 = f ( Ri 2 ) 2. Rs2  f ( RL1, Ri 2 ) Rs 2 = f ( R01 ) 3. Ri [cascade] = Ri (1st stage) 4. o/p R0 (cascade) = R0N (last stage) 5. Av = Av1 × Av2 × Av3 × …… AN (for proper impedance matching) 6. AI = Ai1 × Ai2 × Ai3 × …… AiN (for proper impedance matching) Loading Effect Loading Effect Ai 1 A i2 I/p amp O/p Av 1 RL 1 Av2 R L2 Ri2 Ri 1 1. The decrease in the gain of first stage due to low value of input impedance of second stage is called Loading effect 2. Loading effect occurs in BJT amplifiers, and not in JFET and MOSFET amplifiers because they have a very high input impedance. Cascode Amplifier A combination of CE followed by CB is referred as Cascode amplifier CE acts as input stage and CB acts as output stage. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.14  Analog Electronics Cascode amplifier can amplify both voltage and current Also known as direct coupled amplifier because output of CE configuration is directly connected to input of CB configuration. Cascode Amplifier Parameters 1. Transconductance (gm) = AI[CB] × gm[CE] 2. Input Impedance (Ri) = Ri [CE] 3. Output Impedance (RO) = RO [CB] 4. Current Gain (AI) = AI [CB] × AI [CB] > AI [CE] 5. Voltage Gain (AV) = AV [CB] × AV [CE] > – AV [CB] Darlington Pair Series combination of two CC configurations. Also referred as direct coupled amplifier GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.15  Analog Electronics B1 E1 B2 E2 Vi V0 CC CC I b1 Ic 1 Ib2 Ie2 I0 ~ RL C1 (Direct C2 coupling) 4. Circuit diagram of Darlington pair - Darlington Amplifier Parameters 1. Transconductance (gm) = Ai [2nd stage] × gm[1st stage] 2. Input Impedance (Ri) = Ri [1st stage] 3. Output Impedance (Ro) = RO [2nd stage] 4. Current Gain (Ai) = Ai [1st stage] × Ai [2nd stage] 5. Voltage Gain (Av) = 1  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.16  Analog Electronics 5 MOSFET AMPLIFIER WITH BIASING 5.1. MOSFET Source : terminal through which majority charge carrier enters into the SC bar. Drain : terminal through which majority charge carriers leaves the SC bar. Channel: path between source & drain by which majority carrier travel from source to drain Gate : Terminal to control the flow of charge carrier from source to drain Symbol : D D B B or G S S P-channel Enhancement type MOSFET : D D B or B G S S N-channel Enhancement type MOSFET. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.17  Analog Electronics Channel Current The current flowing from source to drain via the channel. It is a function of aspect ratio of MOSFET and applied voltages VGS, and VDS. W vDS  2 1 ID = nCox (  GS v − vTH ) vDS −  2 L 2  Trans Conductance : It is a figure of merit indicates that how well a transistor convert the voltage to the current I D gm = VDS = const. VGS In cut-off Region: MOSFET works as an OFF switch. VGS < VT ID = 0 In Triode Region: MOSFET works as a resistor VGS > VT VDS > (VGS – VT) W  2 1 v ID = n Cox ( vGS − vTH ) vDS − DS  2 L 2  I D W (VDS = const.) = gm = nCox vDS VGS L In Saturation region : MOSFET works as on ON switch VGS >> VT vDS = vGS − vTH 1 W I D sat = nCox vGS − vTH  2 2 L W and gm = nCox L vGS − vTH  2I D sat gm = vGS − vTH W  gm = 2nCox   I D L GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.18  Analog Electronics MOSFET Biasing Biasing is a process of applying the operating point of device. Three operating regions. Cut-off VGS < VT Linear: VGS  VT | VDS  VGS – VT Saturation: VGS  VT | VDS  VGS – VT There are three types of biasing (1) Fixed bias (2) Drain to base bias (3) Potential divider bias VDD 1. Fixed Bias Configuration: RD by kVL VG – VGS – IDRS = 0 ID  VGS = VG – IDRS VG + Assume operating in saturation mode VGS – ID Find ID from standard drain current equation RS kVL in output loop VDD − I D RD − VDS − I D Rs = 0  VDS = VDD – ID (RD + RS) Now checks VDS & VGS – VT condition for saturation. True → assumption correct False → assumption false, assume linear & solve again. VDD 2. Drain to Gate Bias As VDS = VGS RD VDS > VGS – VT ID MOS biased in saturation region. 0 + Applying KVL VDD – IDRD – VDS = 0 VDS VDS = VDD – IDRD + – VGS – ID = k VGS − VT  2 as saturation, GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.19  Analog Electronics 3. Potential Divider Bias VDD  R2 By voltage division VG = R1 + R2 IS = ID VGS = VG – I D RS VDS = VDD − I D ( RD + RS ) ID = k VGS − VT  find ID, VGS, VDS 2 Assume saturation, VDS > VGS – VT saturation. otherwise assume active. Small Signal (or) AC Analysis If no channel length modulation ( = 0). 1 V VA = =  ; rds = ro = A =   ID (a) RC Coupled amplifier with Coupling Capacitor VDD R1 RD RS CS RL VS R2 RS CS IS VGS ID Vo IS + Io RS VGS gmVGS RD || R L R1 || R2 – VS S GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK S 7.20  Analog Electronics VGS 1. IS = R1 || R2 2. I 0 = − g mVGS 3. AI = − gm  R1 || R2  4. Rin = Rs + [R1 || R2 ] 5. VS = I S  Rin 6. V0 = − gmVGS ( RD || RL ) V0 g ( R || RL ) 7. AV = =− m D [ R1 || R2 ] VS Rin 8. Rout = RD (Load open) (b) RC coupled amplifier without bypass capacitor: io = −gmvgs Vo = −[RL || RD ] gmVgs Rin = Rx + [ R1 || R2 ] Vx = Vgs + gmVgs Rs = (1 + gmRs )Vgs GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.21  Analog Electronics Vx = R1 || R2 ( R1 || R2 + R2 )  R || R + Rx   Vx =  1 2  (1 + gm Rs )Vgs  R1 || R2  Voltage gain = Vo Vs Current Mirror It copies the ref current flowing at the input of the system to the output. It is also known as practical current source. It is designed by using IC technology. Vref Iref Iout M1 M2 + VGS1 VGS2 – VGS1 = VGS2 = VGS 1 W  Iref =  xCox   (VGS − VT )2 …(1) 2  L 1 Iout = 1 xCox  W  (VGS − VT )2 …(2) 2  L 2 Iout = (W /L)2 I ref (W /L)1 as now output current is independent of output resistance, if  W  =  W  → Iout = I ref  L 1  L 2 MOS Current Steering Circuit: GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.22  Analog Electronics T1 and T2 are in current mirror.  (W /L)  2  I D2 = I ref    (W /L)1 T1 and T3 are in current mirror.  (W /L)3  I D3 = I ref    (W /L)1  T4 and T5 are in current mirror → pMOS  (W /L)5   (W /L)5  I D5 = I D4   = I D3    (W /L)4   (W /L)4  5.2. MOSFET Amplifiers Common Source MOSFET Amplifier without RS and its AC Equivalent circuit V DD RD C Ig = 0 G ID D D V0 V0 G RL g mVgs r0 Vs Vg s S RD RL VS RS C S S Ri ' R0 ' Ri ' =  R0 ' (a) CS MOSFET amplifier without RS (b) AC equivalent of CS MOSFET amplifier without RS Common Source MOSFET Amplifier with RS and its AC Equivalent circuit VDD RD C D V0 G RL S VS RS Ri ' R 0' Fig. (a) CS MOSFET amplifier with RS GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.23  Analog Electronics Ig = 0 ID D G V0 g mVgs r0 Vs Vg s RD RL S Rs S Ri ' =  R0 ' Fig. (b) AC equivalent of CS MOSFET amplifier with RS Common Drain MOSFET Amplifier and its AC Equivalent circuit Ig = 0 ID D VDD G D g mV gs r0 Vs Vg s G S S C I0 R0 ' V0 V0 VS S RS RL Ri ' =  Rs RL Ri ' R0 ' (a) CD MOSFET amplifier (n-channel enhancement) (b) AC equivalent of CD MOSFET amplifier Common Gate MOSFET Amplifier and its AC Equivalent circuit VDD RD C D V0 G RL RS S R0 ' VS Ri ' Fig. (a) CG MOSFET amplifier (n channel enhancement) GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.24  Analog Electronics ID D G V0 + g mVg s r0 Vgs RD RL – S ID Rs Iin S R0 ' Vs Ri ' Fig. (b) AC equivalent of CG MOSFET amplifier MOSFET Amplifiers AC Parameters AC CS without RS CS with RS Common drain Common Gate parameter 1 Input Ri ' =   I g = 0 Ri ' =   I g = 0 Ri ' =  Ri '  resistance gm R0' = r0 [  0] Output R0' = r0 + (1 + ) RS 1 R0' = r0 + RS (1 + )  1  R0'  R0' =  [ = 0] r0 = R0' =  [if  = 0  rd = ] R0' =  [if  = 0  r0 = ] I D  resistance gm  −RL' gm RL' Voltage AV ' = − gm RL" AV ' = AV ' = AV ' = gm RL" RL' + r0 + RS (1 + ) 1 + gm RL' gain ( RL" = r0 || RD || RL ) ( RL" = r0 || RD || RL ) ( RL ' = RD || RL ) ( RL ' = Rs RL ) Does not exist Current Does not exist  I g = 0 A  Does not exist  I g = 0 A   I g = 0 A  AI ' = 1.0 gain  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.25  Analog Electronics 6 FEEDBACK AMPLIFIERS 6.1. Introduction 6.1. Feedback It is a process of taking sample from output and mix with input. According to type of mixing two types of feedback. I. Negative Feedback If sample gets subtracted from supply. 1. Overall Gain: AF = A 1 + A gain reduced by (1 + A) 1 if A >> 1  Af =  2. Bandwidth: Gain × B.W. = Constant  (B.W.)f = (BW) (1 + A) so, bandwidth increased by (1 + A) GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.26  Analog Electronics 3. Noise and Distortion without feedback: Vo = AVi + VN + Vo with Feedback Vo = A(Vs − Vo ) + VN + VD AVs VN VD  Vo = + + 1 + A 1 + A 1 + A Hence, noise and distortion reduced by (1 + A) 4. Frequency Response: 5. Gain Sensitivity: A f /A f A A f Sg = =  A/A A f A A   A     A  A 1 + A  =  1 + A     (1 + A) − A  1 = (1 + A)  = 2  1 + A  (1 + A)  6. Desensitivity 1 D = = (1 + A) Sg II. Positive Feedback If sampled signal gets added with input then it is called as positive feedback. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.27  Analog Electronics (a) Gain: Xo Xi A Xi A Af = = = X s X i − X f X i − AX i  A   Xo =   XS 1 − A  A  AF = practically |A| < 1. 1 − A Effects: 1. Reduces bandwidth of system. 2. Increase noise, as well as distortion of system. Negative feedback amplifiers classificed into 4-types. 1. Series Series Feedback 2. Series Shunt Feedback 3. Shunt Series Feedback 4. Shunt Shunt Feedback 6.2. Classification of Amplifier In the feedback amplifier A Mixter Network Voltage Mixing Current Mixing Vi = Vs – Vf Ii = Is – If Ri increase Rin decrease GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.28  Analog Electronics B-Sampling Network Voltage Sampling Current Sampling Ro decrease Ro increase (1) Series-Shunt Feedback: (Voltage Amplifiers) Observations: Gain = AV 1 + AV  Bandwidth = BW 1 + AV   (Rin)f = Ri [1 + AV ] Ro (Ro)f = 1 + AV  (2) Shunt-Shunt Feedback : (Trans-resistance Amplifiers) Gain: If = Vo (I f − Vo )  Iin = Rs Rs + Rin GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.29  Analog Electronics  RL   RL   RS  Vo = RM Iin   = Rm   = ( Rm ) f ( I s − Vo )  RL + Ro   RL + Ro   RS + Rin  Vo [1 + ( Rm )] = I S Rms Vo Rms  = = I s 1 + Rms Observations: 1. Gain (Rm)f = Rms decreased. 1 + Rms 2. (Ri ) f = Ri decreased 1 + Rms 3. (Ro)f = Ro decreased. 1 + Rms 3. Series-Series Feedback Current Series Feedback (Trans-Conductance Amplifier) Observations: Io Gms 1. = Vs 1 + Gms 2. (Rin ) f = Rin (1 + Gm) 3. (Ro ) f = Ro (1 + Gm) 4. Shunt-Series Feedback : (Current Amplifier) Observations: Io AI 1. = I s 1 + AI  Rin 2. ( Rin ) f = 1 + AI  3. (R0 ) f = R0[1 + AI ]  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.30  Analog Electronics 7 OPERATIONAL AMPLIFIERS 7.1. Op-amp A difference amplifier (amplifies the difference between two inputs) where, Vd = V1 − V2 Op-amp Characteristics/Parameters  Vo  1. Open Loop Voltage Gain  A =  : The internal gain of op-amp without any feedback. V i  Ideally = ; Practically = very high 2. Gain Bandwidth Product (GBW): Unity gain bandwidth product i.e. GBW = 1 refers to be behavior that the gain reduces at the same rate as frequency increases.  Vi  3. Input Resistance  Ri =  : It is the internal input impedance of the op-amp.  Ii  Ideally =  ; practically = very high  Vo  4. Output Resistance  Ro =  : Ideally = 0 ; practically = very small  Io  5. CMRR (Common Mode Rejection Ratio) : Metric used to quantify the ability of the device to reject common-mode signals. Ideally CMRR is infinite, Practically very high. GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.31  Analog Electronics Ad CMRR = Ac Ad  CMRR in dB = 20log = ( Ad )dB − ( Ac )dB Ac 6. Slew Rate : The maximum rate of change in output voltage per unit of time dV0 dV0 dVi dVi SR = =  = ACL  dt max dVi max dt max dt max Non-Idealities in Op-amp Offset voltage (VOS): If the two transistors are not perfectly matched, an offset will show up as a non-zero DC offset at the output. Bias current (Ibias): The transistor inputs actually do draw some current. The bias current is defined to be the average of the currents of the two inputs. Offset current (IOS): The difference between the input bias currents. Ideal Op-amp Characteristics Parameter Symbol Ideal Open loop voltage A  Unity gain frequency Funity (GBW)  Input resistance Rin  Output resistance Rout Zero Input bias current Ibias Zero Input offset current Iin(OS) Zero Input offset voltage Vin(OS) Zero Slew rate SR  Common mode rejection ration CMRR  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.32  Analog Electronics 7.2. Common Op-amp Circuits Comparator 𝑉0 = 𝑉𝑠𝑎𝑡 ; 𝑉𝑖 > 𝑉𝑅 𝑉0 = −𝑉𝑠𝑎𝑡 ; 𝑉𝑖 < 𝑉𝑅 Non Inverting Op-amp V0  R  = AV = 1 + 2  Vs  R1  Inverting Op-amp V0 −R = Av = 2 Vs R1 GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.33  Analog Electronics Voltage Follower V0 = VS Non Inverting Summing Amplifier 1  R  V0 = (V1 + V2 + V3 ) 1 + 2  3  R1  Inverting Summer V V V  V0 = −R f  1 + 2 + 3   R1 R2 R3  GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.34  Analog Electronics Difference/Subtractor  R4  R1 + R2   R2  V0 = V2    − V1    R3 + R4   R1   R1  Integrator Circuit Ideal Integrator Practical Integrator 1 − R f /R RC f  V0 = − Vs dt Vo = VS sR f C f + 1 Differentiator Circuit Ideal Differentiator Practical Differentiator d Vo −sR f C V0 = −Rf C Vin = dt VS 1 + sRC GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.35  Analog Electronics Schmitt Trigger Vsat R2 −Vsat R2 VUT = , VLT = R1 + R2 R1 + R2 Hysteresis Curve: VH = VUT − VLT 2Vsat R2 VH = R1 + R2  For more questions, kindly visit the library section: Link for web: https://smart.link/sdfez8ejd80if PW Mobile APP: https://smart.link/7wwosivoicgd4 GATE WALLAH ELECTRONICS AND COMMUNICATION HANDBOOK 7.36