Analog Basic Electronics Solved Past Papers 2021-2023 PDF

## PYQ-2021: Analog Basic electronics :- (BJT) ### School Education Department **1. Explain voltage divider biassing scheme of BJT and derive the expression of stability factor for the same scheme with proper circuit diagram and also explain why the voltage divider scheme is more preferred.** **A...

## PYQ-2021: Analog Basic electronics :- (BJT) ### School Education Department **1. Explain voltage divider biassing scheme of BJT and derive the expression of stability factor for the same scheme with proper circuit diagram and also explain why the voltage divider scheme is more preferred.** **Ans:** **Voltage divider biassing scheme: >** - Image of a circuit diagram with the following elements: - VCC - R1 - R2 - RC - RE - JB - B - E - VBE - VCE - IC collector current - IB base current - IE emitter current - VCEQ - Q point - Load line - ICB - VCB - **Fig. 1:** Voltage divider bias circuit **Defining Q-point for the voltage divider bias configuration.** - We follow some steps to modifying the circuit. - **Step 1:** Simplify the circuits, using Thevenin's theorem. - To find RTH: The voltage circuit is replaced by a short circuit; and calculate RTH as shown in the figure. - RTH = (R1*R2) / (R1+R2) - **Step 2:** Now choose the *Base - emitter loop* (input side) and *Collector - emitter* (output side) loop, and apply KVL to calculate IBQ, ICQ & VCEQ. - **Input side loop:** (B-E) - RTH * IB + VBE + RE(IC+IB) = VT - IB(RTH+RE) = VT - VBE - RE*IC - IB = (VT - VBE - RE*IC) / (RTH + RE) - **Output side loop:** (C-E) - VCC = IC*RC + VCE + RE(IC+IB) - VCE = VCC - RE(IC+IB) - RC*IC - Stability factor: - IC = (β+1)IB - The emitter resistance provides the stabilization of the circuit. - For a BJT, the stability factor is defined as the rate of change of IC with respect to the collector base leakage current, keeping β and VBE constant. - Stability factor donated as "S". - The process of making operating point independent of temperature changes or variation in transistor parameter is known as stabilization. - Stability factor also defined as the rate of change of collector current (IC) with respect to the current gain (β), keeping VBE and ICO constant. - S = dIC/dVBE. - Reverse saturation current (ICO), which doubles for every 10° rise in temperature. Current gain (β) increases when the temperature increases. VBE decreases by 2.5mV per temperature rise. - Stability factor defined as the rate of change of collector current (IC) with respect to the current gain (β), keeping VBE and ICO constant. - The small value of stability factor indicates good bias stability whereas as large value of stability factor indicates poor bias stability. For ideal case stability factor is equal to 1. - From equation (1) - IB = (VT - VBE - RE*IC) / (RTH + RE) - Multiplying (β) in both sides, we get: - β*IB = β(VT-VBE - RE*IC) - We know that: - IC = β*IB + (β+1)ICO - Put β*IB in equation (3): - IC(1+β*RE) = β*VT - β*VBE + (β+1)ICO - IC = (β*VT - β*VBE + (β+1)ICO)/(1+β*RE) - dIC/dICO = (β+1)/(1+β*RE) - If RTH is very small (RTH>>RE) - S~1 - dIC/dVBE = (β*RE)/(RTH+RE) = (β*(β+1)RE)/(RTH+RE) - If β is very very large - S~RE. - Why voltage divider is more preferred? - The voltage divider bias circuit is commonly used in amplifiers circuits. This circuit provides a stable operating point for the amplifier and helps in achieving an almost collector current which is almost independent of the transistor parameter. - The voltage divider bias circuit makes the operating point almost independent of current gain (β). - **Explanation:** - Q-point: In other bias configurations the bias current ICQ and the voltage VCEQ were a function of the current gain (β) of the transistor. However, because β is temperature sensitive, especially for Si-transistors, it is better to develop a bias circuit that would be less dependent on β. - Voltage divider bias is such a network where the bias is independent of β. - The sensitivity to changes in β is quite small. - Almost constant collector current. - The voltage divider bias circuit provides a stable operating point for the amplifier. It ensures that the transistor operates in the active region, where the output signal is faithful reproduction of the input signal. - Simplified design - Improved performance **2. A Ge transistor β = 49; VCC = 10V; RC=1KΩ, VBE=0.3V; VCE = 5V; IC=4.9mA; S=10; Determine R1, R2, RE** - Image of a circuit diagram with the following elements: - VCC=10V - R1 - R2 - RC=1KΩ - VBE=0.3V - RE - B - E - IC=4.9mA - VCE=5V - IE=IC+IB - = IC(1+(1/β)) - = 4.9(1+(1/49)) - = 4.9(50/49) - ≈ 5mA - RE = (VEE/IE) = 0.01/5 = 2Ω - VCC = IC(RC+RE) - 5 = 10-4.9*1 - 4.9*RE - 49*RE=5 + 4.9 - RE ≈ 0.1 - VTH = VBE+VE - VTH = 0.3+0.1 - VTH = 0.4V - RE = (VCC-VCE-ICRC)/(IC+IB) - RE = 10 - 5 - 4.9/4.9+0.1 - RE≈ 0.4/5 - RE ≈ 20Ω - RTH = (R1*R2)/(R1+R2) - 0.4 = 0.04*(R1+R2) - 10 = (R1+R2) - R1 = (0.04)*(R1+R2) - R1 = (0.04)*(10) - R1 = 0.4Ω - We know that: - S = (β+1)(1+RTH/RE) / (1+β+RTH/RE) - 10 = 50 (1+RTH/20)/(1+RTH/20) - RTH = (50+R1/20)*(20/(50+R1/20)) - RTH = 20*R1 / (50+R1/20) - RTH = 20*0.4 / (50+0.4/20) - RTH = 0.04225 Ω - RTH = (R1*R2)/(R1+R2) - 0.04225 = (R1*R2)/(R1+R2) - R1 = (0.04225*R1)/R2 + 0.04225 - R1*(1-0.04225) = 0.04225*(R1+R2) - 0.95775*R1 = 0.04225*(R1+R2) - R2*(1-0.04225) = 0.04225*R1 - R2 ≈ 5.3kΩ - (0.95775*R1)/0.04225 = 10.225Ω **3. For an emitter bias config., ICQ= 1/80*ISAT; ISAT = 8mA; VCC = 18V; β = 110; Determine RE & RB** - Image of a circuit diagram with the following elements - VCC = 28V - RE - RC - B - E - ICQ - IBQ - VBE - ICQ = 1/80*ISAT - ICQ = 1/80*8 - ICQ = 4/10 - ICQ = 0.4mA - RC = (VCC - VCE) / ICQ - RC = 28-18 / 0.4 - RC = 2.5kΩ - RE = (VCC-VCE) / ISAT - RE = 28-18 / 8 - RE = 3.5k - RB = (VCC-VBE) - (β+1)RE / IBQ? - RB = (28 - 0.7) - (110+1)*1/36.36 - RB = (27.3-111)/36.36 - RB = 639.8kΩ **4. Draw the CE confg. based fixed bias network for the appropriate terminals by including re and derive the expression of Zi, Zo, Av.** - Image of a circuit diagram with the following elements: - VCC - R1 - R2 - RE - B - E - C - C1 - C2 - Zi - Zo - Vi - Vo - RB - re - β - This model is used to perform a small signal ac analysis of a number of transistor network configuration. Modification of the standard configuration will be relatively easy to examine. - The input signal Vi is applied to the base of the transistor whereas the output Vo is off the collector. IC is not the base current; it is the source current, Io is the collector current. - Analysis begins by removing the DC effects of RC and C1, C2 by short circuit equivalents resulting in a network. - The common ground of the DC supply and the transistor emitter terminal permits the relocation of RB & RE in parallel with the input and output section of the transistor. - Substituting the re-model for the CE configuration of results in the network shown below: - The next step is to determine β, re, and ro. β is typically obtained from the specification sheet or by the transistor testing instrument. The value of re must be determined by the de analysis of the system. ro is determined obtained from the specification sheet or characteristics. - Zi = RB || β*re - Zi ≈ β*re - Zo = RC || ro - Zo ≈ RC when ro>>RC - Av = -RC/re - The resistor ro and RE in parallel. - Vo = -(β*ib)(RE||ro) - IB = vi - Vo = -(β*vi)(RE||ro) - If ro >> 10*RE, then the effect of ro can be ignored, so Av = -RC/re - The -ve sign in equation (iii) is a 180° phase shift between the input and output signals. **5. A silicon transistor uses potential divider bias where VCC =12V; R1=R2=10kΩ, RE=3kΩ; RC=4kΩ. Determine the Q-points using Thevenin’s theorem. ** - Image of a circuit diagram with the following elements: - VCC=12V - R1=10kΩ - R2=10kΩ - VBE=0.7V - RE=3kΩ - RC=4kΩ - B - E - C - IC - IB - Apply thevenin’s theorem. - RTH = (R1*R2)/(R1+R2) - RTH = (10*10)/(10+10) - RTH = 5kΩ - VTH = (VCC*R2)/(R1+R2) - VTH = 12*10/(10+10) - VTH = 6V - Let’s find IB: - VTH - IB*RTH - VBE - (IC+IB)RE = 0 - VTH - VBE = IB(RTH+(β+1)RE) - IB = (VTH-VBE)/(RTH+(β+1)RE) - IB ≈ (6-0.7)/(5+100*3+3) - IB ≈ 0.0172mA - IC = β*IB - IC = 100*(0.0172) - IC = 1.72mA - VCE = VCC – RE(IC+IB)-RC*IC - VCE = 12 - 3*(1.7240+0.0172) - 4*1.72 - VCE = 12 - 5.676 - 6.88 - VCE ≈ 0.856V - VEE = 1.72*(3+4) + 0.0172*3 + VCE = 12 - VEE = 12 - 12.0916 - VEE = -0.0916 **6. State Barkhausen criteria for oscillation** - An amplifier with positive feedback acts as an oscillator. - The transfer function: - Af = 1 - AB - A – gain of the amplifier - B – transfer function - AB – loop gain - For AB = 1, Af = 1 – 1 = 0 – ∞ - The loop gain |AB| = 1 - The phase shift around the loop is an integral multiple of 360° (2π). - ΦTS = 2nπ - n=1, 2, 3, - This is Barkhausen criteria. **7. Draw the Wien-bridge oscillation circuit and show that the gain of the amplifier A = 3 and the frequency of oscillation fo is 2πRC. Sustain oscillation condition.** - Image of a circuit with the following elements: - R1 - R2 - R - C - Te - V - Vo - β - OP-AMP (Non-Inverting amplifier) - Zs - ZP - Wien-Bridge Oscillator is an audio frequency sine wave oscillator of high stability and simple. - The feedback signal in this circuit is connected to the non-inverting input terminal so that op-amp is working as a non-inverting amp. - There is one re series and one parallel combination. - In sustain condition; : AB=1 - A = vo/vi = (R1+R)/ R1 - On applying voltage divider rule: - Vs = 2*Vo + (ZS/ZP)*Vo - As op-amp is operated in the non-inverting config., the voltage gain is 1: - A = (1+R2/R1) - Where Zs = R+1/sC = SCR+1/sC - Zp = R+1/sC = 1+SCR/sC - Now, on solving feedback gain, β = Vo/Vs - β = 1 / (1+Zp/Zs) - β = 1 / (1+ (1+SCR)/SCR) - β = SCR / (SCR+1+SCR) - β = 1 / (1+SCR+2) - β = 1/(SCR+2) - Now, separate the real and imaginary parts. We get: - R2 = 2 - A = 1+R2/R1 = 1+2/1 = 3 - (WCR – WCR) = 0 - WCR = WCR - w₀²=1 - w₀=RC - f = 1/(2πRC) = 2πRC **8. Determine the frequency of oscillation, fo = 2πRC, for the following circuit.** - Image of a circuit with the following elements: - R1=10KΩ - R2=10kΩ - R3=10KΩ - C1=0.001μF - C2=0.001μF - C3=0.001μF - OP-AMP (Non-Inverting amplifier) - fo = 1/(2πRC) - fo = 1/(2π*10*10^3*0.001*10^-6*10^6) - fo = 1.538*10^-4 - fo = 6501.95Hz - fo = 6.5kHz **9. It is Clapp oscillator. lets find frequency of oscillation.** - Image of a circuit with the following elements: - R1 - R2 - R3 - C1= 0.1μF - C2= 470pF - C3 = 47pF - OP-AMP (Non-Inverting amplifier) - 1MHz - f= 1/(2π√(LC)) - f = 1/(2π√((C1+C2)*C3)) - C1 = 0.1μF = 0.1*10^-6 - C2 = 470pF = 470*10^-12 - C3 = 47pF = 47*10^-12 - Ctot = 0.1*10^-6 + 470*10^-12 - Ctot = (470+100)*10^-12 - Ctot = 570*10^-12 - Ctot ≈ 570pF - - C = (Ctot*C3)/(Ctot+C3) - C = (570*47)*10^-12/(570+47)*10^-12 - C ≈ 42.72pF - - f = 1/(2π√(LC)) - f = 1/(2π√(1*10^-3*(42.72*10^-12))) - f = 1/(2π√(42.72*10^-15)) - f ≈ 159.23kHz **10. Find the output voltage Vout.** - Image of a circuit with the following elements: - V1=3V - V2=1V - V3 = -8V - R1 = 10kΩ - R2 = 10kΩ - R3 = 10KΩ - OP-AMP (Non-Inverting amplifier) - Vout - This circuit is a summing amplifier. - For this circuit - Vo = -(V1/Rf + V2/Rf + V3/Rf) - Here R1 = R2 = R3 = 10KΩ - Vo = - (V1+V2+V3)/Rf - Vo = -(3+1-8)/10 - Vo = -12V