Analog and Digital Electronics Question Bank PDF

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Prof. Ram Meghe Institute of Technology & Research, Badnera

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analog electronics digital electronics question bank engineering

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This document is an analog and digital electronics question bank from a university. It includes questions from different units.

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**PROF. RAM MEGHE INSTITUTE OF TECHNOLOGY & RESEARCH, Badnera** **Department of Computer Science & Engineering** **Subject: ANALOG AND DIGITAL ELECTRONICS** **QUESTION BANK** **UNIT 1** **1)** Explain the following terms I. Ideal diode II. Knee voltage III. Dynamic resistance or AC resistan...

**PROF. RAM MEGHE INSTITUTE OF TECHNOLOGY & RESEARCH, Badnera** **Department of Computer Science & Engineering** **Subject: ANALOG AND DIGITAL ELECTRONICS** **QUESTION BANK** **UNIT 1** **1)** Explain the following terms I. Ideal diode II. Knee voltage III. Dynamic resistance or AC resistance IV. Reverse saturation current V. Zener breakdown VI. Avalanche breakdown 2\) Determine the value of emitter current and collector current of a transistor having α=0.98 and Collector to base leakage current I~CB~=4µA. The base current is 50µA. 3\) With the help of char. explain the operation of P-N Junction Diode. What is the effect of forward & reverse biasing on depletion region? 4\) Explain how BJT can be used as amplifier. 5\) Draw & explain i/p &o/p char. of common emitter conf. of BJT. 6\) Explain in brief i. Cut in voltage of diode ii. Reverse breakdown voltage iii. Peak inverse voltage 7\) Discuss the behaviour of a P-N junction under forward and reverse biasing. 8\) Name the three possible transistor connection. Explain the operation of transistor as an amplifier. **UNIT 2** **1)** In case of a FET, the following readings are obtained experimentally. V~GS~ -0.1v -0.1v -0.4v V~DS~ 5v 14v 14v I~D~ 8mA 8.3mA 7.1mA Obtain a. AC drain resistance b. Transconductance c. Amplification factor 2\) Define : i. The pinch --off voltage ii. Channel ohmic region iii. Drain resistance iv. Trans conductance v. I~DSS~ i. Saturation current ii. Pinch off voltage iii. o/p admittance 6\) What are enhancement & depletion MOSFET? Explain construction & operation of Enhancement MOSFET. **7)** Draw static drain characteristics and the transistor characteristics curve per N-channel depletion type MOSFET. 8\] Sketch a typical transistor characteristics from N-channel JFET. Show how the transconductance gm can be derived from transfer characteristics. **UNIT 3** **1)** Determine the decimal number represented by the following binary number a\) 110101 b\) 101101 c\) 11111111 d\) 00000000 **2\]** Find two\'s complement of the numbers a\) 01100100 b\) 10010010 c\) 11011000 d\) 01100111 **3)** a) Convert (247)~10\ ­~ into octal b\) Convert (0.6875)~10~ into octal c\) Convert (3287.5100098)~10~ into octal **4)** Convert the following hexadecimal numbers into octal number a. A72E b. 0.BF85 5. Convert following numbers to decimal i. (1E2)~16~ ii. (214)~8~ 6\) Find subtraction of 110 & 101 using 2's complement method. 7\) Explain decimal number system, binary number system, octal number system & hexadecimal number system with example. 8\) Convert following binary to: i. (110110001010)~2~ = octal ii. (100110)~2~ = grey code iii. (11110)~2~ to excess-3 code **UNIT 4** 1. Solve following logic function using Quine-McCluskey method 2. Reduce following function using K-map & also draw the logic diagram 3. Minimize following switching function using K-map **UNIT 5** 1. Describe the step of combinations logic design. Explain with suitable example. 2. Implement following function using suitable multiplexer 3. Explain in detail 4-bit parallel subtractor. 4. Implement following expression using decoder i. f~1~ = M(0,1,5,8,9) ii. f~2~ = M(1,2,3,7,12,14) **5.** Realize the logic function a. 16:1 mux b. 8:1 mux **6.** Implement the expression using a multiplexer **7.** Design 40:1 mux using 8:1 mux **8.** Design 32:1 mux using two 16:1 mux IC~S~. **UNIT 6** **Q1)** Design 3-bit synchronous counter using J-K FLIP FLOPS. **2\]** Design 3-bit up/down counter with a direction control m. Use J-K FLIP FLOPS. **3\]** Explain 3-bit counter using flip flop with the help of waveform. **4\]** Identify Q and [\$\\overline{Q}\$]{.math.inline} outputs of the clocked J-K flip flop as shown in fig. ![](media/image2.jpeg) i. SR FF ii. T FF 7. Design synchronous MOD -- 6 counter using JK FF. 8. Convert SR FF to JK FF.

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