CH IV-A - Memory

What does the tag in cache memory indicate?

In cache memory, what is the purpose of the valid bit?

What happens when there is a miss in the cache memory?

In direct-mapped cache, how many block frames are checked for a hit?

What are the three main strategies used in fully associative or set associative cache for block replacement?

What is the purpose of a dirty bit in cache memory?

Which write policy involves writing data to both the cache block and the lower-level memory in parallel?

How does LRU replacement help in reducing cache misses?

In cache memory, when considering block replacement, what does FIFO approximation aim to do?

Which scenario can lead to a write stall in cache memory?

What is a common optimization technique to reduce write stall in cache memory?

Why does LRU become increasingly expensive as the number of blocks to keep track of increases?

What distinguishes write-back from write-through policies in cache designs?

What problem can occur due to multiple writes within a cache block under write-back policy?

How does pseudo-LRU offer an advantage as compared to pure LRU when managing large caches?

In the context of cache memory block placement, in which organization is a block found by directly calculating its position using a modulo operation?

When considering cache memory block placement, which category allows a block to be placed anywhere within the cache?

What is the term for cache placement where a block can be placed in a restricted set of places within the cache?

In cache memory block placement, what naming convention is used when there are n blocks in a set?

Which cache placement category involves grouping blocks into sets and allows a block to be placed anywhere within its assigned set?

If a cache has 8 blocks and memory has 32 blocks, what would be the cache placement strategy based on this information?

How does the principle of temporal locality impact memory access?

Which guideline, together with the principle of locality, led to memory hierarchies?

In a memory hierarchy, what happens to memory as it moves farther away from the processor?

What is the main benefit of having spatial locality in memory references?

What characteristic allows smaller hardware to be made faster within a given implementation technology and power budget?

Why is it important to take advantage of the principle of locality to improve performance?

Which cache organization category offers full flexibility but at the cost of complexity and implementation cost?

In terms of block placement, which category of cache organization exhibits possible inefficiency due to inflexibility?

How might a fully associative cache with m blocks be viewed in terms of set associativity?

What is the alternative term for 'block address' in the context of cache memory?

Which cache organization category could be seen as a one-way set associative i.e., a set with just one block?

If the main memory response time is much longer than the processor execution time in von Neumann architecture, what action does the processor take?

What is the significance of the von Neumann Bottleneck in computer architecture?

In a computer system facing the von Neumann Bottleneck, why is improving cache memory performance crucial?

Which action would be most effective in addressing the performance gap between main memory and processor execution time?

How does the Principle of Locality help in mitigating issues arising from the von Neumann Bottleneck?

What role does the Memory Hierarchy serve in addressing performance challenges posed by von Neumann architecture's bottleneck?

What is the purpose of dividing the memory hierarchy into blocks (or lines) in cache memory?

How does cache memory handle a scenario where a requested word is not found in the highest cache level?

What distinguishes cache memory from other types of memory in terms of visibility to programmers?

In a multiprocessor system, why is cache coherence critical when handling memory requests?

What happens in cache memory when a requested data item is not found?

How does hierarchical cache organization contribute to data access efficiency in modern computers?

What impact does having nested loops with a large number of iterations have on main memory access when using instruction cache?

What does a cache hit signify in terms of data retrieval?

What role does a valid bit play in ensuring accurate data retrieval from cache memory?

Why are caches typically divided into separate instruction and data caches?

What is the purpose of the tag field in block identification?

What does the index field do in block identification for a set associative cache?

For a 1 kB direct-mapped cache with 32 B blocks, what is the block size?

In cache memory, what is the purpose of the offset field?

What happens in block identification when there is a cache hit?

In cache memory, what is the significance of the tag?

What is the purpose of the index field in a set associative cache?

How is the block offset used in cache memory?

What does a cache miss indicate in block identification?

In a direct-mapped cache, what does the tag field represent?

Explain the purpose of the dirty bit in cache memory.

What is the main difference between write through and write back cache write policies?

How does a write buffer help reduce write stalls in cache memory?

What is the benefit of using a FIFO replacement policy in cache memory?

Explain the concept of pseudo-LRU and its advantage over pure LRU in cache management.

What is the purpose of the index field in a set associative cache?

Describe the write back cache policy and its pros and cons.

How do multiprocessors benefit from using write back and write through cache policies?

Explain the significance of the tag field in cache memory.

How does the principle of locality influence block replacement strategies in cache memory?

Explain the trade-offs involved in block placement in set associative cache organization.

Describe the concept of a one-way set associative cache.

How can a fully associative cache with 'm' blocks be viewed in terms of set associativity?

What are the two parts into which the cache address is divided in a fully associative cache?

Explain the relationship between a direct-mapped cache and a one-way set associative cache.

What is the performance gap measured as in the context of memory systems?

Why can't all memory on a computer be made from the same CPU technology?

What is the main principle behind memory hierarchy in computer programs?

What is the significance of volatile memories compared to non-volatile memories?

How does the Principle of Locality help in predicting a program's future data and instruction usage?

What is the purpose of memory hierarchy in computer systems?

How does the memory hierarchy improve performance based on the principle of locality?

Explain the relationship between memory proximity to the processor and its speed.

How does cache memory utilization reflect the principle of spatial locality?

Describe the impact of temporal locality on memory access patterns.

What role does the principle of locality play in guiding memory hierarchy design?

How does the concept of memory hierarchy address the trade-off between memory speed and capacity?

What does the tag of every cache block represent in block identification?

How is the block frame address divided in block identification?

What is the purpose of the offset field in block identification?

Explain the block identification example given with AR = 01173 and DR = 12.

What are the fields of an address in block identification for set associative or direct mapped cache?

For a 1 kB direct-mapped cache with 32 B blocks, what are the sizes of the tag, index, and offset fields?

What is the purpose of the tag in block identification in cache memory?

In cache memory block replacement, what are the three main strategies used in fully associative or set associative caches?

What is the significance of the index field in a set associative cache for block identification?

Explain the concept of pseudo-LRU and its advantage over pure LRU in cache management.

What is the purpose of the offset field in cache memory?

How does the principle of temporal locality impact memory access?