Field Effect Transistor (FET) Basics

Study Notes

"Field effect" relates to the depletion region formed in the channel of a FET when voltage is applied on one of its terminals (gate).

Two main types of FETs are:
- Junction Field Effect Transistor (JFET)
- Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

VDD provides a drain-to-source voltage and supplies current from drain to source.
VGG sets the reverse-bias voltage between gate and source.
JFET is always operated with the gate-source pn junction reverse biased.
Reverse-bias of gate-source junction with negative gate voltage produces a depletion region along pn junction, increasing resistance by restricting the channel width.
Greater VGG narrows the channel, increasing the resistance of the channel and decreasing ID.
Less VGG widens the channel, decreasing the resistance of the channel and increasing ID.
The channel width and resistance can be controlled by varying the gate voltage, controlling the amount of drain current, ID.

As VDD (and thus VDS) is increased from 0V, ID will increase proportionally in the ohmic region.
In this area, the channel resistance is essentially constant because of the depletion region.
IG = 0, an important characteristic for JFET.
At point B, the curve levels off and enters the active region where ID is constant.
The value of VDS at which ID becomes constant is the pinch-off voltage, VP.
As VDD increases from point B to point C, the reverse-bias voltage from gate to drain produces a depletion region large enough to offset the increase in VDS, keeping ID relatively constant.

VDS increases above VP, produce almost constant ID called IDSS.
IDSS (drain to source current with gate shorted) is the maximum drain current at VGS = 0V.
Breakdown occurs at point C when ID begins to increase very rapidly with any further increase in VDS, which can result in irreversible damage to the device.
JFETs are always operated below breakdown and within the constant-current area.

As VGS is set to increasingly more negative values by adjusting VGG, a family of drain characteristic curves is produced.
ID decreases as the magnitude of VGS is increased to larger negative values because of the narrowing of the channel.
For each increase in VGS, the JFET reaches pinch-off at values of VDS less than VP.