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Questions and Answers
What is the primary advantage of the InfiniBand protocol over other bus standards?
What is the primary advantage of the InfiniBand protocol over other bus standards?
High throughput and very low latency
What is the main application of the MIL-STD-1553 bus?
What is the main application of the MIL-STD-1553 bus?
Military avionics and spacecraft
What is the key feature of the ARINC 429 bus that allows it to support multiple devices?
What is the key feature of the ARINC 429 bus that allows it to support multiple devices?
One transmitter and up to 20 receivers
What is the primary goal of the Avionics Full-Duplex Switched Ethernet (AFDX) implementation?
What is the primary goal of the Avionics Full-Duplex Switched Ethernet (AFDX) implementation?
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What bus standard did PCI-e replace?
What bus standard did PCI-e replace?
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What is the primary role of the bus master in a master-slave bus scheme?
What is the primary role of the bus master in a master-slave bus scheme?
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What is the main drawback of having the processor as the only bus master in a system?
What is the main drawback of having the processor as the only bus master in a system?
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What is the primary goal of arbitration methods in bus design?
What is the primary goal of arbitration methods in bus design?
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What is a major limitation of the daisy chain scheme in bus arbitration?
What is a major limitation of the daisy chain scheme in bus arbitration?
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What is the primary benefit of using multiple bus masters in a system?
What is the primary benefit of using multiple bus masters in a system?
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How does the bus master control the access to the bus in a master-slave bus scheme?
How does the bus master control the access to the bus in a master-slave bus scheme?
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What is the main limitation of using a single bus master, such as the processor, in a system?
What is the main limitation of using a single bus master, such as the processor, in a system?
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How does the daisy chain scheme impact bus speed?
How does the daisy chain scheme impact bus speed?
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What is the main advantage of using centralized arbitration with a bus arbiter?
What is the main advantage of using centralized arbitration with a bus arbiter?
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What is the primary function of an arbitration method in bus design?
What is the primary function of an arbitration method in bus design?
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Study Notes
Bus Definition and Characteristics
- A bus is a shared communication link that carries address, data, and control signals.
- A bus is a set of wires used to connect multiple subsystems.
- It is a basic tool for building large and complex systems.
Bus Components
- Address bus (or address lines): identifies the source of a data flow.
- Data bus (or data lines): carries data or instructions.
- Control bus (or control lines): handles control signals such as read/write, interruptions, and bus clock.
Bus Advantages and Disadvantages
- Advantages: versatility, low cost, and easy integration of new devices.
- Disadvantages: bus bandwidth can limit I/O throughput, and maximum bus speed is limited by bus length and number of devices.
Bus Design
- Bus width: determines the size of the addressable memory.
- Bus clocking scheme: can be synchronous (with a clock) or asynchronous (without a clock).
- Operation: typically involves a master device controlling a couple of slave devices.
- Arbitration method: necessary to ensure that only one device can access the bus at a time.
Bus Arbitration Methods
- Distributed arbitration by self-selection: each device places its own code to indicate its identity.
- Distributed arbitration by collision detection: e.g., Ethernet.
- Authorization given in sequence: e.g., daisy chain.
- Authorization given in a central manner: e.g., centralized arbitration.
Bus Examples
- Peripheral Component Interconnect - PCI Express (PCI-e): connects devices in personal computers.
- InfiniBand - IB: used in clusters and racks, with high throughput and low latency.
- MIL-STD-1553: used in military avionics and spacecraft, with a bus controller and redundant links.
- ARINC 429: used in commercial aircraft, with a pair of wires accommodating one transmitter and up to 20 receivers.
- Avionics Full-Duplex Switched Ethernet - AFDX: an implementation of deterministic Ethernet, used in avionics.
Bus Design Overview
- Bus speed and bandwidth are impacted by four main factors: bus width, bus clocking scheme, operation, and arbitration method.
Bus Width
- The number of address lines determines the size of the addressable memory.
- A greater number of lines require more wires and larger connectors, making the hardware more expensive.
- Examples of processors with different address lines: 8088 (20), 80286 (24), 80386 (32).
- Multiplexing data and addresses in different phases can reduce the number of lines, but also reduces bus performance.
Bus Clocking Scheme
- Buses can be either synchronous or asynchronous.
- Synchronous buses have a clock in the control lines, following a fixed protocol for communication.
- Advantages: requires little logic, can run fast.
- Disadvantages: all devices must run at the same clock rate, cannot be long if fast.
- Asynchronous buses are not clocked, can accommodate a wide range of devices, and can be lengthened without worrying about clock skew.
- Disadvantages: requires a handshake protocol.
Bus Operation
- Buses often have a master device controlling multiple slave devices.
- A bus transaction involves two parts: request (master issues command and address to slave) and action (command execution, e.g., data transfer).
- Figure 9.9 illustrates a master-slave bus scheme with a unidirectional control bus and a bidirectional data bus.
Bus Definitions
- A bus is a shared communication link carrying address, data, and control signals.
- A bus is a set of wires used to connect multiple subsystems.
- Figure 9.6 shows a simplified view of a system bus with memory and I/O.
- Figure 9.7 shows a memory bus and an I/O bus connecting devices to the processor.
Bus Components
- Address bus (or address lines) identifies the source of a data flow.
- Address bus bandwidth determines the maximum addressing capacity of a device.
- Data bus (or data lines) carries data or instructions, and is typically bidirectional.
- Data bus bandwidth determines performance.
- Control bus (or control lines) handles control signals such as read/write, interruptions, and bus clock.
Pros and Cons of Buses
- Advantages: versatility, ease of integration, low cost.
- Disadvantages: bus becomes a bottleneck in the system, limiting I/O throughput, and bus speed is limited by bus length and number of devices.
Arbitration Method
- A master-slave scheme is used to avoid chaos, with the bus master controlling access to the bus.
- In the simplest system, the processor is the only bus master.
- To accommodate multiple bus masters, an arbitration method is needed to define means of assuring that only one device is selected as master at a time.
- Four possible arbitration classes: distributed arbitration by self-selection, distributed arbitration by collision detection, authorization given in sequence (e.g., daisy chain), and authorization given in a central manner (e.g., centralized arbitration).
Daisy Chain
- A simple but unfair arbitration method, where a low-priority device may be locked out forever.
- The use of daisy chain grant signal also impacts bus speed.
Centralized Arbitration with a Bus Arbiter
- In centralized arbitration, the arbiter handles all requests and gives access to devices according to their priorities.
- The arbiter sends a grant signal to the highest priority device, which then sends the grant signal to the next priority level device when it finishes its computation.
- A possible problem in this system is when a device fails and never sends the grant signal back to the chain.
Bus Design
- Bus speed and bandwidth are impacted by four main points: bus width, bus clocking scheme, operation, and arbitration method.
- Bus width determines the size of addressable memory, with a greater number of lines allowing more addressable memory but increasing hardware cost.
- Bus width can be increased by multiplexing data and addresses in different phases/time, but this reduces bus performance.
Bus Clocking Scheme
- Buses can be either synchronous or asynchronous.
- Synchronous buses include a clock in the control lines, have a fixed protocol for communication, and require all devices to run at the same clock rate.
- Asynchronous buses are not clocked, can accommodate a wide range of devices, and can be lengthened without worrying about clock skew.
Operation
- Buses often consider a master device in control of one or more slave devices.
- A unidirectional control bus (from master to slave) and a bidirectional data bus between them exist.
- A bus transaction consists of two parts: the request, where the master issues a command and an address to the slave, and the action, which is the actual command execution.
Obtaining Access to the Bus
- The master-slave scheme is used to avoid chaos, where only the bus master controls access to the bus and starts and handles all bus requests.
- The slave responds to read or write requests, and in the simplest system, the processor is the only bus master.
Arbitration Method
- Arbitration allows multiple bus masters in a same bus, ensuring that only one device is selected as master at a time.
- The method must consider priority among devices and fairness, ensuring even the lowest priority device operates.
- Four possible arbitration classes exist: distributed arbitration by self-selection, distributed arbitration by collision detection, authorization given in sequence, and authorization given in a central manner.
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Description
Learn about the basics of buses in computer systems, including definitions and types of buses, such as address, data, and control buses. Understand how buses connect multiple subsystems and enable complex systems.
