Computer Bus Design

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Questions and Answers

What is the primary factor that determines the size of the addressable memory in a bus design?

  • Number of clock lines
  • Number of address lines (correct)
  • Number of control lines
  • Number of data lines

What is the disadvantage of increasing the bus width to increase bus capacity?

  • It increases the cost of the hardware (correct)
  • It reduces the performance of the bus
  • It makes the bus more asynchronous
  • It requires more complex logic

What is a characteristic of a synchronous bus?

  • It is not clocked
  • It can accommodate a wide range of devices
  • It includes a clock in the control lines (correct)
  • It requires a handshake protocol

What is the advantage of a synchronous bus?

<p>It requires very little logic (A)</p> Signup and view all the answers

What is a characteristic of a master-slave architecture?

<p>It is a two-part bus transaction (C)</p> Signup and view all the answers

What is a disadvantage of synchronous buses?

<p>All devices on the bus must run at the same clock rate (D)</p> Signup and view all the answers

What is a limitation of the daisy chain arbitration method?

<p>A low-priority device may be locked out forever. (C)</p> Signup and view all the answers

What is a common technique used to reduce the number of lines in a bus design?

<p>Multiplexing of data and addresses (D)</p> Signup and view all the answers

What is the main characteristic of centralized arbitration?

<p>It has a bus arbiter that controls access to the bus. (D)</p> Signup and view all the answers

What is the advantage of using a centralized arbitration method with a bus arbiter?

<p>It provides a single point of control for bus access. (A)</p> Signup and view all the answers

What is a limitation of multiplexing data and addresses?

<p>It reduces the performance of the bus (B)</p> Signup and view all the answers

What is the primary use of the InfiniBand (IB) bus?

<p>In clusters and racks. (D)</p> Signup and view all the answers

What is the main characteristic of the PCI Express (PCI-e) bus?

<p>It is a point-to-point topology. (C)</p> Signup and view all the answers

What is the primary use of the MIL-STD-1553 bus?

<p>In avionic systems. (B)</p> Signup and view all the answers

What is the main characteristic of the ARINC 429 bus?

<p>It is used in commercial aircraft. (D)</p> Signup and view all the answers

What is the main characteristic of the Avionics Full-Duplex Switched Ethernet (AFDX) bus?

<p>It is a deterministic Ethernet. (A)</p> Signup and view all the answers

What is the primary function of a master in a master-slave architecture?

<p>To start and handle all bus requests (C)</p> Signup and view all the answers

What is the main drawback of a system where the processor is the only bus master?

<p>The processor is involved in everything (B)</p> Signup and view all the answers

What is the primary purpose of bus arbitration?

<p>To ensure that only one device can access the bus at a time (B)</p> Signup and view all the answers

What is an example of a distributed arbitration method by collision detection?

<p>Ethernet (A)</p> Signup and view all the answers

What is the primary advantage of a master-slave architecture?

<p>It ensures that only one device can access the bus at a time (A)</p> Signup and view all the answers

What is a distributed arbitration method by self-selection?

<p>A method where each device places its own code to indicate its identity (C)</p> Signup and view all the answers

What is the primary function of a slave in a master-slave architecture?

<p>To send and receive data accordingly (C)</p> Signup and view all the answers

How many bus arbitration classes are described in the content?

<p>4 (C)</p> Signup and view all the answers

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Study Notes

Bus Design

  • Bus design involves bus width, bus clocking scheme, operation, and arbitration method
  • Bus width determines the size of the addressable memory
  • Increasing bus width increases bus capacity, but also creates physical connection problems
  • Multiplexing data and addresses in different phases can reduce the number of lines, but also reduces bus performance

Bus Clocking Scheme

  • Synchronous bus: includes a clock in the control lines, fixed protocol for communication, and can run fast
  • Synchronous bus disadvantages: all devices on the bus must run at the same clock rate, and buses cannot be long if they are fast
  • Asynchronous bus: not clocked, can accommodate a wide range of devices, and can be lengthened without caring about clock skew
  • Asynchronous bus requires a handshake protocol

Operation

  • Master-slave scheme: avoids chaos, with the bus master controlling access to the bus and handling all bus requests
  • Slave responds to read/write requests
  • Simplest system: processor is the only bus master, and all bus requests must be controlled by the processor
  • Big drawback: processor is involved in everything

Arbitration Method

  • Centralized arbitration with a bus arbiter: authorization given centrally
  • Daisy chain arbitration method: simple, but cannot assure fairness, and a low-priority device may be locked out forever
  • Four possible arbitration classes: distributed arbitration by self-selection, distributed arbitration by collision detection, authorization given in sequence, and centralized arbitration

Examples of Bus Designs

  • Peripheral Component Interconnect (PCI Express or PCI-e): created by Intel, Dell, HP, IBM, connects HDD, SSD, Ethernet, graphics, and other cards in personal computers, point-to-point topology, and replaces other standards
  • InfiniBand (IB): originated by Compaq, Dell, Hewlett-Packard, IBM, Intel, Microsoft, and Sun, typically used in clusters/racks, very high throughput, and very low latency
  • MIL-STD-1553: avionic data bus for use with military avionics, also used in spacecrafts, dual technology, bus controller handling multiple remote terminals connected with redundant links
  • ARINC 429: predominant avionics data bus, used on most commercial aircraft, pair of wires accommodates one transmitter and up to 20 receivers
  • Avionics Full-Duplex Switched Ethernet (AFDX): implementation of deterministic Ethernet, defined by ARINC, addresses real-time issues

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