Operational Amplifiers PDF

051 The operational amplifier (opamp) is certainly the...

051 The operational amplifier (opamp) is certainly the main building block in all of the analog electronics. It is usually implemented in a feedback loop to provide stable and predictable gain and low noise. In this chapter we will review what is required to make sure that this amplifier is stable under all conditions of feedback. An opamp is required not only to be stable but also to provide a well-behaved response. For example, peaking in the frequency domain is normally to be avoided. Also, when a square waveform is applied to an opamp, we don’t want any ringing. All these requirements will impose some fairly precise settings on the positions of the poles and zeros of this amplifier. Adding the requirement that the power consumption be minimized, we will find that it is quite easy to find an optimum in performance, in view of a certain GBW and capacitive load. However, there are many more specifications in an opamp. They will be postponed to the Chapter following this one. 052 First of all, we have to review some of the terminol- ogy of an operational ampli- fier, such as open-and closed-loop gain. Also, we want to review some basics of second-order systems. These are the first two Sections. We put emphasis on two-stage amplifiers. We have dealt with single-tran- sistor stages already in Chapter 2. We will focus especially on that positive zero which shows up in any two-stage opamp. They can be avoided by means of additional current consumption. It is much more elegant however, to use some circuit tricks which allow the reduction of the total biasing current. Finally, we will extended the compensation techniques, adopted for a two-stage amplifier, to three-stage amplifiers. Many class-AB amplifiers have three stages. Moreover, three stages become a necessity once the gain per stages has gone down to real low values, as in nanometer CMOS. 149 150 Chapter #5 053 Operational amplifiers have been used to carry out oper- ations on analog signals with great precision. They allow the addition, subtrac- tion, multiplication, etc. of analog voltages. This is shown in this slide for three input voltages. The output voltage is a precise sum of the input voltages, scaled by the corresponding resistors. This only works well pro- vided the opamp itself has high gain up to high fre- quencies, with low noise, etc. High gain means that for any output voltage, the differential input voltage is about zero. The input currents are always zero if we use MOSTs and no bipolar transistors. In nanometer CMOS some Gate current may show up, giving rise to problems with the input currents! This means that the most important specification of an opamp is its gain and bandwidth or its gain bandwidth product GBW. We will optimize the GBW of an opamp for a certain capacitive load, towards minimum power consumption. 054 Most simple opamps only have one single-output. This has been the case in most discrete electronics. All volt- ages are referred to ground, which is easy to reach on a printed circuit board, for example. In integrated circuits, more and more analog func- tions are integrated together with digital blocks. As a result, the substrate is pol- luted with clock spikes and logic noise. In this mixed- signal environment, all cir- cuits must be fully-differential. This doubles the power consumption but rejects the common- mode noise. We will discuss single-ended amplifiers first and then construct fully-differential amplifiers in Chapter 9. Stability of operational amplifiers 151 055 An opamp can have a volt- age input or a current input. A voltage opamp has a differential voltage amplifier as an input (see left). It senses an input voltage. It usually contains a single-transistor as a second stage. The output itself is at a high impedance level, at least at low frequencies. It therefore acts as a current source for the load. As a result, we have a voltage-current amplifier or transconductance amplifier. It is often called Operational Transconductance Amplifier. The other amplifier (see right) has a current input, because the first transistor at the input is a cascode. It also has a current output. It is thus a current-current amplifier. Needless to say that the characteristics are very different. They are difficult to compare as they involve external resistors. 056 All possible combinations for voltage/current input and output are depicted in this slide. The operational transconductance amplifier is the second one. If we add a (class AB) output to this OTA, we obtain a voltage output. This is now a conventional operational amplifier. Its voltage gain is normally very high. It is not that easy to com- pare an OTA to an opamp, as the voltage gain of an OTA depends on the load R. L Both amplifiers can be realized with a current input. They have different names depending on who is talking. In order to compare a current input amplifier to a voltage-input amplifier is more difficult. 152 Chapter #5 Indeed, sometimes a current-input amplifier is driven from an input voltage source, having a source resistance R. Clearly, this resistance shows up in the comparison with a voltage amplifier. S Obviously the smaller we can make R , the better. S We will start with an OTA. 057 Opamps and OTA’s are used with feedback. Normally, resistors are used, but also (switched) capacitors and sometimes even inductors. Some easy configurations are sketched in this slide. The first one is the inverting amplifier, the second one the non-inverting amplifier. However, they have all gains which are easy to set precisely. They all have different input resistances. The last configuration is a buffer. The gain is unity but the input impedance is very high and the output impedance low. 058 Opamps are used to make all kinds of filters as well. The simplest one is prob- ably the integrator. At ever lower frequencies, the gain increases continu- ously until the value is reached of the open-loop gain of the opamp itself. At all other frequencies, a constant slope is obtained of −20 dB/decade, and a con- stant phase shift of 90°. Stability of operational amplifiers 153 059 A first-order low-pass filter is an integrator with a resis- tor across the capacitor. It is also called a lossy integrator. At lower and lower fre- quencies, the gain is now set by the ratio of the two resistors. At the pole frequency, or the bandwidth, the phase shift is exactly halfway between zero and 90°, which is 45°. Note that a first-order decreasing characteristic, which is called a pole, always shows a slope of −20 dB/decade and −90° phase shift. 0510 Inductors can obviously be used as well. Substitution of the capac- itor by an inductor provides a high-pass characteristic. At high frequencies, the gain will be reduced by the internal poles of the opamp itself, as we will see later in this Chapter. 154 Chapter #5 0511 Another high-pass filter is shown in this slide. It uses a capacitor. The transfer char- acteristic is very different. At very low frequencies, the gain is constant. It starts increasing at the zero fre- quency. Note that a first-order increasing characteristic, which is caused by a zero, always shows a slope of 20 dB/decade and a 90° phase shift. Obviously, at high fre- quencies, the gain will decrease because of the internal poles of the opamp itself. 0512 Another filter with a low- pass characteristic is shown in this slide. At high frequen- cies it now has a constant gain. Since we are dealing with a pole at zero frequency and a zero here, the phase shift is different. Many more filters can be realized by means of opamps. These few exam- ples have been added to illustrate this point. We will now focus on the poles and zeros within the opamp itself. Stability of operational amplifiers 155 0513 An opamp always has one internal dominant pole. It occurs at frequency f. It is 1 normally caused by one of the bigger capacitances inside the amplifier. The product of the open- loop gain A and this pole o frequency f is the GBW. 1 The GBW is the product of the gain and the bandwidth, for each setting of the gain. Indeed, the ratio of the two resistors, in an inverting amplifier for example, sets the closed-loop gain A. The c corresponding bandwidth is the f. Their product is again the GBW. 1c In the case of a unity-gain buffer, the bandwidth coincides with the GBW, which is the maximum frequency at which this opamp can be used. An opamp allows therefore, an exchange gain for bandwidth. The lower the closed-loop gain, the higher the bandwidth. The product is always the GBW. An opamp is a very versatile building block. 0514 Using an opamp with feed- back is only a special case of a feedback system. How- ever, in such a system the gain block G has a lot of gain, which is not very precise. The feedback elements, which are resistors and capacitors, determine the closed-loop characteristic. They are very precise. The loop gain is the ratio of the open-loop gain and the closed-loop gain. It is the gain, going around in the loop. It is the quantity that determines all the properties of a feedback system. It is the quantity which indicates how the input and output impedances change. This will be explained in a more rigorous way in Chapter 8. 156 Chapter #5 0515 An opamp is really a single- pole system. As a result, it allows exchange of gain with bandwidth, within a specific GBW. Because there is only one dominant pole, there can be only one internal node at high impedance. If there are more nodes at high imped- ance, then we have more poles. In this case we have to add capacitance or increase the currents, such that this second pole, the nondominant pole, is at sufficiently high frequencies, beyond the GBW. All two-stage amplifiers have two high-impedance nodes and hence two poles. Therefore, all amplifiers with two high-impedance nodes are called two-stage amplifiers, irrespective of the number of transistors. We will have to compensate these two-stage amplifiers, i.e. we will have to add capacitance or increase currents to shift the non-dominant pole out to sufficiently high frequencies. As a result, the amplifier resembles again a single-pole system. Wideband amplifiers are very different. They consist of more stages, each of them having a pole. They are normally compensated at one particular setting of the gain. They are not meant to exchange gain for bandwidth. On the contrary, at that gain setting, they are optimized for maximum bandwidth. More about such amplifiers is given in Chapter 8. 0516 If the operational amplifier is truly a single-pole ampli- fier, then it can never show peaking or any other form of instability. Indeed the slope of −20 dB/decade is then maintained to frequen- cies beyond its GBW. Also, its phase of −90° is constant for all frequencies beyond the bandwidth f. 1 Application of unity-gain feedback results in an ampli- fier, the bandwidth of which coincides with the GBW. There is no trace of peaking. Stability of operational amplifiers 157 Peaking or onset of oscillation would only be possible if the phase characteristic approached the −180° line. In this case the negative feedback would be converted into positive feedback and oscillation would be possible. We will have to verify how far away the phase is from that critical −180°. This is why this phase distance has received a name. It is called phase margin. It is taken at the frequency where the loop gain is unity. In this case this frequency is the GBW. Clearly, a phase margin of 90° is large enough not to find peaking, or any form of oscillation. 0517 This is very different for an opamp with two poles at fre- quencies f and f. 1 2 Each pole causes a phase shift of −90°. As a result, we find a phase shift at high frequencies. This means that at high frequencies, the signal is inverted. There is still a loop gain slightly larger than unity. Negative feedback turns into positive feedback with a little bit of gain. We obtain therefore, an oscillator rather than an amplifier! At the frequency where the loop gain becomes unity (which here is the GBW), the phase margin PM is not quite zero. If it were zero we would have a real oscillator. It is not quite zero but very small. This is why this amplifier shows a tendency for oscillation. It shows a large amount of peaking at that frequency. We do not want peaking because such a peak is very irreproducible. Moreover the noise is deteriorated by that peak. Remember, noise has to be looked at on a linear frequency axis. Such a peak then extends over most of the frequency range. The question is, how far do we have to stay with our phase characteristic from this critical −180°; how large can the phase margin PM be allowed to increase to avoid this peaking? 158 Chapter #5 0518 Nevertheless, the same amplifier, with two poles, can be used without peak- ing. It is sufficient to use it at a higher closed-loop gain A. c The closed-loop gain is quite high now. As a result, the loop gain is much smaller. Moreover, when we check where the loop gain becomes unity, we find a fre- quency at which the phase margin PM is quite high. This is why there is no peaking. The amplitude curve is quite nicely rounded. It is clear that the same amplifier can show peaking or not, depending on the actual closed- loop gain A. It is also clear that for unity-gain feedback, the frequency where we have to check c the phase margin is the highest. The phase margin is the smallest at the highest frequency. Unity- gain amplifiers give the highest amount of peaking! 0519 Let us now gradually lower the closed loop gain A. c The loop gain increases, and the frequency at which we have to read the phase margin increases. The phase margin thus decreases and the peaking is gradually showing up! Stability of operational amplifiers 159 0520 For even lower closed-loop gain A , the loop gain c increases further, and the frequency at which we have to read the phase margin increases even more. The phase margin thus decreases further and the peaking therefore becomes more severe! 0521 Finally, we have again reached the point of unity- gain closed-loop gain A. c The loop gain is the same as the open-loop gain. The fre- quency at which we have to read the phase margin is now the GBW. The phase margin has become very small and the peaking is most severe! It is clear that the worst peaking has been obtained for the largest loop gain, i.e. for the lost closed-loop gain or for unity gain. This is clearly the worst case. We will try to avoid this peaking by adding a compensation capacitance or by increasing the currents. It is clear that an amplifier which has been compensated at unity gain, is overcompen- sated at most other settings of closed-loop gain. 160 Chapter #5 0522 How can we compensate a two-pole amplifier? The objective is quite straightforward. We have to find a means to shift the second or non-dominant pole f to higher frequencies. 2 The extra −90° attributed to this pole has now disap- peared. The phase margin is now 90°. To illustrate the effect of shifting the non-dominant pole to higher frequencies, we repeat the Bode dia- grams for the same two-pole amplifier and the same unity-gain, but with three different positions of the nondominant pole f. 2 In the Bode diagrams shown in this slide, the second pole f is clearly too close to the first 2 one f. Large peaking results. 1 0523 Shifting the second pole to higher frequencies increases the phase margin and de- creases the peaking. In this case the non-domi- nant pole f coincides with 2 the GBW. As a result the phase margin is 45°. The peaking is smaller indeed. Stability of operational amplifiers 161 0524 Finally, we have shifted the non-dominant pole f to a 2 value which is about three times the GBW. In this case the phase margin is close to 70°. The peaking is gone altogether. The amplitude curve is nicely rounded. This is what we want to design all our opamps for, a phase margin of around 70°, such that no peaking occurs. Where is this factor of three coming from? 0525 This factor of three is actu- ally a result of a calculation of the peaking and phase margin, of a two-pole system to which unity-gain feedback is applied. This is explained in all textbooks on feedback or control theory! When we take the expres- sion of amplifier A with low- frequency gain A and two 0 poles, we have to plug it in the feedback expression for unity gain. Actually, this feedback expression was G/(1+GH) but here H=1 and G=A. The closed-loop gain A is unity at low frequencies. c In this feedback expression, we can rewrite the coefficients in terms of resonant frequency f r and damping f (Greek letter d, zeta). Often parameter Q is used instead of f, then Q=1/2 f. It is clear that f gives the frequency at which peaking or resonance occurs. Parameter f r determines how high the peaking is. For zero f, the term in s vanishes and we obtain a zero denominator at frequency f. Therefore, we obtain an oscillator at frequency f. r r We will need values of f between 0.5 and 1 to avoid peaking. Actually when f=1, we have one double pole. 162 Chapter #5 0526 The actual values of the phase margin and peaking are now easily calculated. They are given in this slide. Also, the amount of peaking in the frequency domain P f is given, followed by the amount of peaking in the time domain P. t For a ratio of three between the non-dominant pole and the GBW, the phase margin is 72°. The corresponding f is 0.87 (or Q=0.57). No peaking occurs in the Bode diagram. We could be allowed to reduce the non-dominant pole a bit, to two times the GBW. The phase margin decreases to 63°, decreasing the f as well to 0.71 (and Q=0.71) and we still do not have peaking. We cannot forget, however, that we are using hand calculations here. After this part of the design procedure, we want to verify the circuit performance by means of a numerical simulator such as SPICE, Then all parasitic capacitances come in, pushing the non-dominant pole to lower values and decreasing the phase margin. A value of three is thus a good safety position to start with. 0527 A better sketch of the peak- ing in the frequency domain (or in the Bode diagram) is shown in this slide. The value of the maxi- mum peaking P is given as f well. It is clear that for a damping f of 0.7, we obtain a maximally-flat response. Going to larger f reduces the bandwidth too much. Also, going to smaller values of f causes peaking indeed. For zero f, we would have a peak to infinity, which is typical for an oscillator. Stability of operational amplifiers 163 0528 Peaking in the frequency domain corresponds to ring- ing in the time domain. To the same amplifier, we apply now an input voltage v which has a square IN waveform. The output volt- age v follows with some OUT delay. For small values of f how- ever, the output voltage overshoots, followed by ringing. The system is underdamped. The peak of the first overshoot P is t given. By taking a damping f of 0.7, the overshoot is very light and there is no ringing. A value of f of 0.87 would not give any overshoot at all. These values of f for no ringing are clearly similar to the values for no peaking. Ringing in the time domain and peaking in the frequency domain are clearly equivalent. The settling time is the time required to obtain the final value with a certain error. For example, a square waveform applied to a first-order system, gives an exponential with a certain time constant. For settling within 0.1%, we need to wait ln(1000) or 6.9 time constants. For a slightly underdamped two-pole system, it is not so obvious to find the 0.1% settling time. Certainly a f between 0.7 and 0.8 gives the best compromise between rise time and settling time. 0529 Now that we know what it means to have a stable amplifier, or an amplifier without peaking or ringing, let us apply this theory now to a conventional two-stage amplifier. 164 Chapter #5 0530 A generic 2-stage amplifier is shown in this slide. It consists of a differential input stage, which converts the differential input voltage into a current, by transcon- ductance g. A second- m1 stage follows, which is usu- ally little more than a single- transistor amplifier, and which has a transconduct- ance g. The output load m2 consists of both a resistor and a capacitor. The second stage has a feedback capacitor C. It c will be used to compensate this opamp. This is why it is called compensation capacitance. We will now try to find the gain, bandwidth and the gain-bandwidth product GBW. The gain is readily found by realizing that the second stage is actually a transresistance amplifier which converts the input current into the output voltage, by means of the impedance of capacitor C. c The gain A is then simply the product of the input g with the impedance of C. Obviously, v m1 c this gain A decreases with frequency, and crosses the unity-gain line at the frequency GBW. v The gain does not go to infinity at very low frequencies. It stops somewhere depending on whether cascodes are used, etc. The low-frequency gain is not that important after all. The higher frequency region is much more important, since feedback is always applied. 0531 The GBW is thus given by the frequency where the voltage gain is unity. Its expression is valid for all two-stage amplifiers! Remember that a single- transistor amplifier has a similar expression for the GBW. However, note that it contains the load capaci- tance. This two-stage op- amp contains the compensa- tion capacitance C instead. c For stability, we have to know the position of the non-dominant pole. Stability of operational amplifiers 165 This pole f is determined by the other capacitance, i.e. the load capacitance C. The time nd L constant is given by the product of this load capacitance C and the resistance seen by it. This L is resistor R but especially resistance 1/g , offered by the second stage, across which C acts L m2 c as a short-circuit at these high frequencies, where f is expected to occur. nd Indeed the second stage is usually a single transistor. Its Drain is then connected to its Gate. Its resistance is simply 1/g. m2 Therefore, the non-dominant pole is mainly determined by time constant C /g. An exact L m2 calculation reveals that we have to take into account that a small capacitance C is present at n1 node 1. The capacitive division C /C is a kind of correction factor. We normally choose n1 c capacitor C to be at least three times larger than C. c n1 0532 Both the GBW and the non- dominant pole are linked by the stability requirement. The f /GBW must be nd about three! Rewriting this provides an important relationship between the trans-conduc- tances on one hand, and the capacitances on the other. The correction factor C /C is simply taken to be n1 c 0.3. Combining this with the ratio f /GBW of three, we nd obtain a factor of 4. This relationship shows why the current in the second stage of a 2-stage opamp always consumes much more power than the first stage. Indeed for a specific V −V (such as 0.2 V), the transconductances represent GS T the currents. Normally, we choose the compensation capacitance to be smaller than the load capacitance. It is usually 2–3 times smaller. As a result, the current in the second stage is 8–12 times larger than the current in an input transistor. This relationship also shows that a redesign for larger C , requires either a larger C or a L c larger g. These are the two techniques, that we will use to compensate a two-stage opamp. m2 As an example, for a specific GBW and C , the equations can easily be solved to find the two L g ’s, provided we firstly choose C ! m c 0533 The stability requirement forces us to position the non-dominant pole at sufficiently high frequencies (around 3 GBW). 166 Chapter #5 The question now is, how to carry out the design? Which parameters are we going to use in the design plan to shift the non-domi- nant pole. We will find that there are two possible design plans, both with advantages and disadvantages. Both of them lead to pole splitting, which allows us to move this non- dominant pole to even higher values. 0534 Let us now take the two- stage operational amplifier. We substitute the g -blocks m by their voltage controlled current sources. Also, node resistances are added on each node, representing the output impedances. There- fore, the small-signal equiv- alent circuit is obtained. The low-frequency gains A and A are easily v1 v2 derived as they are merely products of g ’s and output m resistances. The total gain A is then their product. v Addition of all capacitances provides an expression of the gain versus frequency, which is of second order. It is only of second order, despite the fact that we distinguish three capacitances, because the three capacitances form a capacitive loop. Disrupting this loop, for example by putting in a series resistor somewhere in this loop, would raise the order of the gain expression to three. The analysis would then become much more cumbersome. 0535 The full expression of the gain A is given in this slide. Only two approximations have been v taken. We have assumed that the gain is larger than unity and that node resistance resistor R n1 is larger than load resistance R. L Stability of operational amplifiers 167 The denominator is of second order in s or jv. It now has two roots, which are the two poles. They can be real or complex. The numerator has one root only, which is the zero. It is a positive zero (in the polar diagram). The question is again how we have to dimension C c and/or g to shift the non- m2 dominant pole out to higher frequencies? For this purpose, we have to take a look at the posi- tions of the poles when C c is varied. This is not so obvious as C occurs at several places in the denominator. In order to figure out c how the two poles (and the zero) change as we vary C , we draw the pole-zero position diagram. c 0536 It is not so difficult to obtain the two poles. After all, they are the roots of the denomi- nator, which is just a second-order expression. In most cases however, there is an easy way to obtain the poles. We assume that the poles have values which are widely different. Indeed, we expect to find a dominant pole and a non- dominant pole which are very different. In this case, the dominant pole can be obtained by dropping the term in s2 in the denominator. The dominant pole is simply −1/a. The non-dominant pole is also easy to find. It is obtained by dropping the term 1 in the denominator, and by taking out one s. The non-dominant pole is simply −a/b. Clearly, as coefficient a changes as a result of a parameter change somewhere, both poles are then affected, but in opposite ways. If the dominant pole decreases, the non-dominant pole must increase. This will be the basis for pole splitting. 168 Chapter #5 0537 The pole-zero position dia- gram is a plot of the poles and zero versus frequency, for one of the design param- eters as a variable. The frequency axis is the same as in the Bode diagram. In this example, compen- sation capacitance C is c taken as a design variable. Indeed, we want to see how C can be used to shift out c the second pole to higher frequencies than GBW. Clearly for a C smaller c than 10 fF, two poles occur. They are fairly close to each other. The Bode diagram is now easily sketched. However, for larger C (larger than about 20 fF in this example) the poles split. The dominant c pole f becomes ever more dominant. d The non-dominant pole f now shifts out, as intended. nd The Bode diagrams are added for values of C of 0.1 and 1 pF. It is clear that for a C of c c 1 pF, sufficient pole splitting has been achieved. Indeed, the f is about three times larger than nd the GBW, which is about 1 MHz. The expression of the dominant pole is easily extracted from the expression of the gain. This is given in this slide. It is clearly due to the Miller effect of this (fairly large) capacitor C. c However, we also have a positive zero! 0538 In order to better under- stand what a positive zero means, we have to compare the effect on the phase of a positive zero, with that of a negative zero. There is no need to have a second-order system for this purpose. A first-order system can be taken as well. The Bode diagrams are sketched for a first-order system with one single pole and one single zero. In the second case the zero is positive. Stability of operational amplifiers 169 Both have obviously the same amplitude. Consequently, amplitudes are not affected by signs. They have a very different phase characteristic, however. In the first Bode diagram the phase returns to zero for high frequencies. For the second diagram however, for a positive zero, the phase goes to −180°. This is like having a second pole, rather than a zero! This completely ruins our phase margin!!! We have tried to limit the phase contribution of the non-dominant pole to about 20° by carefully locating this non-dominant pole beyond the GBW. A positive zero now shows up, which brings in another −90°. This will ruin the phase margin. Moreover, the larger we make the compensation capacitance C , the more this zero shifts to c lower frequencies. Large values of C are therefore not allowed! c 0539 Another way to realize the same pole splitting is to use g , set by the current in the m2 second stage. It works even better than with C ! c Increasing the current from low values to higher one causes the dominant pole to be exactly the same as before. In the Miller effect, the g is as much m2 present as C itself. c However, the non-domi- nant has a better behavior. It keeps on increasing to high values, for high values of g. m2 The main advantage is that the positive zero moves out to higher values, when g increases. m2 Therefore, this zero disappears! As a result, it is a lot easier to realize pole splitting by increasing g than it is with C. m2 c The major drawback of compensating an opamp with g is that the current consumption m2 increases drastically. For low-power designs we therefore prefer to compensate an opamp by increasing the compen- sation capacitance C. We now have to find other ways of dealing with the positive zero! c 170 Chapter #5 0540 This conclusion is what we have already reached previously. Increasing the load capacitance will force us to either increase the compen- sation capacitance or to increase the current in the second stage, as imposed by the stability requirement. Both help! Therefore, if during some design effort, the capaci- tance C does not provide c sufficient phase margin, then we have to increase the cur- rent in the second stage somewhat. This always helps! 0541 Nevertheless, we do not want to increase the current in the second stage. All analog design is towards low-power design. This is why we have to find all possible techniques to remove this positive zero. They are listed next. Stability of operational amplifiers 171 0542 In order to understand how we can abolish the positive zero, we have to try to understand what its origin is, which adds another −90° phase shift. This is a result of the feedforward through the compensation capacitance. Indeed, the compensation capacitance is bidirectional after all, as most capaci- tances. This means that feedback current and feed- forward current flow at the same time. The feedback current is the Miller effect current from output to input. It flows between two nodes which are opposite in phase. The feedforward current is only easy to see when we leave out the amplifier itself. We now notice a feedforward current through C which causes a small output signal which is in phase c with the input. This is the current which causes the zero. It is a positive zero because it provides an output signal which is of opposite phase compared with the amplified output signal. To abolish this positive zero, we have to make that compensation capacitance unidirectional. In other words, we have to put a transistor in series, which cuts the feedforward path. 0543 There are three ways to abolish the positive zero. For the first two, it is easy to see that the feedforward current is blocked. The third technique is more difficult to understand. The first technique con- sists of putting a source fol- lower in series with the compensation capacitance. The feedback is still present but the feedforward current flows through the source fol- lower to the positive supply, without affecting the output. Putting this source follower in the expression of the gain, gives as a result that the numerator has gone. There is no more zero. It is now an easy way to solve this problem. However, we need 172 Chapter #5 some biasing current through the follower. This may not be the real solution for low-power design. The second technique is using a cascode instead. Its DC current is pulled out of the Source. A pMOST can be used as well, provided DC current is injected into the Source. Again, the AC feedback current can flow but not the feedforward current. The zero simply vanishes, but again at the cost of some additional biasing current. This problem can be solved as shown on the next slide. The third technique does not require any biasing current. This is why it is often preferred in low-power amplifiers. 0544 There are three ways to abolish the positive zero. For the first two, it is easy to see that the feedforward current is blocked. The third technique is more difficult to understand. The first technique con- sists of putting a source follower in series with the compensation capacitance. The feedback is still present but the feedforward current flows through the source fol- lower to the positive supply, without affecting the output. Putting this source follower in the expression of the gain, gives as a result that the numerator has gone. There is no more zero. It is now an easy way to solve this problem. However, we need some biasing current through the follower. This may not be the real solution for low-power design. The second technique is using a cascode. Its DC current is pulled out of the Source. A pMOST can also be used, provided DC current is injected into the Source. Again, the AC feedback current can flow but not the feedforward current. The zero simply vanishes, but again at the cost of some additional biasing current. This problem can be solved as shown on the next slide. The third technique does not require any biasing current. This is why it is often preferred in low-power amplifiers. 0545 A good example of the use of the second technique is shown in this slide. It is a telescopic cascode followed by a single-transistor amplifier as a second stage. The compensation capacitance C is no longer connected between the output and input of the c second stage. It takes a path through one of the cascodes, avoiding the positive zero. The second technique is used quite often as it does not require any additional biasing current! Stability of operational amplifiers 173 It is not so easy to work out which cascode solution of the two to use. In prin- ciple, the second one is a little bit better as it takes the side of the input transistor. There are less higher-order poles and zeros in this case! Some designers take half the compensation capaci- tance to both sides, which is very similar indeed! 0546 The third technique to abol- ish the positive zero, is to insert a small resistor R , in c series with C. c This resistor causes some cancellation of the effect of the feedforward by the feedback. The expression of the zero is now modified as shown. It is clear that for a resis- tance R equal to 1/g , the c m2 zero is at infinity. It has vanished. It is not so easy, however, to match a resistor to a g m value. Especially if the resistor is realized by means of a MOST in the linear region, then the matching is more difficult. There is a simple solution to this problem, however. We increase the size of the resistor. This zero now turns into a negative zero. In other words the minus sign in the expression of the zero compensates the minus sign in the gain expression. This negative zero is positioned between the negative poles and can therefore be used to compensate one of them. 0547 For a much larger resistor, the expression of the zero can be simplified to the one given in this slide. In order to be effective, we have to position this zero close to the GBW, for example at 2–3 174 Chapter #5 times the GBW where the nondominant poles are. This yields a new expres- sion for R , which is now c related to g instead of m1 gm2. We simply position R c between both the values obtained, with preference to be closer to 1/3g. m1 A numerical example will show that it is quite easy to position the resistor R as c indicated and that the toler- ance on this resistor can be allowed to be quite large! 0548 As an example, let us take a two-stage opamp with a GBW of 50 MHz for a C L of 2 pF. We resort to the same design plan as before. We choose C to be 1 pF, half c the value of C. We will L refine this choice in the next Chapter. For a chosen C , the g c m1 is easily calculated. For a V −V of 0.2 V, its current GS T is ten times larger, or 31 mA. Note that 1/g is 3.2 kV m1 and 1/3g is about 1 kV. m1 For the second stage we recall that f must be three times higher than the GBW. Its g is nd m2 also readily calculated. The current is now eight times higher than the current in the input transistor or 252 mA and 1/g is 400 V. m2 We now have to position R between 400 V and 1 kV. Doing this on a logarithmic scale means c that we have to take a harmonic average. This gives about 640 V. The advantage of doing this is that the tolerance is larger and the same in both directions. This resistor can have an absolute tolerance of 60%, which makes it quite easy to achieve! Stability of operational amplifiers 175 0549 As we have become familiar with the design of a two- stage amplifier, we can easily extend this design method to three-stage amplifiers. Indeed, we will use the Miller effect twice. The resulting power con- sumption will be relatively high as we have to deal with the two non-dominant poles. In Chapter 10 on multistage amplifiers, we will present some more multistage amplifiers with much lower power con- sumption. 0550 Before we expand towards a three-stage amplifier, let us review the principles of a single- and two-stage amplifier. A single-stage amplifier has only one high-imped- ance point, usually at the output. The load capaci- tance C therefore deter- L mines the GBW. It is also the input g m1 which determines this GBW. 176 Chapter #5 0551 A two-stage amplifier has two high-impedance points. These two points must be connected by a compensa- tion capacitance C to carry C out polesplitting. This com- pensation capacitance there- fore determines the GBW. Again it is the input g which determines this m1 GBW. The non-dominant pole is now determined by the load capacitance C at the L