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GLOBAL EDITION Digital Fundamentals ELEVENTH EDITION Thomas L. Floyd Eleventh Edition Global Edition Digital Fundamentals Thomas L. Floyd Boston Columbus Indianapolis New York San Francisco Hoboken Amsterdam Cape Town Dubai London Ma...
GLOBAL EDITION Digital Fundamentals ELEVENTH EDITION Thomas L. Floyd Eleventh Edition Global Edition Digital Fundamentals Thomas L. Floyd Boston Columbus Indianapolis New York San Francisco Hoboken Amsterdam Cape Town Dubai London Madrid Milan Munich Paris Montreal Toronto Delhi Mexico City São Paulo Sydney Hong Kong Seoul Singapore Taipei Tokyo Product Manager: Lindsey Prudhomme Gill Program Manager: Maren Beckman Project Manager: Rex Davidson Editorial Assistant: Nancy Kesterson Team Lead Program Manager: Laura Weaver Team Lead Project Manager: JoEllen Gohr Head of Learning Asset Acquisition, Global Editions: Laura Dent Acquisitions Editor, Global Editions: Karthik Subramanian Project Editor, Global Editions: K.K. Neelakantan Senior Production Manufacturing Controller, Global Editions: Trudy Kimber Director of Marketing: David Gesell Senior Marketing Coordinator: Stacey Martinez Senior Marketing Assistant: Les Roberts Procurement Specialist: Deidra M. Skahill Media Project Manager: Noelle Chun Media Project Coordinator: April Cleland Media Production Manager, Global Editions: Vikram Kumar Creative Director: Andrea Nix Art Director: Diane Y. Ernsberger Cover Designer: Lumina Datamatics Ltd. Cover Image: © echo3005/Shutterstock Full-Service Project Management: Sherrill Redd/iEnergizer Aptara®, Inc. Credits and acknowledgments for materials borrowed from other sources and reproduced, with permission, in this textbook appear on the appropriate page within text. Pearson Education Limited Edinburgh Gate Harlow Essex CM20 2JE England and Associated Companies throughout the world Visit us on the World Wide Web at: www.pearsonglobaleditions.com © Pearson Education Limited 2015 The right of Thomas L. Floyd to be identified as the author of this work has been asserted by him in accordance with the Copyright, Designs and Patents Act 1988. Authorized adaptation from the United States edition, entitled Digital Fundamentals,11th edition, ISBN 978-0-13-273796-8, by Thomas L. Floyd, published by Pearson Education © 2015. All rights reserved. No part of this publication may be reproduced, stored in a retrieval system, or transmitted in any form or by any means, electronic, mechanical, photocopying, recording or otherwise, without either the prior written permission of the publisher or a license permitting restricted copying in the United Kingdom issued by the Copyright Licensing Agency Ltd, Saffron House, 6–10 Kirby Street, London EC1N 8TS. All trademarks used herein are the property of their respective owners. The use of any trademark in this text does not vest in the author or publisher any trademark ownership rights in such trademarks, nor does the use of such trademarks imply any affiliation with or endorsement of this book by such owners. British Library Cataloguing-in-Publication Data A catalogue record for this book is available from the British Library 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 ISBN 10: 1-292-07598-8 ISBN 13: 978-1-292-07598-3 Typeset by Aptara®, Inc. in Times Roman. Printed and bound by Courier Kendallville in The United States of America. PREFACE This eleventh edition of Digital Fundamentals continues a long tradition of presenting a strong foundation in the core fundamentals of digital technology. This text provides basic concepts reinforced by plentiful illustrations, examples, exercises, and applications. Applied Logic features, Implementation features, troubleshooting sections, programmable logic and PLD programming, integrated circuit technologies, and the special topics of signal conversion and processing, data transmission, and data processing and control are included in addition to the core fundamentals. New topics and features have been added to this edition, and many other topics have been enhanced. The approach used in Digital Fundamentals allows students to master the all-important fundamental concepts before getting into more advanced or optional topics. The range of topics provides the flexibility to accommodate a variety of program requirements. For example, some of the design-oriented or application-oriented topics may not be appropriate in some courses. Some programs may not cover programmable logic and PLD programming, while others may not have time to include data transmission or data processing. Also, some programs may not cover the details of “inside-the-chip” circuitry. These and other areas can be omitted or lightly covered without affecting the coverage of the fundamental topics. A background in transistor circuits is not a prerequisite for this textbook, and the coverage of integrated circuit technology (inside-the-chip circuits) is optionally presented. New in This Edition Newpagelayoutanddesignforbettervisualappearanceandeaseofuse Revisedandimprovedtopics Obsoletedeviceshavebeendeleted. TheApplied Logic features (formerly System Applications) have been revised and new topics added. Also, the VHDL code for PLD implementation is introduced and illustrated. Anewboxedfeature,entitledImplementation, shows how various logic functions can be implemented using fixed-function devices or by writing a VHDL program for PLD implementation. BooleansimpliicationcoveragenowincludestheQuine-McCluskeymethodandthe Espresso method is introduced. AdiscussionofMooreandMealystatemachineshasbeenadded. Thechapteronprogrammablelogichasbeenmodiiedandimproved. Adiscussionofmemoryhierarchyhasbeenadded. Anewchapterondatatransmission,includinganextensivecoverageofstandard busses has been added. Thechapteroncomputershasbeencompletelyrevisedandisnowentitled“Data Processing and Control.” AmoreextensivecoverageanduseofVHDL.Thereisatutorialonthewebsiteat www.pearsonglobaleditions.com/floyd MoreemphasisonDlip-lops 3 4 Preface Standard Features Full-colorformat Core fundamentals are presented without being intermingled with advanced or peripheral topics. InfoNotes are sidebar features that provide interesting information in a condensed form. Achapteroutline,chapterobjectives,introduction,andkeytermslistappearonthe opening page of each chapter. Withinthechapter,thekeytermsarehighlightedincolorboldface.Eachkeytermis defined at the end of the chapter as well as in the comprehensive glossary at the end of the book. Glossary terms are indicated by black boldface in the text. Remindersinformstudentswheretoindtheanswerstothevariousexercisesand problems throughout each chapter. Sectionintroductionandobjectivesareatthebeginningofeachsectionwithina chapter. Checkupexercisesconcludeeachsectioninachapterwithanswersattheendofthe chapter. Each worked example has a Related Problem with an answer at the end of the chapter. Hands-On Tips interspersed throughout provide useful and practical information. Multisimiles(newerversions)onthewebsiteprovidecircuitsthatarereferencedin the text for optional simulation and troubleshooting. Theoperationandapplicationoftestinstruments,includingtheoscilloscope,logic analyzer, function generator, and DMM, are covered. Troubleshootingsectionsinmanychapters Introductiontoprogrammablelogic Chaptersummary True/Falsequizatendofeachchapter Multiple-choiceself-testattheendofeachchapter Extensivesectionalizedproblemsetsattheendofeachchapterwithanswerstoodd- numbered problems at the end of the book. Troubleshooting,appliedlogic,andspecialdesignproblemsareprovidedinmany chapters. CoverageofbipolarandCMOSICtechnologies.Chapter15isdesignedasa“loating chapter” to provide optional coverage of IC technology (inside-the-chip circuitry) at any point in the course. Chapter 15 is online at www.pearsonglobaleditions.com/floyd Accompanying Student Resources Multisim Circuits. The MultiSim files on the website includes selected circuits from the text that are indicated by the icon in Figure P-1. FIGURE P-1 Otherstudentresourcesavailableonthewebsite: 1. Chapter 15, “Integrated Circuit Technologies” 2. VHDL tutorial Preface 5 3. Verilog tutorial 4. MultiSim tutorial 5. AlteraQuartusIItutorial 6. Xilinx ISE tutorial 7. Five-variable Karnaugh map tutorial 8. Hamming code tutorial 9. Quine-McCluskeymethodtutorial 10. Espresso algorithm tutorial 11. Selected VHDL programs for downloading 12. ProgrammingtheelevatorcontrollerusingAlteraQuartusII Using Website VHDL Programs VHDL programs in the text that have a corresponding VHDL file on the website are indi- cated by the icon in Figure P-2. These website VHDL files can be downloaded and used inconjunctionwiththePLDdevelopmentsoftware(AlteraQuartusIIorXilinxISE)to implement a circuit in a programmable logic device. FIGURE P-2 Instructor Resources Image Bank This is a download of all the images in the text. Instructor’s Resource Manual Includes worked-out solutions to chapter problems, solutions to Applied Logic Exercises, and a summary of Multisim simulation results. TestGen This computerized test bank contains over 650 questions. Download Instructor Resources from the Instructor Resource Center To access supplementary materials online, instructors need to request an instructor access code. Go to www.pearsonglobaleditions.com/floyd to register for an instruc- tor access code. Within 48 hours of registering, you will receive a confirming e-mail includinganinstructoraccesscode.Onceyouhavereceivedyourcode,locateyour text in the online catalog and click on the Instructor Resources button on the left side ofthecatalogproductpage.Selectasupplement,andaloginpagewillappear.Once you have logged in, you can access instructor material for all Pearson textbooks. If you have any difficulties accessing the site or downloading a supplement, please contact Customer Service at http://247pearsoned.custhelp.com/. Illustration of Book Features Chapter Opener Each chapter begins with an opener, which includes a list of the sections inthechapter,chapterobjectives,introduction,alistofkeyterms,andawebsitereference for chapter study aids. A typical chapter opener is shown in Figure P-3. Section Opener Each section in a chapter begins with a brief introduction that includes a generaloverviewandsectionobjectives.AnillustrationisshowninFigureP-4. Section Checkup Each section ends with a review consisting of questions or exercises that emphasize the main concepts presented in the section. This feature is shown in Figure P-4. Answers to the Section Checkups are at the end of the chapter. Worked Examples and Related Problems There is an abundance of worked out examples that help to illustrate and clarify basic concepts or specific procedures. Each example ends 6 Preface CHAPTER 3 Logic Gates CHAPTER OUTLINE List specific fixed-function integrated circuit devices that contain the various logic gates 3–1 The Inverter 3–2 The AND Gate Troubleshoot logic gates for opens and shorts by using the oscilloscope 3–3 The OR Gate 3–4 The NAND Gate KEY TERMS 3–5 The NOR Gate 3–6 The Exclusive-OR and Exclusive-NOR Gates Key terms are in order of appearance in the chapter. 3–7 Programmable Logic Inverter EPROM 3–8 Fixed-Function Logic Gates Truth table EEPROM 3–9 Troubleshooting Boolean algebra Flash Complement SRAM CHAPTER OBJECTIVES AND gate Target device Describe the operation of the inverter, the AND OR gate JTAG gate, and the OR gate NAND gate VHDL Describe the operation of the NAND gate and the NOR gate CMOS NOR gate Exclusive-OR gate Bipolar Express the operation of NOT, AND, OR, NAND, Exclusive-NOR gate Propagation delay and NOR gates with Boolean algebra AND array time Describe the operation of the exclusive-OR and Fuse Fan-out exclusive-NOR gates Antifuse Unit load Use logic gates in simple applications Recognize and use both the distinctive shape logic gate symbols and the rectangular outline logic gate VISIT THE WEBSITE symbols of ANSI/IEEE Standard 91-1984/Std. Study aids for this chapter are available at 91a-1991 http://www.pearsonhighered.com/careersresources/ Construct timing diagrams showing the proper time relationships of inputs and outputs for the various INTRODUCTION logic gates Discuss the basic concepts of programmable logic The emphasis in this chapter is on the operation, application, and troubleshooting of logic gates. The Make basic comparisons between the major IC relationship of input and output waveforms of a gate technologies—CMOS and bipolar (TTL) using timing diagrams is thoroughly covered. Explain how the different series within the CMOS Logic symbols used to represent the logic gates and bipolar (TTL) families differ from each other are in accordance with ANSI/IEEE Standard 91-1984/ Define propagation delay time, power dissipation, Std. 91a-1991. This standard has been adopted by speed-power product, and fan-out in relation to private industry and the military for use in internal logic gates documentation as well as published literature. FIGURE P-3 SECTION 5–1 CHECKUP Answers are at the end of the chapter. 1. Determine the output (1 or 0) of a 4-variable AND-OR-Invert circuit for each of the following input conditions: (a) A = 1, B = 0, C = 1, D = 0 (b) A = 1, B = 1, C = 0, D = 1 (c) A = 0, B = 1, C = 1, D = 1 2. Determine the output (1 or 0) of an exclusive-OR gate for each of the following input conditions: (a) A = 1, B = 0 (b) A = 1, B = 1 (c) A = 0, B = 1 (d) A = 0, B = 0 3. Develop the truth table for a certain 3-input logic circuit with the output expression X = ABC + ABC + A B C + ABC + ABC. 4. Draw the logic diagram for an exclusive-NOR circuit. 5–2 Implementing Combinational Logic In this section, examples are used to illustrate how to implement a logic circuit from a Boolean expression or a truth table. Minimization of a logic circuit using the methods cov- ered in Chapter 4 is also included. After completing this section, you should be able to u Implement a logic circuit from a Boolean expression u Implement a logic circuit from a truth table For every Boolean expression there is a logic circuit, and for every logic u Minimize a logic circuit circuit there is a Boolean expression. From a Boolean Expression to a Logic Circuit InfoNote Let’s examine the following Boolean expression: Many control programs require X = AB + CDE logic operations to be performed A brief inspection shows that this expression is composed of two terms, AB and CDE, by a computer. A driver program with a domain of five variables. The first term is formed by ANDing A with B, and the is a control program that is used second term is formed by ANDing C, D, and E. The two terms are then ORed to form the with computer peripherals. For output X. These operations are indicated in the structure of the expression as follows: example, a mouse driver requires logic tests to determine if a button AND has been pressed and further X = AB + CDE logic operations to determine if it has moved, either horizontally OR or vertically. Within the heart of a Note that in this particular expression, the AND operations forming the two individual microprocessor is the arithmetic terms, AB and CDE, must be performed before the terms can be ORed. logic unit (ALU), which performs To implement this Boolean expression, a 2-input AND gate is required to form the term these logic operations as directed AB, and a 3-input AND gate is needed to form the term CDE. A 2-input OR gate is then by program instructions. All of the required to combine the two AND terms. The resulting logic circuit is shown in Figure 5–9. logic described in this chapter can As another example, let’s implement the following expression: also be performed by the ALU, given the proper instructions. X = AB(CD + EF) FIGURE P-4 Preface 7 with a Related Problem that reinforces or expands on the example by requiring the student to work through a problem similar to the example. A typical worked example with Related Problem is shown in Figure P-5. Solution FIGURE P-5 All the intermediate waveforms and the final output waveform are shown in the timing diagram of Figure 5–34(c). Related Problem Determine the waveforms Y1, Y2, Y3, Y4 and X if input waveform A is inverted. EXAMPLE 5–15 Determine the output waveform X for the circuit in Example 5–14, Figure 5–34(a), directly from the output expression. Solution The output expression for the circuit is developed in Figure 5–35. The SOP form indicates that the output is HIGH when A is LOW and C is HIGH or when B is LOW and C is HIGH or when C is LOW and D is HIGH. A A+B (A + B)C B X = (A + B)C + CD = (A + B)C + CD = AC + BC + CD C C D CD FIGURE 5–35 The result is shown in Figure 5–36 and is the same as the one obtained by the intermediate-waveform method in Example 5–14. The corresponding product terms for each waveform condition that results in a HIGH output are indicated. BC CD AC AC A B C D X = AC + BC + CD FIGURE 5–36 Related Problem Repeat this example if all the input waveforms are inverted. SECTION 5–5 CHECKUP 1. One pulse with tW = 50 ms is applied to one of the inputs of an exclusive-OR cir- cuit. A second positive pulse with tW = 10 ms is applied to the other input beginning 15 ms after the leading edge of the first pulse. Show the output in relation to the inputs. 2. The pulse waveforms A and B in Figure 5–31 are applied to the exclusive-NOR cir- cuit in Figure 5–32. Develop a complete timing diagram. Troubleshooting Section Many chapters include a troubleshooting section that relates to the topics covered in the chapter and that emphasizes troubleshooting techniques and the use of test instruments and circuit simulation. A portion of a typical troubleshooting section is illustrated in Figure P-6. tPHL SECTION 7–6 CHECKUP FIGURE P-6 1. Explain the difference in operation between an astable multivibrator and a monosta- ble multivibrator. CLK 2. For a certain astable multivibrator, tH = 15 ms and T = 20 ms. What is the duty CLK A Q cycle of the output? 7–7 Troubleshooting CLK B CLK A It is standard practice to test a new circuit design to be sure that it is operating as specified. New fixed-function designs are “breadboarded” and tested before the design is finalized. The term breadboard refers to a method of temporarily hooking up a circuit so that its operation can be verified and any design flaws worked out before a prototype unit is built. (a) Oscilloscope display of CLK A and CLK B waveforms with (b) Oscilloscope display showing propagation delay that creates After completing this section, you should be able to glitches indicated by the “spikes”. glitch on CLK A waveform u Describe how the timing of a circuit can produce erroneous glitches FIGURE 7–62 Oscilloscope displays for the circuit in Figure 7–61. u Approach the troubleshooting of a new design with greater insight and awareness of potential problems CLK The circuit shown in Figure 7–61(a) generates two clock waveforms (CLK A and CLK B) that have an alternating occurrence of pulses. Each waveform is to be one-half the fre- Q quency of the original clock (CLK), as shown in the ideal timing diagram in part (b). D Q CLK A Q CLK C CLK Q CLK A Q CLK B Q CLK A D CLK B Q (a) (b) CLK C Q FIGURE 7–63 Two-phase clock generator using negative edge-triggered flip-flop to CLK A CLK B eliminate glitches. Open file F07-63 and verify the operation. CLK B (a) (b) FIGURE 7–61 Two-phase clock generator with ideal waveforms. Open file F07-61 and verify the operation. Glitches that occur in digital systems are very fast (extremely short in duration) and can be difficult to see on an oscilloscope, particularly at lower sweep rates. A logic analyzer, however, can show a glitch When the circuit is tested with an oscilloscope or logic analyzer, the CLK A and CLK B easily. To look for glitches using a logic analyzer, select “latch” mode or (if available) transitional waveforms appear on the display screen as shown in Figure 7–62(a). Since glitches occur sampling. In the latch mode, the analyzer looks for a voltage level change. When a change occurs, on both waveforms, something is wrong with the circuit either in its basic design or in the even if it is of extremely short duration (a few nanoseconds), the information is “latched” into the way it is connected. Further investigation reveals that the glitches are caused by a race analyzer’s memory as another sampled data point. When the data are displayed, the glitch will show as an obvious change in the sampled data, making it easy to identify. condition between the CLK signal and the Q and Q signals at the inputs of the AND gates. As displayed in Figure 7–62(b), the propagation delays between CLK and Q and Q create a short-duration coincidence of HIGH levels at the leading edges of alternate clock pulses. Thus, there is a basic design flaw. The problem can be corrected by using a negative edge-triggered flip-flop in place of the positive edge-triggered device, as shown in Figure 7–63(a). Although the propaga- SECTION 7–7 CHECKUP tion delays between CLK and Q and Q still exist, they are initiated on the trailing edges 1. Can a negative edge-triggered J-K flip-flop be used in the circuit of Figure 7–63? of the clock (CLK), thus eliminating the glitches, as shown in the timing diagram of Figure 7–63(b). 2. What device can be used to provide the clock for the circuit in Figure 7–63? 8 Preface Applied Logic Appearing at the end of many chapters, this feature presents a practical application of the concepts and procedures covered in the chapter. In most chapters, this feature presents a “real-world” application in which analysis, troubleshooting, design, VHDL programming, and simulation are implemented. Figure P-7 shows a portion of a typical Applied Logic feature. Floor Counter Applied Logic library ieee; ieee.numeric_std_all is included to enable casting of use ieee.std_logic_1164.all; unsigned identifier. Unsigned FloorCnt is converted to Elevator Controller: Part 2 use ieee.numeric_std.all; std_logic_vector. entity FLOORCOUNTER is UP, DOWN: Floor count ˛˚˚˝˚˚¸ direction signals port (UP, DOWN, Sensor: in std_logic; Sensor: Elevator car floor In this section, the elevator controller that was introduced in the Applied Logic in Chap- ter 9 will be programmed for implementation in a PLD. Refer to Chapter 9 to review the FLRCODE: out std_logic_vector(2 downto 0)); sensor elevator operation. The logic diagram is repeated in Figure 10–62 with labels changed to end entity FLOORCOUNTER; FLRCODE: 3-digit floor facilitate programming. count architecture LogicOperation of FLOORCOUNTER is PanelCode signal FloorCnt: unsigned(2 downto 0) := “000”; Floor count is initialized to 000. begin Numeric unsigned FloorCnt is con- process(UP, DOWN, Sensor, FloorCnt) verted to std_logic_vector data type 1 begin CallCode and sent to std_logic_vector output FLRCODE 6= std_logic_vector(FloorCnt); FLRCODE. J K CallEn if (Sensor’EVENT and Sensor = ‘1’) then ˛˚˚˝˚˚¸ Q Not CallEn Sensor event high pulse causes the CALL/REQ FF if UP = ‘1’ and DOWN = ‘0’ then floor count to increment when UP CLK FloorCnt 6= FloorCnt + 1; is set high or decrement by one elsif Up = ‘0’ and DOWN = ‘1’ then when DOWN is set low. FloorCnt 6= FloorCnt - 1; CLOSE end if; FRIN end if; Request FlrCodeIn QOut end process; SetCount CLK CALL/REQ Code Register Sys Clk Clk Timer end architecture LogicOperation; Enable FlrCodeOut Call FRCLOUT FLRCALL/FLRCNT Comparator FLRCALL/FLRCNT Comparator library ieee; STOP/OPEN use ieee.std_logic_1164.all; FlrCodeCall UP use ieee.std_logic_arith.all; Floor Counter DOWN entity FLRCALLCOMPARATOR is Sensor FlrCodeCall, FlrCodeCnt: CLK FLRCODE FlrCodeCnt port (FlrCodeCall, FlrCodeCnt: in std_logic_vector(2 downto 0); ¸˝˛ (Floorpulse) Compared values UP, DOWN, STOP: Output UP, DOWN, STOP: inout std_logic; control signals end entity FLRCALLCOMPARATOR; FRCNT architecture LogicOperation of FLRCALLCOMPARATOR is UP DOWN H0 7-segment begin 7-Segment H1 display of ˛˚˚˝˚˚¸ H2 Decoder floor number STOP 6= ‘1’ when (FlrCodeCall = FlrCodeCnt) else ‘0’; STOP, UP, and DOWN UP 6= ‘1’ when (FlrCodeCall 7 FlrCodeCnt) else ‘0’; signals are set or reset a-g based on =, 7, and 6 DOWN 6= ‘1’ when (FlrCodeCall 6 FlrCodeCnt) else ‘0’; relational comparisons. FIGURE 10–62 Programming model of the elevator controller. end architecture LogicOperation; The VHDL program code for the elevator controller will include component definitions for the Floor Counter, the FLRCALL/FLRCNT Comparator, the Code Register, the Timer, the Seven-Segment Decoder, and the CALL/REQ Flip-Flop. The VHDL program codes for these six components are as follows. (Blue annotated notes are not part of the program.) FIGURE P-7 End of Chapter The following features are at the end of each chapter: Summary Keytermglossary True/falsequiz Self-test Problemsetthatincludessomeorallofthefollowingcategoriesinadditiontocoreprob- lems: Troubleshooting, Applied Logic, Design, and Multisim Troubleshooting Practice. AnswerstoSectionCheckups AnswerstoRelatedProblemsforExamples AnswerstoTrue/Falsequiz AnswerstoSelf-Test End of Book Thefollowingfeaturesareattheendofthebook. Answerstoselectedodd-numberedproblems Comprehensiveglossary Index Preface 9 To the Student Digital technology pervades almost everything in our daily lives. For example, cell phones and other types of wireless communications, television, radio, process controls, automotive electronics, consumer electronics, aircraft navigation— to name only a few applications— depend heavily on digital electronics. A strong grounding in the fundamentals of digital technology will prepare you for the highly skilled jobs of the future. The single most important thing you can do is to understand the core fundamentals. From there you can go anywhere. In addition, programmable logic is important in many applications and that topic in introduced in this book and example programs are given along with an online tutorial. Ofcourse,efficienttroubleshootingisaskillthatisalsowidelysoughtafterbypotential employers. Troubleshooting and testing methods from traditional prototype testing to more advanced techniques such as boundary scan are covered. To the Instructor Generally, time limitations or program emphasis determines the topics to be covered in a course. It is not uncommon to omit or condense topics or to alter the sequence of certain topics in order to customize the material for a particular course. This textbook is specifi- cally designed to provide great flexibility in topic coverage. Certain topics are organized in separate chapters, sections, or features such that if they are omitted the rest of the coverage is not affected. Also, if these topics are included, they flow seamlessly with the rest of the coverage. The book is organized around a core of fundamental topics that are, for the most part, essential in any digital course. Around this core, there are other topics that can be included or omitted, depending on the course emphasis and/or other factors. Even within the core, selected topics can be omitted. Figure P-8 illustrates this concept. Programmable Logic and PLD programming Core Troubleshooting Applied Logic Fundamentals Integrated Special Topics Circuit Technologies FIGURE P-8 u Core Fundamentals The fundamental topics of digital technology should be cov- ered in all programs. Linked to the core are several “satellite” topics that may be considered for omission or inclusion, depending on your course goals. All topics presented in this text are important in digital technology, but each block surrounding the core can be omitted, depending on your particular goals, without affecting the core fundamentals. u Programmable Logic and PLD Programming Although they are important topics, programmable logic and VHDL can be omitted; however, it is highly recommended that you cover this topic if at all possible. You can cover as little or as much as you consider appropriate for your program. 10 Preface u Troubleshooting Troubleshooting sections appear in many chapters and include the application and operation of laboratory instruments. u Applied Logic Selected real-world applications appear in many chapters. u Integrated Circuit Technologies Chapter 15 is an online chapter. Some or all of the topics in Chapter 15 can be covered at selected points if you wish to discuss details of the circuitry that make up digital integrated circuits. Chapter 15 can be omitted with- out any impact on the rest of the book. u Special Topics These topics are Signal Interfacing and Processing, Data Transmis- sion, and Data Processing and Control in Chapters 12, 13, and 14 respectively, as well as selected topics in other chapters. These are topics that may not be essential for your course or are covered in another course. Also, within each block in Figure P-8 you can choose to omit or deemphasize some topics because of time constraints or other priorities in your particular program. For example in the core fundamentals, theQuine-McCluskeymethod,cyclicredundancycode,carrylook-aheadadders,or sequential logic design could possibly be omitted. Additionally, any or all of Multi- simfeaturesthroughoutthebookcanbetreatedasoptional.Othertopicsmayalsobe candidates for omission or light coverage. Whether you choose a minimal coverage of only core fundamentals, a full-blown coverage of all the topics, or anything in between, this book can be adapted to your needs. Acknowledgments This revision of Digital Fundamentals has been made possible by the work and skills of many people. I think that we have accomplished what we set out to do, and that was to further improve an already very successful textbook and make it even more useful to the student and instructor by presenting not only basics but also up-to-date and leading-edge technology. Those at Pearson Education who have, as always, contributed a great amount of time, talent, and effort to move this project through its many phases in order to produce the book as you see it, include, but are not limited to, Rex Davidson, Lindsey Gill, and Vern Anthony.LoisPorterhasdoneanotherexcellentjobofmanuscriptediting.DougJoksch contributed the VHDL programming. Gary Snyder revised and updated the Multisim circuit files. My thanks and appreciation go to all of these and others who were indirectly involvedintheproject. In the revision of this and all textbooks, I depend on expert input from many users as well as nonusers. My sincere thanks to the following reviewers who submitted many valuable suggestions and provided lots of constructive criticism: Dr. Cuiling Gong, Zane Gastineau, Texas Christian University; Harding University; and Jonathan White, Dr. Eric Bothur, Harding University; Midlands Technical College. I also want to thank all of the members of the Pearson sales force whose efforts have helped make this text available to a large number of users. In addition, I am grateful to all of you who have adopted this text for your classes or for your own use. Without you we would not be in business. I hope that you find this eleventh edition of Digital Fundamentals to be even better than earlier editions and that it will continue to be a valuable learning tool and reference for the student. Tom Floyd Pearson would like to thank and acknowledge Sanjay H.S., M.S. Ramaiah Institute of Technology for his contributions to the Global Edition, and Moumita Mitra Manna, Bangabasi College, and Piyali Sengupta for reviewing the Global Edition. CONTENTS CHAPTER 1 Introductory Concepts 15 1-1 Digital and Analog Quantities 16 1-2 Binary Digits, Logic Levels, and Digital Waveforms 19 1-3 Basic Logic Functions 25 1-4 Combinational and Sequential Logic Functions 27 1-5 Introduction to Programmable Logic 34 1-6 Fixed-Function Logic Devices 40 1-7 Test and Measurement Instruments 43 1-8 Introduction to Troubleshooting 54 CHAPTER 2 Number Systems, Operations, and Codes 65 2-1 Decimal Numbers 66 2-2 Binary Numbers 67 2-3 Decimal-to-Binary Conversion 71 2-4 Binary Arithmetic 74 2-5 Complements of Binary Numbers 77 2-6 Signed Numbers 79 2-7 Arithmetic Operations with Signed Numbers 85 2-8 Hexadecimal Numbers 92 2-9 Octal Numbers 98 2-10 Binary Coded Decimal (BCD) 100 2-11 Digital Codes 104 2-12 Error Codes 109 CHAPTER 3 Logic Gates 125 3-1 The Inverter 126 3-2 The AND Gate 129 3-3 The OR Gate 136 3-4 The NAND Gate 140 3-5 The NOR Gate 145 3-6 The Exclusive-OR and Exclusive-NOR Gates 149 3-7 Programmable Logic 153 3-8 Fixed-Function Logic Gates 160 3-9 Troubleshooting 170 CHAPTER 4 Boolean Algebra and Logic Simplification 191 4-1 Boolean Operations and Expressions 192 4-2 Laws and Rules of Boolean Algebra 193 4-3 DeMorgan’s Theorems 199 11 12 Contents 4-4 Boolean Analysis of Logic Circuits 203 4-5 Logic Simplification Using Boolean Algebra 205 4-6 Standard Forms of Boolean Expressions 209 4-7 Boolean Expressions and Truth Tables 216 4-8 The Karnaugh Map 219 4-9 Karnaugh Map SOP Minimization 222 4-10 Karnaugh Map POS Minimization 233 4-11 The Quine-McCluskey Method 237 4-12 Boolean Expressions with VHDL 240 Applied Logic 244 CHAPTER 5 Combinational Logic Analysis 261 5-1 Basic Combinational Logic Circuits 262 5-2 Implementing Combinational Logic 267 5-3 The Universal Property of NAND and NOR gates 272 5-4 Combinational Logic Using NAND and NOR Gates 274 5-5 Pulse Waveform Operation 279 5-6 Combinational Logic with VHDL 283 5-7 Troubleshooting 288 Applied Logic 294 CHAPTER 6 Functions of Combinational Logic 313 6-1 Half and Full Adders 314 6-2 Parallel Binary Adders 317 6-3 Ripple Carry and Look-Ahead Carry Adders 324 6-4 Comparators 327 6-5 Decoders 331 6-6 Encoders 341 6-7 Code Converters 345 6-8 Multiplexers (Data Selectors) 347 6-9 Demultiplexers 356 6-10 Parity Generators/Checkers 358 6-11 Troubleshooting 362 Applied Logic 365 CHAPTER 7 Latches, Flip-Flops, and Timers 387 7-1 Latches 388 7-2 Flip-Flops 395 7-3 Flip-Flop Operating Characteristics 406 7-4 Flip-Flop Applications 409 7-5 One-Shots 414 7-6 The Astable Multivibrator 423 7-7 Troubleshooting 427 Applied Logic 429 Contents 13 CHAPTER 8 Shift Registers 449 8-1 Shift Register Operations 450 8-2 Types of Shift Register Data I/Os 451 8-3 Bidirectional Shift Registers 462 8-4 Shift Register Counters 465 8-5 Shift Register Applications 469 8-6 Logic Symbols with Dependency Notation 476 8-7 Troubleshooting 478 Applied Logic 480 CHAPTER 9 Counters 497 9-1 Finite State Machines 498 9-2 Asynchronous Counters 500 9-3 Synchronous Counters 507 9-4 Up/Down Synchronous Counters 515 9-5 Design of Synchronous Counters 519 9-6 Cascaded Counters 527 9-7 Counter Decoding 531 9-8 Counter Applications 534 9-9 Logic Symbols with Dependency Notation 539 9-10 Troubleshooting 541 Applied Logic 545 CHAPTER 10 Programmable Logic 561 10-1 Simple Programmable Logic Devices (SPLDs) 562 10-2 Complex Programmable Logic Devices (CPLDs) 567 10-3 Macrocell Modes 574 10-4 Field-Programmable Gate Arrays (FPGAs) 577 10-5 Programmable Logic software 585 10-6 Boundary Scan Logic 595 10-7 Troubleshooting 602 Applied Logic 608 CHAPTER 11 Data Storage 627 11-1 Semiconductor Memory Basics 628 11-2 The Random-Access Memory (RAM) 633 11-3 The Read-Only Memory (ROM) 646 11-4 Programmable ROMs 652 11-5 The Flash Memory 655 11-6 Memory Expansion 660 11-7 Special Types of Memories 666 11-8 Magnetic and Optical Storage 670 11-9 Memory Hierarchy 676 11-10 Cloud Storage 680 11-11 Troubleshooting 683 14 Contents CHAPTER 12 Signal Conversion and Processing 697 12-1 Analog-to-Digital Conversion 698 12-2 Methods of Analog-to-Digital Conversion 704 12-3 Methods of Digital-to-Analog Conversion 715 12-4 Digital Signal Processing 723 12-5 The Digital Signal Processor (DSP) 724 CHAPTER 13 Data Transmission 739 13-1 Data Transmission Media 740 13-2 Methods and Modes of Data Transmission 745 13-3 Modulation of Analog Signals with Digital Data 750 13-4 Modulation of Digital Signals with Analog Data 753 13-5 Multiplexing and Demultiplexing 759 13-6 Bus Basics 764 13-7 Parallel Buses 769 13-8 The Universal Serial Bus (USB) 775 13-9 Other Serial Buses 778 13-10 Bus Interfacing 784 CHAPTER 14 Data Processing and Control 801 14-1 The Computer System 802 14-2 Practical Computer System Considerations 806 14-3 The Processor: Basic Operation 812 14-4 The Processor: Addressing Modes 817 14-5 The Processor: Special Operations 823 14-6 Operating Systems and Hardware 828 14-7 Programming 831 14-8 Microcontrollers and Embedded Systems 838 14-9 System on Chip (SoC) 844 ON WEBSITE: http://www.pearsonglobaleditions.com/floyd CHAPTER 15 Integrated Circuit Technologies 855 15-1 Basic Operational Characteristics and Parameters 856 15-2 CMOS Circuits 863 15-3 TTL (Bipolar) Circuits 868 15-4 Practical Considerations in the Use of TTL 873 15-5 Comparison of CMOS and TTL Performance 880 15-6 Emitter-Coupled Logic (ECL) Circuits 881 15-7 PMOS, NMOS, and E2CMOS 883 ANSWERS TO ODD-NUMBERED PROBLEMS A-1 GLOSSARY A-31 INDEX A-42 CHAPTER 1 Introductory Concepts CHAPTER OUTLINE KEY TERMS 1–1 Digital and Analog Quantities Key terms are in order of appearance in the chapter. 1–2 Binary Digits, Logic Levels, and Digital Analog NOT Waveforms Digital Inverter 1–3 Basic Logic Functions Binary AND 1–4 Combinational and Sequential Logic Functions 1–5 Introduction to Programmable Logic Bit OR 1–6 Fixed-Function Logic Devices Pulse Programmable logic 1–7 Test and Measurement Instruments Duty cycle SPLD 1–8 Introduction to Troubleshooting Clock CPLD Timing diagram FPGA Data Microcontroller CHAPTER OBJECTIVES Serial Embedded system Explain the basic differences between digital and Parallel Compiler analog quantities Logic Integrated circuit (IC) Show how voltage levels are used to represent digital quantities Input Fixed-function logic Describe various parameters of a pulse waveform Output Troubleshooting such as rise time, fall time, pulse width, frequency, Gate period, and duty cycle VISIT THE WEBSITE Explain the basic logic functions of NOT, AND, and OR Study aids for this chapter are available at Describe several types of logic operations and http://www.pearsonglobaleditions.com/floyd explain their application in an example system INTRODUCTION Describe programmable logic, discuss the various types, and describe how PLDs are The term digital is derived from the way operations programmed are performed, by counting digits. For many years, Identify fixed-function digital integrated circuits applications of digital electronics were confined according to their complexity and the type of circuit to computer systems. Today, digital technology is packaging applied in a wide range of areas in addition to com- puters. Such applications as television, communi- Identify pin numbers on integrated circuit packages cations systems, radar, navigation and guidance Recognize various instruments and understand systems, military systems, medical instrumentation, how they are used in measurement and industrial process control, and consumer electron- troubleshooting digital circuits and systems ics use digital techniques. Over the years digital Describe basic troubleshooting methods technology has progressed from vacuum-tube circuits 15 16 Introductory Concepts to discrete transistors to complex integrated circuits, This chapter introduces you to digital electronics many of which contain millions of transistors, and and provides a broad overview of many important many of which are programmable. concepts, components, and tools. 1–1 Digital and Analog Quantities Electronic circuits can be divided into two broad categories, digital and analog. Digital electronics involves quantities with discrete values, and analog electronics involves quan- tities with continuous values. Although you will be studying digital fundamentals in this book, you should also know something about analog because many applications require both; and interfacing between analog and digital is important. After completing this section, you should be able to u Define analog u Define digital u Explain the difference between digital and analog quantities u State the advantages of digital over analog u Give examples of how digital and analog quantities are used in electronics An analog* quantity is one having continuous values. A digital quantity is one having a discrete set of values. Most things that can be measured quantitatively occur in nature in analog form. For example, the air temperature changes over a continuous range of values. During a given day, the temperature does not go from, say, 70 to 71 instantaneously; it takes on all the infinite values in between. If you graphed the temperature on a typical sum- mer day, you would have a smooth, continuous curve similar to the curve in Figure 1–1. Other examples of analog quantities are time, pressure, distance, and sound. Temperature (°F) 100 95 90 85 80 75 70 Time of day 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 A.M. P.M. FIGURE 1–1 Graph of an analog quantity (temperature versus time). Rather than graphing the temperature on a continuous basis, suppose you just take a temperature reading every hour. Now you have sampled values representing the temperature at discrete points in time (every hour) over a 24-hour period, as indicated in Figure 1–2. *All bold terms are important and are defined in the end-of-book glossary. The blue bold terms are key terms and are included in a Key Term glossary at the end of each chapter. Digital and Analog Quantities 17 Temperature (°F) 100 95 90 85 80 75 70 Time of day 1 2 3 4 5 6 7 8 9 10 11 12 1 2 3 4 5 6 7 8 9 10 11 12 A.M. P.M. FIGURE 1–2 Sampled-value representation (quantization) of the analog quantity in Figure 1–1. Each value represented by a dot can be digitized by representing it as a digital code that consists of a series of 1s and 0s. You have effectively converted an analog quantity to a form that can now be digitized by representing each sampled value by a digital code. It is important to realize that Figure 1–2 itself is not the digital representation of the analog quantity. The Digital Advantage Digital representation has certain advantages over analog representation in electronics applica- tions. For one thing, digital data can be processed and transmitted more efficiently and reli- ably than analog data. Also, digital data has a great advantage when storage is necessary. For example, music when converted to digital form can be stored more compactly and reproduced with greater accuracy and clarity than is possible when it is in analog form. Noise (unwanted voltage fluctuations) does not affect digital data nearly as much as it does analog signals. An Analog System A public address system, used to amplify sound so that it can be heard by a large audience, is one simple example of an application of analog electronics. The basic diagram in Figure 1–3 illustrates that sound waves, which are analog in nature, are picked up by a microphone and converted to a small analog voltage called the audio signal. This voltage varies continuously as the volume and frequency of the sound changes and is applied to the input of a linear amplifier. The output of the amplifier, which is an increased reproduction of input voltage, goes to the speaker(s). The speaker changes the amplified audio signal back to sound waves that have a much greater volume than the original sound waves picked up by the microphone. Original sound waves Microphone Reproduced sound waves Linear amplifier Audio signal Speaker Amplified audio signal FIGURE 1–3 A basic audio public address system. 18 Introductory Concepts A System Using Digital and Analog Methods The compact disk (CD) player is an example of a system in which both digital and analog circuits are used. The simplified block diagram in Figure 1–4 illustrates the basic principle. Music in digital form is stored on the compact disk. A laser diode optical system picks up the digital data from the rotating disk and transfers it to the digital-to-analog converter (DAC). The DAC changes the digital data into an analog signal that is an electrical repro- duction of the original music. This signal is amplified and sent to the speaker for you to enjoy. When the music was originally recorded on the CD, a process, essentially the reverse of the one described here, using an analog-to-digital converter (ADC) was used. CD drive 10110011101 Digital-to-analog Linear amplifier Digital data converter Analog reproduction of music audio Speaker signal Sound waves FIGURE 1–4 Basic block diagram of a CD player. Only one channel is shown. Mechatronics Both digital and analog electronics are used in the control of various mechanical systems. The interdisciplinary field that comprises both mechanical and electronic components is known as mechatronics. Mechatronic systems are found in homes, industry, and transportation. Most home appliances consist of both mechanical and electronic components. Electronics controls the operation of a washing machine in terms of water flow, temperature, and type of cycle. Manufacturing indus- tries rely heavily on mechatronics for process control and assembly. In automotive and other types of manufacturing, robotic arms perform precision welding, painting, and other functions on the assembly line. Automobiles themselves are mechatronic machines; a digital computer controls functions such as braking, engine parameters, fuel flow, safety features, and monitoring. Figure 1–5(a) is a basic block diagram of a mechatronic system. A simple robotic arm is shown in Figure 1–5(b), and robotic arms on an automotive assembly line are shown in part (c). Electronic controls Electromechanical Robotic unit interface (a) Mechatronic system block diagram (b) Robotic arm (c) Automotive assembly line FIGURE 1–5 Example of a mechatronic system and application. Part (b) Beawolf/Fotolia; Part (c) Small Town Studio/Fotolia. Binary Digits, Logic Levels, and Digital Waveforms 19 The movement of the arm in any quadrant and to any specified position is accomplished with some type of digital control such as a microcontroller. SECTION 1–1 CHECKUP Answers are at the end of the chapter. 1. Define analog. 2. Define digital. 3. Explain the difference between a digital quantity and an analog quantity. 4. Give an example of a system that is analog and one that is a combination of both digital and analog. Name a system that is entirely digital. 5. What does a mechatronic system consist of? 1–2 Binary Digits, Logic Levels, and Digital Waveforms Digital electronics involves circuits and systems in which there are only two possible states. These states are represented by two different voltage levels: A HIGH and a LOW. The two states can also be represented by current levels, bits and bumps on a CD or DVD, etc. In digital systems such as computers, combinations of the two states, called codes, are used to represent numbers, symbols, alphabetic characters, and other types of information. The two-state number system is called binary, and its two digits are 0 and 1. A binary digit is called a bit. After completing this section, you should be able to u Define binary u Define bit u Name the bits in a binary system u Explain how voltage levels are used to represent bits u Explain how voltage levels are interpreted by a digital circuit u Describe the general characteristics of a pulse u Determine the amplitude, rise time, fall time, and width of a pulse u Identify and describe the characteristics of a digital waveform u Determine the amplitude, period, frequency, and duty cycle of a digital waveform InfoNote u Explain what a timing diagram is and state its purpose The concept of a digital computer u Explain serial and parallel data transfer and state the advantage and disadvantage can be traced back to Charles of each Babbage, who developed a crude mechanical computation device in the 1830s. John Atanasoff was the first to apply electronic processing Binary Digits to digital computing in 1939. In Each of the two digits in the binary system, 1 and 0, is called a bit, which is a contraction 1946, an electronic digital compu- of the words binary digit. In digital circuits, two different voltage levels are used to repre- ter called ENIAC was implemented sent the two bits. Generally, 1 is represented by the higher voltage, which we will refer to with vacuum-tube circuits. Even as a HIGH, and a 0 is represented by the lower voltage level, which we will refer to as a though it took up an entire room, LOW. This is called positive logic and will be used throughout the book. ENIAC didn’t have the computing power of your handheld calculator. HIGH 1 and LOW 0 20 Introductory Concepts Another system in which a 1 is represented by a LOW and a 0 is represented by a HIGH is called negative logic. Groups of bits (combinations of 1s and 0s), called codes, are used to represent numbers, letters, symbols, instructions, and anything else required in a given application. Logic Levels The voltages used to represent a 1 and a 0 are called logic levels. Ideally, one voltage level represents a HIGH and another voltage level represents a LOW. In a practical digital circuit, however, a HIGH can be any voltage between a specified minimum value and a specified maximum value. Likewise, a LOW can be any voltage between a specified minimum and a specified maximum. There can be no overlap between the accepted range of HIGH levels and the accepted range of LOW levels. Figure 1–6 illustrates the general range of LOWs and HIGHs for a digital circuit. The VH(max) variable VH(max) represents the maximum HIGH voltage value, and VH(min) represents the minimum HIGH voltage value. The maximum LOW voltage value is represented by VL(max), HIGH (binary 1) and the minimum LOW voltage value is represented by VL(min). The voltage values between VH(min) VL(max) and VH(min) are unacceptable for proper operation. A voltage in the unacceptable range can appear as either a HIGH or a LOW to a given circuit. For example, the HIGH Unacceptable input values for a certain type of digital circuit technology called CMOS may range from 2 V to 3.3 V and the LOW input values may range from 0 V to 0.8 V. If a voltage of 2.5 V VL (max) is applied, the circuit will accept it as a HIGH or binary 1. If a voltage of 0.5 V is applied, LOW the circuit will accept it as a LOW or binary 0. For this type of circuit, voltages between (binary 0) 0.8 V and 2 V are unacceptable. VL (min) Digital Waveforms FIGURE 1–6 Logic level ranges of voltage for a digital circuit. Digital waveforms consist of voltage levels that are changing back and forth between the HIGH and LOW levels or states. Figure 1–7(a) shows that a single positive-going pulse is generated when the voltage (or current) goes from its normally LOW level to its HIGH level and then back to its LOW level. The negative-going pulse in Figure 1–7(b) is gener- ated when the voltage goes from its normally HIGH level to its LOW level and back to its HIGH level. A digital waveform is made up of a series of pulses. HIGH HIGH Rising or Falling or Falling or Rising or leading edge trailing edge leading edge trailing edge LOW LOW t0 t1 t0 t1 (a) Positive–going pulse (b) Negative–going pulse FIGURE 1–7 Ideal pulses. The Pulse As indicated in Figure 1–7, a pulse has two edges: a leading edge that occurs first at time t0 and a trailing edge that occurs last at time t1. For a positive-going pulse, the leading edge is a rising edge, and the trailing edge is a falling edge. The pulses in Figure 1–7 are ideal because the rising and falling edges are assumed to change in zero time (instantaneously). In practice, these transitions never occur instantaneously, although for most digital work you can assume ideal pulses. Figure 1–8 shows a nonideal pulse. In reality, all pulses exhibit some or all of these characteristics. The overshoot and ringing are sometimes produced by stray inductive and Binary Digits, Logic Levels, and Digital Waveforms 21 Overshoot Ringing Droop 90% Amplitude
