CMOS Fabrication PDF
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Sidrah
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Summary
This document is a presentation on CMOS fabrication, covering topics including introduction to CMOS, advantages CMOS has over individual N and P MOSFETs, different CMOS fabrication types, and various processes including oxidation, photoresist, etching, and metallization. The presentation also discusses P-tub fabrication and the significance of terminal names.
Full Transcript
CMOS FABRICATION Presented by: Sidrah Under the guidance of: Dr Afshan Amin Khan Introduction to CMOS CMOS stands for ‘complementary mosfet’. It is known as such due to its structure involving both P and N type mosfets, in a complementary manner. Importance of CMOS fabricati...
CMOS FABRICATION Presented by: Sidrah Under the guidance of: Dr Afshan Amin Khan Introduction to CMOS CMOS stands for ‘complementary mosfet’. It is known as such due to its structure involving both P and N type mosfets, in a complementary manner. Importance of CMOS fabrication CMOS has the following advantages over singular N and P mosfets: 1. CMOS has less static power consumption over N and P mosfets. 2. CMOS is compatible for digital circuits, as gates can be constructed by using N and P mosfets. 3. CMOS has better noise immunity than N and P mosfets. The above mentioned reasons make CMOS better for the use in modern day technologies, such as Ics, microprocessors, imaging sensors, RFICs, SoC integration, etc. Types of CMOS fabrications N-Tub fabrication: Wafer: The silicon wafer is Oxidation of wafer: The selected for doping p-type impurities on it. The doped Silicon dioxide layer or wafer formed will be the p- oxide layer is created on type substrate with the the surface that protects trivalent impurities. the substrate. Growing of Photoresist: At this Masking: In this step, a desired stage to permit the selective pattern of openness is made using etching, the SiO2 layer is a stencil. This stencil is used as a subjected to the mask over the photoresist. The photolithography process. In this substrate is now exposed to UV rays the photoresist present under process, the wafer is coated the exposed regions of mask gets with a uniform film of a polymerized. photosensitive emulsion. Removal of Unexposed Etching: The wafer is Photoresist: The mask is immersed in an etching solution removed and the unexposed of hydrofluoric acid, which region of photoresist is removes the oxide from the dissolved by developing wafer areas through which dopants using a chemical such as are to be diffused. Trichloroethylene. Formation of N-well: The n- Removal of SiO2: The layer of type impurities are diffused into SiO2 is now removed by using the p-type substrate through the hydrofluoric acid exposed region thus forming an N- well. Deposition of polysilicon: Formation of Gate The polysilicon is added to Region: Except the two regions the surface that forms a required for formation of the gate structure deposited by gate for NMOS and PMOS CVD process. It is a heavily transistors the remaining doped layer of polysilicon portion of Polysilicon is stripped present over the thinox, off. which is a type of thin gate oxide. Masking and Diffusion: For Oxidation Process: An making regions for diffusion of oxidation layer is deposited n-type impurities using masking over the wafer which acts as a process small gaps are made. shield for further diffusion Using diffusion process three n+ and metallization regions are developed for the processes. formation of terminals of NMOS. Removal of Oxide: The oxide P-type Diffusion: Similar to layer is stripped off. the n-type diffusion for forming the terminals of PMOS p-type diffusion are carried out. Laying of Thick Field Metallization: This step is used oxide: Before forming the metal for the formation of metal terminals a thick field oxide is terminals which can provide laid out to form a protective layer interconnections. Aluminum is for the regions of the wafer spread on the whole wafer. where no terminals are required. Removal of Excess Formation of Terminals: In the Metal: The excess metal is gaps formed after removal of removed from the wafer. excess metal terminals are formed for the interconnections. Assigning the Terminal Names: Names are assigned to the terminals of NMOS and PMOS transistors. P-TUB Fabrication It is also a CMOS fabrication process. The NMOS transistors are created by placing them in the p-well with a p-type channel. The PMOS is created on the n-type substrate. Hence, the fabrication of NMOS is known as P-TUB. Here, the substrate is n-type, and the doping on the source and drain regions is p-type. A p-well is diffused into the substrate through the diffusion process. The doping concentration and depth of the p-well affect the n-type devices' voltage. Thus, special care is required. The deeper the wells, the larger the surface area it may require.