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Beasley,_J.,_&_Miller,_G._(2014)._Modern_Electronic_Communication_(9th_ed.)-354-375-pages-1[1].pdf

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1 I NTRODUCTION The field of digital and data communications has experienced explosive growth in recent years. In general, this field includes the transfer of analog signals using digital techniques and the transfer of digital data using digital and/or analog...

1 I NTRODUCTION The field of digital and data communications has experienced explosive growth in recent years. In general, this field includes the transfer of analog signals using digital techniques and the transfer of digital data using digital and/or analog techniques. It is difficult to separate the two topics totally because of their interrelationships. Digital communications is the transfer of information in digital form. As shown in Figure 1, if the information is analog (voice in this case), it is converted to digital for transmission. At the receiver, it is reconverted to analog. Figure 1 also shows a digital computer signal transmitted to another computer. Notice that this is shown to represent both digital and data communications. The third sys- tem in Figure 1 shows a computer’s digital signal converted to analog for trans- mission and then reconverted to digital by the modem. The reason that various techniques are used boils down to performance and cost, which will be apparent as we take a close look at the systems involved. The move to digital and/or data communications is due to several factors. It is occurring despite the increased complexity and bandwidth necessary for trans- mission. Noise performance is one of two major advantages. Consider an analog signal with an instantaneous received value of 1 mV. If at the same time an instantaneous 0.1-mV noise spike changes the received value to 1.1 mV, there is normally no way of knowing the correct value of the signal. In a digital system, however, the received signal may ultimately be changed to either a logical 0- or 1-V level. Now the received noise of 0.1 mV may still be there but certainly would not cause an error. The digital system can re-create the original signal by having circuits that change any signal below 0.5 V into the 0-V level and any signal above 0.5 V into Digital communications Analog Digital Digital Voice to to Voice digital analog Digital Computer Computer Analog Computer Modem Modem Computer Data communications FIGURE 1 Digital/data communications. Digital Communications: Coding Techniques 350 the 1-V level. This ability to restore a noise-corrupted signal to its original value is called regeneration. Obviously, if the noise is so great as to cause the 0-V level to Regeneration be seen as a 0.6-V level, an error will occur. restoring a noise-corrupted Another advantage of using a digital format involves the ability to process the signal to its original condition signal at the transmitter (preprocessing) and/or the receiver (postprocessing). Both of these operations are termed digital signal processing. Signals in digital format Digital Signal can be stored in computer memory and be easily manipulated by algorithms—a plan Processing or set of instructions followed to achieve a specific goal. They can be implemented using programming techniques to process a by digital circuitry, which is a hardware solution. Increasingly, they are implemented signal while in digital form by software instructions (via a computer program) that instruct a microprocessor how to perform specific manipulations. Many communications systems use Algorithms microcontrollers that are microprocessors programmed to do one basic task only. a plan or set of instructions to achieve a specific goal 2 A LPHANUMERIC C ODES The most common alphanumeric coding scheme for binary data is the American Standard Code for Information Interchange (ASCII). The Extended Binary-Coded Decimal Interchange Code (EBCDIC) is still used in large computing systems but sees little use in digital communication systems. The ASCII Code ASCII is a 7-bit code used for representing alphanumeric symbols with a distinctive ASCII code word. The ASCII code was developed by a committee of the American standardized coding National Standards Institute (ANSI) for the purpose of coding binary data. ASCII-77 scheme for alphanumeric symbols is the adopted international standard. Figure 2 provides a list of the codes. There are 27 (128) possible 7-bit code words available with an ASCII system. The binary codes are ordered sequentially, which simplifies the grouping and sort- ing of the characters. The 7-bit words are ordered with the least significant bit (lsb) given as bit 1 (b1), while the most significant bit (msb) is bit 7 (b7). Notice that a binary value is not specified by the code for bit 8 (b8). Usually the bit 8 (b8) posi- tion is used for parity checking. Parity is an error detection scheme that identifies Parity whether an even or odd number of logical ones are present in the code word. This a common method of error concept is discussed in greater detail in Section 6. For ASCII data used in a serial detection, adding an extra bit to each code transmission system b1, the lsb bit, is transmitted first. representation to give the The ASCII system is based on the binary-coded-decimal (BCD) code in the word either an even or odd last 4 bits. The first 3 bits indicate whether a number, letter, or character is being number of 1s specified. Notice that 0110001 represents “1,” while 1000001 represents “A” and 1100001 represents “a.” It uses the standard binary progression (i.e., 0110010 rep- resents “2”), and this makes mathematical operations possible. Because the letters are also represented with the binary progression, alphabetizing is also achieved via binary mathematical procedures. You should also be aware that analog waveform coding is accomplished simply by using the BCD code for PCM systems covered in Section 3. In some systems the actual transmission of these codes includes an extra pulse at the beginning (start) and ending (stop) for each character. When start/stop pulses are used in the coding of signals, it is called an asynchronous (nonsynchronous) Digital Communications: Coding Techniques 351 Fig. Letter Y A N K E E S Space shift 4 Space shift Fig. R E D S O X Space shift 3 (a) (b) FIGURE 5 Baudot code examples. example, the code for 7 is 0010 while the code for 8 is 0011. Notice that only one Binary # binary bit changes when the decimal value changes from 7 to 8. This is true for all of 0000 0 the numbers (0–9). The Gray code is shown in Figure 6. 1000 1 The Gray code is used most commonly in telemetry systems that have slowly 1100 2 changing data or in communication links that have a low probability of bit error. 1-bit change 0100 3 This coding scheme works well for detecting errors in slowly changing outputs, for each step 0110 4 such as data from a temperature sensor (thermocouple). If more than one change is 1110 5 value. 1010 6 detected when words are decoded, then the receiving circuitry assumes that an error 0010 7 is present. 0011 8 1011 9 FIGURE 6 The Gray code. 3 P ULSE -C ODE M ODULATION Pulse-code modulation (PCM) is the most common technique used today in digital communications for representing an analog signal by a digital word. PCM is used in many applications, such as your telephone system, digital audio recording (DAT or digital audio tape), CD laser disks, digitized video special effects, voice mail, digital video, and many other applications. PCM techniques and applica- tions are a primary building block for many of today’s advanced communications systems. Pulse-code modulation is a technique for converting the analog signals into a digital representation. The PCM architecture consists of a sample-and-hold (S/H) circuit and a system for converting the sampled signal into a representative binary format. First, the analog signal is input into a sample-and-hold circuit. At fixed time intervals, the analog signal is sampled and held at a fixed voltage level until the circuitry inside the A/D converter has time to complete the conversion process of generating a binary value. A block diagram of the process is shown in Figure 7. The Sample-and-Hold Circuit Most A/D integrated circuits come with sample-and-hold (S/H) circuits integrated into the system, but it is still important for the user to have a good understanding of Digital Communications: Coding Techniques 355 Analog Analog Anti- Sample- PAM to PCM input aliasing and- digital output signal filter hold Output converter FIGURE 7 Block diagram of the PCM process. the capabilities and the limitations of the S/H circuit. A typical S/H circuit is shown in Figure 8. The analog signal is typically input into a buffer circuit. The purpose of the buffer circuit is to isolate the input signal from the S/H circuit and to provide proper impedance matching as well as drive capability to the hold circuit. Many times the buffer circuit is also used as a current source to charge the hold capacitor. The output of the buffer is fed to an analog switch, which is typically the drain of a junction field-effect transistor (JFET) or a metal-oxide semiconductor field-effect transistor (MOSFET). The JFET or MOSFET is wired as an analog switch, which is controlled at the gate by a sample pulse generated by the sample clock. When the JFET or MOSFET transistor is turned on, the switch will short the analog signal from drain to source. This connects the buffered input signal to a hold capacitor. The capacitor begins to charge to the input voltage level at a time constant determined by the hold capacitor’s capacitance and the analog switch’s and buffer circuit’s “on” channel resistance. When the analog switch is turned off, the sampled analog signal voltage level is held by the “hold” capacitor. Figure 9(a) shows a picture of a sinusoid on the input of the S/H circuit. The sample times are indicated by the vertical dotted lines. In Figure 9(b) the sinusoid is redrawn as a sampled signal. Note that the sampled signal maintains a fixed voltage level between samples. The region where the voltage level remains relatively constant is called the hold time. The resulting wave- form, shown in Figure 9(b), is called a pulse-amplitude-modulated (PAM) signal. The S/H circuit is designed so that the sampled signal is held long enough for the Acquisition Time amount of time it takes signal to be converted by the A/D circuitry into a binary representation. for the hold capacitor to The time required for an S/H circuit to complete a sample is based partly on reach its final value the acquisition and aperture time. The acquisition time is the amount of time it Analog Buffer JFET Output PAM input amplifier Hold buffer output + capacitor Sample Sample clock pulse FIGURE 8 A sample-and-hold circuit. Digital Communications: Coding Techniques 356 (a) Sample intervals for an input sinusoid. (b) A pulse-amplitude-modulated (PAM) signal. FIGURE 9 Generation of PAM. takes for the hold circuit to reach its final value. (During this time the analog switch connects the input signal to the hold capacitor.) The acquisition time is controlled by the sample pulse. The aperture time Aperture Time is the time that the S/H circuit must hold the sampled voltage. The aperture and the time that the S/H acquisition times limit the maximum input frequency that the S/H circuit can circuit must hold the sampled voltage accurately process. To provide a good-quality S/H circuit, a couple of design considerations must be met. The analog switch “on” resistance must be small. The output impedance of the input buffer must also be small. By keeping the input resistance minimal, the overall time constant for sampling the analog signal can be controlled by the selection of an appropriate hold capacitor. Ideally a minimal-size hold capacitor should be selected so that a fast charging time is possible, but a small capacitor will have trouble holding a charge for a very long period. A 1-nF hold capacitor is a popular choice for many circuit designers. It is important too that the hold capaci- tor be of high quality. High-quality capacitors have polyethylene, polycarbonate, or teflon dielectrics. These types of dielectrics minimize voltage variations due to capacitor characteristics. Pulse-Amplitude Modulation The concept of pulse-amplitude modulation (PAM) has already been introduced in this chapter, but there are a few specifics regarding the creation of a pulse- amplitude-modulated signal at the output of a sample-and-hold circuit that neces- sitate discussion. Two basic sampling techniques are used to create a PAM signal. The first is called natural sampling. Natural sampling occurs when the tops of the sampled Natural Sampling waveform (the sampled analog input signal) retain their natural shape. An example sampling in which the of natural sampling is shown in Figure 10(a). Notice that one side of the analog tops of the sampled waveforms retain their switch is connected to ground. When the transistor is turned on, the JFET will short natural shape the signal to ground, but it will pass the unaltered signal to the output when the transistor is off. Note, too, that there is not a hold capacitor present in the circuit. Probably the most popular type of sampling used in PCM systems is called flat-top sampling. In flat-top sampling, the sample signal voltage is held constant Flat-Top Sampling between samples. The method of sampling creates a staircase that tracks the chang- sampling in which the ing input signal. This method is popular because it provides a constant voltage dur- signal voltage is held constant during samples, ing a window of time for the binary conversion of the input signal to be completed. creating a staircase that An example of flat-top sampling is shown in Figure 10(b). Note that this is the same tracks the changing input type of waveform as shown in Figure 9(b). With flat-top sampling, the analog waveform switch connects the input signal to the hold capacitor. Digital Communications: Coding Techniques 357 Analog PAM input Output Sample pulse (a) Natural sampling Analog PAM input + Output Sample pulse (b) Flat-top sampling FIGURE 10 (a) Natural sampling; (b) flat-top sampling. The Sample Frequency One of the most critical specifications in a PCM system is the selection of the sample Nyquist Rate frequency. The sample frequency is governed by the Nyquist rate. The Nyquist rate states that the sample states that the sample frequency ( fs ) must be at least twice the highest input frequency must be at least frequency ( fa ). twice the highest input frequency fs  2fa (1) Sampling a signal gives many of the same properties that a “mixer” circuit in RF communications possesses. The mathematical relationship for a mixer circuit and a sampling circuit is expressed by the trigonometric identity sin A  sin B  0.5 cos 1A  B2  0.5 cos 1A  B2 (2) From Equation (2), it is evident that if the A frequency ( fs) is not twice the B frequency ( fb), then the A  B 1 fs  fa 2 term will produce a signal whose frequency is less than B’s ( fa). This created signal will appear within the original frequency bandwidth. Figure 11 graphically depicts the relationship of the sample frequency to Aliasing or Foldover the input frequency. Distortion The phenomenon associated with the generation of an erroneously created the phenomenon associated signal in the sampling process is called aliasing or foldover distortion. These error with the generation of error signals can be minimized by incorporating an antialiasing filter (i.e., a low-pass signals in the sampling process filter) on the input to the S/H circuit. The antialiasing filter bandlimits the input fre- quencies so that foldover distortion, or aliasing, is eliminated or minimized. Antialiasing Filter For example, a voice channel on a telephone system is band-limited to a a filter that bandlimits the maximum of 4 kHz. The sample rate for the telephone system is 8 kHz, twice the input frequencies to 12 the sampling frequency so that highest input frequency. The input frequency is band-limited by either an active or foldover distortion, or a passive low-pass filter circuit. Therefore, the difference component ( A  B) term will aliasing, is prevented create a signal above the band-limited range of 4 kHz. Keep in mind that the input Digital Communications: Coding Techniques 358 The sample Amplitude Analog frequency Sample frequency must not frequency passband occur in range this region. fs fa  fa fs fa  fa fa fs Frequency 2fa (min) FIGURE 11 The sample frequency and input frequency relationship. signal will seldom be a pure sinusoid so there will be some harmonic content to the signal. The harmonics, if not filtered, can lead to aliasing, or foldover distortion, problems. Example 1 A CD audio laser-disk system has a frequency bandwidth of 20 Hz to 20 kHz. What is the minimum sample rate required to satisfy the Nyquist sampling rate? Solution fs  2fa (1) fs  2  20 kHz fs  40 kHz Note: The sample rate for CD audio players is 44.1 kHz. Quantization Once an analog signal has been properly sampled, the process of converting the sam- pled signal to a binary value can begin. In PCM systems the sampled signal is seg- mented into different voltage levels, with each level corresponding to a different Quantization binary number. This process is called quantization. The quantization levels also process of segmenting a determine the resolution of the digitizing system. Each quantization level step-size is sampled signal in a PCM called a quantile, or quantile interval. system into different Analog signals are quantized to the closest binary value provided in the dig- voltage levels, each level corresponding to a itizing system. This is an approximation process. For example, if our numbering different binary number system is the set of whole numbers 1, 2, 3,... , and the number 1.4 must be con- verted (rounded off ) to the closest whole number, then 1.4 is translated to 1. If the Quantile input number is 1.6, then the number is translated to a 2. If the number is 1.5, then a quantization level we have the same error if the number is rounded off to a 1 or a 2. step-size In PCM, the electrical representation of voice is converted from analog form to Quantile Interval digital form. This process of encoding is shown in Figure 12. There are a set of another name for quantile Digital Communications: Coding Techniques 359 q12 1100 q11 1011 q10 1010 q9 1001 q8 1000 Voice waveform S1 q7 Quantization levels 0111 Digital code q6 0110 Quantizing q5 0101 error q4 0100 Decoded time waveform q3 0011 q2 0010 q1 0001 Voice waveform S2 0000 t1 t2 t3 t4 t5 t6 t7 t8 t9 Time FIGURE 12 PCM encoding. (From the November 1972 issue of the Electronic Engineer, with the permission of the publisher.) Quantization Levels amplitude levels and sampling times. The amplitude levels are termed quantization another name for quantile levels, and 12 such levels are shown. At each sampling interval, the analog amplitude is quantized into the closest available quantization level, and the analog-to-digital con- verter (ADC) puts out a series of pulses representing that level in the binary code. For example, at time t2 in Figure 12, voice waveform S1 is closest to level q8, and thus the coded output at that time is the binary code 1000, which repre- sents 8 in binary code. Note that the quantizing process resulted in an error, which Quantizing Error is termed the quantizing error, or quantizing noise. The maximum voltage of the an error resulting from the quantization error is one-half the voltage of the minimum step-size VLSB/2. Voice quantization process waveform S2 provides a 0010 code at time t2, and its quantizing error is also Quantizing Noise shown in Figure 12. The amount of this error can be minimized by increasing the another name for number of quantizing levels, which of course lessens the space between each one. quantizing error The 4-bit code shown in Figure 12 allows for a maximum of 16 levels because 24  16. The use of a higher-bit code decreases the error at the expense of trans- mission time and/or bandwidth because, for example, a 5-bit code (32 levels) means transmitting 5 high or low pulses instead of 4 for each sampled point. The sam- pling rate is also critical and must be greater than twice the highest significant frequency, as previously described. It should be noted that the sampling rate in Figure 12 is lower than the highest-frequency component of the information. This is not a practical situation but was done for illustrative purposes. While a 4- or 5-bit code may be adequate for voice transmission, it is not adequate for transmission of television signals. Figure 13 provides an example of Digital Communications: Coding Techniques 360 (a) (b) FIGURE 13 PCM TV transmission: (a) 5-bit resolution; (b) 8-bit resolution. Digital Communications: Coding Techniques 361 Represented Voltage by (BCD) 1.0 V Quantile 11 interval (.875 V) Quantile 10 (.625 V) interval Quantile 01 (.375 V) interval 00 Quantile (.125 V) interval 0.0 V Time FIGURE 14 Voltage levels for a quantized signal. TV pictures for 5-bit and 8-bit (256 levels) PCM transmissions, each with 10-MHz sampling rates. In the first (5-bit) picture, contouring in the forehead and cheek areas is very pronounced. The 8-bit resolution results in an excellent-fidelity TV signal that is not discernibly different from a standard continuous modulation transmission. Notice in Figure 14 that at the sample intervals, the closest quantization level is selected for representing the sine-wave signal. The resulting waveform has poor resolution with respect to the sine-wave input. Resolution with respect to a digitiz- ing system refers to the accuracy of the digitizing system in representing a sampled signal. It is the smallest analog voltage change that can be distinguished by the con- verter. For example, the analog input to our PCM system has a minimum voltage of 0.0 V and a maximum of 1.0 V. Then Vmax VFS q  n 2n 2 where q  the resolution n  number of bits VFS  full-scale voltage If a 2-bit system is used for quantizing a signal, then 22, or 4, quantized levels are used. Referring to Figure 14 we see that the quantized levels (quantile intervals) are each 0.25 V in magnitude. Typically it is stated that this system has 2-bit resolu- tion. This follows from the equation just presented. To increase the resolution of a digitizing system requires that the number of quantization levels be increased. To increase the number of quantization levels requires that the number of binary bits representing each voltage level be increased. If the resolution of the example in Figure 14 is increased to 3 bits, then the input signal will be converted to 1 of 8 possible values. The 3-bit example with improved resolution is shown in Figure 15. Another way of improving the accuracy of the quantized signal is to increase the sample rate. Figure 16 shows the sample rate doubled but still using a 3-bit sys- tem. The resultant signal shown in Figure 16 is dramatically improved compared to the quantized waveform shown in Figure 15 by this change in sampling rate. Digital Communications: Coding Techniques 362 Represented Voltage by (BCD) 1.0 V Quantile 111 interval.9375 V Quantile 110 interval.8125 V Quantile 101 interval.6875 V Quantile 100 interval.5625 V Quantile 011 interval.4375 V Quantile 010 interval.3125 V Quantile 001 interval.1875 V Quantile 000 interval.0625 V 0.0 V Time FIGURE 15 An example of 3-bit quantization. Dynamic Range and Signal-to-Noise Calculations Dynamic range (DR) for a PCM system is defined as the ratio of the maximum Dynamic Range input or output voltage level to the smallest voltage level that can be quantized in a PCM system, the ratio and/or reproduced by the converters. It is the same as the converter’s parameters: of the maximum input or output voltage level to the smallest voltage level that VFS full-scale voltage can be quantized and/or , reproduced by the q resolution converters This value is expressed as follows: Vmax DR   2n (3) Vmin Dynamic range is typically expressed in terms of decibels. For a binary system, each bit can have two logic levels, either a logical low or logical high. Therefore Represented Voltage by (BCD) 1.0 V Quantile 111 interval.9375 V 111 Quantile 110 interval.8125 V 110 Quantile 101 interval.6875 V 101 Quantile 100 interval.5625 V 100 Quantile 011 interval.4375 V 011 Quantile 010 interval.3125 V 010 Quantile 001 interval.1875 V 001 Quantile 000 interval.0625 V 000 0.0 V Time (Sample rate doubled) FIGURE 16 An example of 3-bit quantization with increased sample rate. Digital Communications: Coding Techniques 363 the dynamic range for a single-bit binary system can be expressed logarithmically, in terms of dB, by the expression Vmax DRdB  20 log Vmin DRdB  20 log2n (4) where n  number of bits in the digital word. The dynamic range (DR) for a binary system is expressed as 6.02 dB/bit or 6.02  n, where n represents the number of quantizing bits. This value comes from 20 log 2  6.02 dB, where the 2 represents the two possible states of one binary bit. To calculate the dynamic range for a multiple-bit system, simply multiply the number of quantizing bits (n) times 6.02 dB per bit. For example, an 8-bit system will have a dynamic range (expressed in dB) of 18 bits2 16.02 dB/bit2  48.16 dB The signal-to-noise ratio (S/N) for a digitizing system is written as S/N  31.76  6.02n4 (5) where n  the number of bits used for quantizing the signal S/N  the signal-to-noise ratio in dB This relationship is based on the ratio of the rms quantity of the maximum input signal to the rms quantization noise. Another way of measuring digitized or quantized signals is the signal- to-quantization-noise level 1S/N2 q. This relationship is expressed mathematically, in dB, as 1S/N2 q 1dB2  10 log 3L2 (6) where L  number of quantization levels L  2n, where n  the number of bits used for sampling Example 2 shows how Equations (4), (5), and (6) can be used to obtain the number of quantizing bits required to satisfy a specified dynamic range and deter- mine the signal-to-noise ratio for a digitizing system. Example 2 A digitizing system specifies 55 dB of dynamic range. How many bits are required to satisfy the dynamic range specification? What is the signal-to-noise ratio for the system? What is 1S/N2 q for the system? Solution First solve for the number of bits required to satisfy a dynamic range (DR) of 55 dB. Digital Communications: Coding Techniques 364 DR  6.02 dB/bit 1n2 (4) 55 dB  6.02 dB/bit 1n2 55 n  9.136 6.02 Therefore, 10 bits are required to achieve 55 dB of dynamic range. Nine bits will provide a dynamic range of only 54.18 dB. The tenth bit is required to meet the 55 dB of required dynamic range. Ten bits provides a dynamic range of 60.2 dB. To determine the signal- to-noise (S/N) ratio for the digitizing system: S/N  31.76  6.02n4 dB (5) S/N  31.76  16.022104 dB S/N  61.96 dB Therefore, the system will have a signal-to-noise ratio of 61.96 dB. For this example, 10 sample bits are required; therefore, L  210  1024 and 1S/N2 q1dB2  10 log 3L2  10 log 3110242 2  64.97 dB (6) For Example 2, the dynamic range is 60.2 dB, S/N  61.96 dB, and 1S/N2 q  64.97 dB. The differences result from the assumptions made about the sampled signal and the quantization process. For practical purposes, the 60.2-dB value is a good estimate, and it is easy to remember that each quantizing bit provides about 6 dB of dynamic range. Companding Up to this point our discussion and analysis of PCM systems have been developed around uniform or linear quantization levels. In linear (uniform) quantization Uniform Quantization systems each quantile interval is the same step-size. An alternative to linear PCM Level systems is nonlinear or nonuniform coding in which each quantile interval step- each quantile interval is the same step-size size may vary in magnitude. It is quite possible for the amplitude of an analog signal to vary throughout Linear Quantization its full range. In fact, this is expected for systems exhibiting a wide dynamic range. Level The signal will change from a very strong signal (maximum amplitude) to a weak another name for uniform signal (minimum amplitude—V1sb for quantized systems). For the system to exhibit quantization level good signal-to-noise characteristics, either the input amplitude must be increased Nonlinear Coding with reference to the quantizing error or the quantizing error must be reduced. each quantile interval The justification for the use of a nonuniform quantization system will be step-size may vary in presented, but let’s discuss some general considerations before proceeding. How magnitude can the quantization error be modified in a nonuniform PCM system so that an Nonuniform Coding improved S/N results? The answer can be obtained by first examining a waveform another name for that has uniform quantile intervals as shown in Figure 17. Notice that poor resolu- nonlinear coding tion is present in the weak signal regions, yet the strong signal regions exhibit a reasonable facsimile of the original signal. Figure 17 also shows how the quantile intervals can be changed to provide smaller step-sizes within the area of the weak signal. This will result in an improved S/N ratio for the weak signal. What is the price paid for incorporating a change such as this in a PCM sys- tem? The answer is that the large amplitude signals will have a slightly degraded S/N, but this is an acceptable situation if the goal is improving the weak signal’s S/N. Digital Communications: Coding Techniques 365 Voltage 111 111 110 Largest step-size 110 101 Weak signal 101 100 100 011 011 Smallest step-size 010 010 001 001 Strong signal 000 000 Time Uniform Nonuniform quantization quantization FIGURE 17 Uniform (left) and nonuniform (right) quantization. Idle Channel Noise Digital communications systems will typically have some noise in the electronics and the transmission systems. This is true of even the most sophisticated technolo- Idle Channel Noise gies currently available. One of the noise signals present is called idle channel small-amplitude signal noise. Simply put, this is a noise source of small amplitude that exists in the channel that exists due to the independent of the analog input signal and that can be quantized by the A/D con- noise in the system verter. One method of eliminating the noise source in the quantization process is to incorporate a quantization procedure that does not recognize the idle channel noise as large enough to be quantized. This usually involves increasing the quantile inter- val step-size in the noise region to a large-enough value so that the noise signal can no longer be quantized. Amplitude Companding Amplitude Companding The other form of companding is called amplitude companding. Amplitude com- process of volume panding involves the process of volume compression before transmission and expan- compression before sion after detection. This is illustrated in Figure 18. Notice how the weak portion transmission and volume expansion after detection of the input is made nearly equal to the strong portion by the compressor but restored Voice in Voice out Encoder Decoder Digital Compressor Expander FIGURE 18 Companding process. Digital Communications: Coding Techniques 366 MT8960/62 MT8964/66 Digital output Digital output 11111111 10000000 11110000 10001111 11100000 10011111 11010000 10101111 11000000 10111111 10110000 11001111 10100000 11011111 10010000 11101111 10000000 11111111 00000000 01111111 00010000 01101111 00100000 01011111 00110000 01001111 01000000 00111111 01010000 00101111 01100000 00011111 01110000 00001111 01111111 00000000 –2.415 V –1.207 V 0V +1.207 V +2.415 V Analog input voltage (VIN) Bit 7… 0 MSB LSB FIGURE 19 -law encoder transfer characteristic. to the proper level by the expander. Companding is essential to quality transmission using PCM and the delta modulation technique. The use of time-division-multiplexed (TDM) PCM transmission for telephone transmissions has proven its ability to cram more messages into short-haul cables than frequency-division-multiplexed (FDM) analog transmission. The TDM PCM methods were started by Bell Telephone in 1962 and are now the only methods used in new designs except for delta modulation schemes. Once digitized, these voice signals can be electronically switched and restored without degradation. The stan- dard PCM system in U.S. and Japanese telephony uses m-law companding. In Europe, the CCITT* specifies A-law companding. The m-law companded signal is predicted by Vmax  ln11  m Vin/Vmax 2 Vout  (7) ln11  m2 The m parameter defines the amount of compression. For example, m  0 indicates no compression and the voltage gain curve is linear. Higher values of m yield nonlinear curves. The early Bell systems have m  100 and a 7-bit PCM code. An example of m-law companding is provided in Figure 19. This figure shows the encoder transfer characteristic. * Consultative Committee on International Telephone & Telegraph. Digital Communications: Coding Techniques 367 Parallel bits Analog-to- Parallel-to- Antialiasing digital serial Clock Analog filter converter converter in (ADC) Communication link Clock Serial bits Digital-to- Serial-to- analog parallel converter Analog converter (DAC) out Parallel Clock bits Clock FIGURE 20 PCM communication system. Digital-to-Analog Converters As we saw in Figure 7, the analog-to-digital converter (ADC) is used to convert the information signal to a digital format. This process is known as digitizing. A block diagram of a PCM system (transmitter and receiver) is shown in Figure 20. The ADC is shown in the transmitting section and the DAC in the receiver section. The function of the DAC is to convert a digital (binary) bit stream to an analog signal. The DAC accepts a parallel bit stream and converts it to its analog equivalent. Figure 21 illustrates this point. The least significant bit (lsb) is called b0 and the most significant bit (msb) is called bn1. The resolution of a DAC is the smallest change in the output that can be caused by a change of the input. This is the step-size of the converter. It is determined by the least significant bit (lsb). The full-scale voltage (VFS) is the largest voltage the converter can produce. In a digital-to-analog converter, the step- size or resolution q is given as VFS q (8) 2n where n is the number of binary digits. A binary-weighted resistor DAC is shown in Figure 22. It is one of the more simple DACs to analyze. For simplicity we have used four bits of data. Note that lsb bo DAC Vo msb bn–1 FIGURE 21 DAC input/output. Digital Communications: Coding Techniques 368 V Ref R/23 b4 R/22 Rf b3 1 R/2 b2 R/20 – b1 Vo + FIGURE 22 Binary-weighted resistor DAC. the value of the resistor is divided by the binary weight for that bit position. For example, in bit position 20, which has a value of 1, the entire value of R is used. This is also the lsb. Because this is a summing amp, the voltages are added to give the output voltage. The output voltage is given as Vo  VRef a b b1Rf b2Rf bn1Rf 0  p 1 (9) R/2 R/2 R/2n1 An R-2R ladder-type DAC is shown in Figure 23. This is one of the more pop- ular DACs and is widely used. Note that each switch is activated by a parallel data stream and is summed by the amp. We show a 4-bit R-2R circuit for simplicity. Ri Rf V Ref – 2R Vo Msb b4 + R 2R b3 R b2 2R Lsb R b1 2R 2R R-2R ladder DAC FIGURE 23 R-2R ladder DAC. Digital Communications: Coding Techniques 369

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