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MARWADI UNIVERSITY Subject Code:01CE0509 Subject Name: Fundamental of Processors B.Tech. Year–III Unit- 1  Outline Looping Objective of Course Course Outcomes Teaching and Examination Scheme Syllabus Mi...

MARWADI UNIVERSITY Subject Code:01CE0509 Subject Name: Fundamental of Processors B.Tech. Year–III Unit- 1  Outline Looping Objective of Course Course Outcomes Teaching and Examination Scheme Syllabus Microprocessor Introduction and Definition Microcomputer and single chip microcomputer Microprocessor History Microprocessor Architecture, Pin Functions, Demultiplexing of Buses, Memory and I/O operation, Generation of Control Signals, Basic concepts of Instruction Cycle, Machine Cycles, T-States in 8085 Objective of Course Students can learn the necessary knowledge and skills to work with microprocessors. They can also gain an understanding of the practical applications of microprocessors in various fields. 3 Course Outcomes  After Completion of this course students will be able to Understand the architecture of 8085 Microprocessor with other processors. Understand the architecture and operation of 8086 microprocessors. Apply the concept of Addressing mode and instruction of 8086 microprocrssors. Write, Debug, & Simulate assemby language programs Compare the architecture features of advance microprocerssors to design and implement simple microprocessor based systems. 4 Teaching and Examination Scheme 5 Syllabus: Unit-1 Introduction to 8085 6 Microprocessor Introduction and Definition  Microprocessor is a  Multipurpose  Programmable  Clock-driven  Register-based electronic device  Reads binary instruction from a storage device (MEMORY)  Accepts binary as input  Processes data according to instruction  Provides Result as output  It is a silicon chip which includes ALU, register circuits & control circuits 7 Microcomputer and single chip microcomputer  Computer is made up of four components: (1)Memory (2) input (3)Output (4) CPU  CPU (central processing unit) is consists of Arithmatic/ logic unit (ALU )and Control Unit (CU) as shown in Block Diagram (a).  Earlier ALU and CU are saperate component but later it is possible to make Single chip CPU as shown in Block Diagram (b). Which is known as Microprocessor.  A Computer with a microprocessor as its CPU is known an Microcomputer. 8 Microcomputer and single chip microcomputer  As Semiconductor Fabrication Technology advanced, It is possible to place Memory and I/O interfacing circuits on a Single chip which is known as Microcontroller.  Microcontroller is a Single chip microcomputer also includes additional devices such as an A/D converter, Serial I/O and Timers as shown in Block diagram (c). 9 History of Microprocessor Gordon Moore ,Co founder of Intel, recently passed away. He is famous for Moore’s Law: “ The number of transistors per integrated circuit would double every 18 months.” 10 History of Microprocessor Types of Microprocessor based on data bits:  4-Bit Microprocessors  8-Bit Microprocessors  16-Bit Microprocessors  32-Bit Microprocessors  64-Bit Microprocessors 11 History of Microprocessor 4 bit to 64 bit(4004 to Core i7) 12 History of Microprocessor  Intel released its first 4-bit microprocessor 4004 in 1971.  4004 quickly replaced by 8-bit Microprocessor the Intel 8008 and later 8008 was updated by 8- bit Microprocessor 8080.  4-Bit 8-Bit Microprocessors Microprocessors 8008 and 8080 4004 13 History of Microprocessor  The Intel 8085 Microprocessor were developed as improvements over the 8080.  Most micro computers now built with 32 and 64 bit microprocessor.  To Understand basic concepts of microprocessor, it is easier to understand from simple 8-bit processor than from a 64 bit processor.  This fundamental concepts are easily transferable from 8-bit processor to larger processor. 8-Bit Microprocessors 8085 16-Bit Microprocessors 8086 14 History of Microprocessor 16-Bit Microprocessors 16-Bit Microprocessors 15 History of Microprocessor 32-Bit Microprocessors 16 History of Microprocessor 17 8-bit 8085 Microprocessor 8085 developed in 1976, which has 8 bit data bus and 16 bit address bus.. 18 8-bit 8085 Microprocessor Fig1: 8085 CPU Chip in DIP Package 19 8-bit 8085 Microprocessor  Features of 8085 microprocessor (8-bit)  Single + 5V Supply  40-pin DIP package  It operates at 3.2 MHZ single phase clock with maximum clock frequency 6.144 MHz.  8-bit data bus  16-bit address bus which can address up to 64KB  It provide ACC, One flag register, 6 general purpose registers and two special purpose registers (SP,PC).  It provides 74 instructions with 5 different addressing modes. 20 8085 Microprocessor Architecture 21 8085 Microprocessor Architecture  It consists of 6 essential blocks. (1) Arithmetic Logic Unit Section (2) Register Array (3) The Timing And Control Unit (4) Instruction Register and Decoder (5) The Interrupt Control Section (6) Serial I/O Section 22 8085 Microprocessor Architecture 1) Arithmetic Logic Unit Section :This section consists of  Accumulator(A)  Temporarily Register (TR)  An Arithmetic Logic Unit (ALU)  Flag Register (FR)  Accumulator(A): It 8 bit register and part of ALU. It is identified by symbol A. In 8085 operation one data must be in Accumulator. The result of an operation is stored(accumulated) in the Accumulator. 23 8085 Microprocessor Architecture  Temporarily Register (TR): This is an 8 bit register not accessible to the user. It is used by the µp for internal operations.  Arithmetic Logic Unit (ALU): Perform arithmetical and logical operation.  Flag Register (FR): The ALU includes five flip-flops, which are set or reset after an operation according to data conditions of the result in the accumulator and other registers. They are called Sign (S),Zero (Z), Auxiliary Carry (AC), Parity (P), Carry (CY) and flags. 24 8085 Microprocessor Architecture 25 8085 Microprocessor Architecture 2) Register Array 1) 6 general purpose 8-bit registers (B, C, D, E, H ,L), 2) 2 temporary registers of 8 bit (W and Z) 3) Two 16-bit registers:  The Program Counter (PC),  The Stack Pointer (SP)  Address buffer and address/data bus buffer The 8085 has six general-purpose registers to store 8-bit data;  B, C, D, E, H, and L. They can be combined as register pairs - BC, DE, and HL - to perform some 16-bit operations. The programmer can use these registers to store or copy data into the registers by using data copy instructions. 26 8085 Microprocessor Architecture 2) Register Array W and Z : Used only for internal operation purpose. Not available for user to program it. These are two 16-bit registers used to hold memory addresses.  1) PC(Program Counter): Sequencing the execution of the program The function of the PC is to point(hold) to the memory address from which the next byte is to be fetched. When a byte (machine code) is being fetched, the program counter is incremented by one to point to the next memory location.  2) SP: Stack Pointer It points to a memory location in R/W memory, called the stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer. 27 8085 Microprocessor Architecture 2) Register Array Address buffer and Data/Address bus buffer:  The content of PC and SP is loaded to these register.  Output of these register is connected external address and data bus where memory and I/O are connected. (3)The Timing And Control Unit: This unit synchronizes all the µP operations with the clock and generates the control signals necessary for communication between the µP and peripherals.  Signals are:  X1, X2, Clock out, ALE,S0,S1,IO/M’,HOLD,HLDA,RESET IN and RESET OUT and 𝑹𝑫, 𝑾𝑹 28 8085 Microprocessor Architecture (4) Instruction Register and Decoder:  When instruction is fetched from memory ,it is loaded in the IR.  The decoder decodes the instruction and establishes the sequence of events to follow.  The IR is not programmable. (5) The Interrupt Control Section It handles interrupt of 8085 5 interrupt inputs. 1) TRAP 2) RST7.5 3) RST6.5 4) RST5.5 5) INTR INTA (INTerrupt Acknowledgement) (6) Serial I/O Section Two Lines- SOD and SID – used for serial communication 29 30 31 8085 PIN DIAGRAM 32 8085 Signals 33 8085 Microprocessor Pin Functions  8085 is a 40 pin IC, The signals from the pins can be grouped as follows 1. Power supply and clock frequency signals(4) 2. Address bus(8+8) 3. Data bus(8) 4. Control and status signals(6) 5. Interrupts and Externally initiated signals(12) 6. Serial I/O (2) 34 8085 Microprocessor Pin Functions 1. Power supply and clock frequency signals Vcc: + 5 volt power supply – Input pin Vss: Ground X1,X2  Crystal or R/C network or LC network connections to set the frequency of internal clock generator.  The frequency is internally divided by two.  Since the basic operating timing frequency is 3 MHz, a 6 MHz crystal is connected externally.  Input pin CLK -Clock Output is used as the system clock for peripheral and devices interfaced with the microprocessor. –output pin 35 8085 Microprocessor Pin Functions 2. Address Bus: A8-A15  This is output pins  The 8085 has eight signal lines ,A8 to A15 which are unidirectional and used as the high order address bus. 36 8085 Microprocessor Pin Functions 3. Multiplexed Address /Data Bus: AD0 - AD7 (input/output) These multiplexed(Combined) set of lines used to carry the lower order 8 bit address as well as 8 bit data. During the op-code fetch operation, in the beginning clock cycle, the lines deliver the lower order address A0 - A7 and later part of the cycle these lines are used as the data bus Do – D7. This bus is bidirectional. 37 System Bus(Data,Address and Control bus) Bus 38 8085 Bus structure 39 System Bus(Data , Address and control bus) The system bus is a group of wires/Copper tracks used to carry information between a computer microprocessor and the main memory and I/O.  Each wire can carry one bit.  i.e. if total 8 bits needed to be carried then 8 wires are required.  Name of bus is given according to their function. 1) Data bus : 2) Address bus 3) Control Bus 40 System Bus(Data , Address and control bus) 1) Data bus :  carries data and information between components.  Bidirectional.  More number of bits can be carried at the same time if more width of Data bus. 2) Address bus :  carries address from processor to memory and I/O.  Unidirectional.  Address bits indicates memory support capacity of any processor. i.e. If 3 wires for address ,so total 8 (2^3) Location of memory can be address. 3) Control bus :  carries timing and control signal from processor.  unidirectional. 41 8085 pin diagram 42 43 Need for Demultiplexing… RD A15 – A8 20H AD7 – AD0 05H Memory 4FH 2005H 8085 44 8085 Microprocessor Pin Functions 4. Control and Status signals: 1) ALE (output) - Address Latch Enable.  It is an output signal used to give information of AD0-AD7 contents.  It is a positive going pulse generated when a new operation is started by µP.  When pulse goes high it indicates that AD0-AD7 are address.  When it is low it indicates that the contents are data. 2) 𝑹𝑫 It is an output pin and it is an active low  Read memory or IO device.  This indicates that the selected memory location or I/O device is to be read and that the data bus is ready for accepting data from the memory or I/O device. 45 8085 Microprocessor Pin Functions 4. Control and Status signals: 3)𝑾𝑹 It is an output pin and it is an active low.  Write memory or I/O device.  This indicates that the data on the data bus is to be written into the selected memory location or I/O device. 4) IO/𝐌 ഥ  It is an output pin and used to select memory or an IO device.  This status signal indicates that the read / write operation relates to whether the memory or I/O device.  It goes high to indicate an I/O operation.  It goes low for memory operations. 5)S1,S0: It is used to know the type of current operation of the microprocessor. 46 7404 47  Case 1 I/M = 0 ,RD = 0 and WR = 1 Case 1 I/M = 0 ,RD = 1 and WR = 0 Memory Read signal Memory Write signal Case 1 I/M = 1 ,RD = 0 and WR = 1 I/O Read signal Case 1 I/M = 1 ,RD = 1 and WR = 0 I/O Write signal 48 8085 Microprocessor Pin Functions  8085 Machine Cycle Status and Control Signals. 49 8085 Microprocessor Pin Functions 5. Interrupts and Externally initiated operations:  They are the signals initiated by an external device to request the microprocessor to do a particular task or work.  There are five hardware interrupts called, On receipt of an interrupt, the microprocessor acknowledges the interrupt by the active low INTA (Interrupt Acknowledge) signal. 50 8085 Microprocessor Pin Functions 5. Interrupts and Externally initiated operations:  Responding“delayedor immediate”  “Maskable or Non-maskable ”Trap is non maskable.  Vectored: The address of the subroutine is already known to the Microprocessor.(Trap , RST 7.5,RST 6.5 and RST 5.5 ).  Non Vectored: The device will have to supply the address of the subroutine to the Microprocessor.(INTR). 51 8085 Microprocessor Pin Functions 5. Interrupts and Externally initiated operations: 52 8085 Microprocessor Pin Functions 5. Interrupts and Externally initiated operations: Reset In ( active low)  This signal is used to reset the microprocessor.  Input signal  The program counter inside the microprocessor is set to zero. Reset Out (Output):  It indicates CPU is being reset.  Output signal  Used to reset all the connected devices when the microprocessor is reset. 6. Serial I/O: The 8085 has 2 signals to implement the serial transmission those are 1) SID – Serial Input Data 2) SOD – Serial Output Data 53 1. T-STATE 2. MACHINE CYCLE 3. INSTRUCTION CYCLE 4. DIFFERENT MACHINE TIMING DIAGRAM 5. EXAMPLES OF INSTRUCTION CYCLES 54 T- State  Microprocessor performs an operation in a specific time period i.e. specific clock cycles.  Each clock cycle is called as T-state. T - STATE 55 Machine Cycle: The time required to access the memory or input/output devices is called machine cycle Machine cycle consists of 3 to 6 T-states. 56 Machine Cycle: Question: Name different types of machine cycles executed by the 8085 microprocessor?(GTU exam que.) There are total seven machine cycles in 8085 MP, 1. Opcode Fetch (4T to 6 T-state) 2. Memory Read (3 State) 3. Memory Write (3 State) 4. I/O Read (3 State) 5. I/O Write (3 State) 6. INTR Acknowledge 7. Bus Idle 57 Instruction Cycle  It is defined as the time required to complete the execution of an instruction called Instruction Cycle.  1 Instruction cycle consists of 1 to 6 machine cycle. 58 Status Signals STATUS SIGNALS MACHINE CYCLE IO/M S1 S0 OPCODE FETCH 0 1 1 MEMORY READ 0 1 0 MEMORY WRITE 0 0 1 I/O READ 1 1 0 I/O WRITE 1 0 1 INTERRUPT ACKNOWLEGE 1 1 1 BUS IDEAL 0 0 0 59 Timing diagram  Timing Diagram is a graphical representation.  It represents the execution time taken by each instruction in a graphical format.  The execution time is represented in T-states.  Representation of instruction cycle,machine cycle and T state. 60 1. OPCODE FETCH OPERATION The first operation in any instruction is opcode fetch.  The microprocessor needs to get(fetch) this machine code from memory where it is stored before the microprocessor can begin to execute the instruction.  It contains 4 to 6 T-states.  In Opcode Fetch - first three states T1 – T3 used to  fetch code and fourth state T4 used to decode and  execute opcode. 61 Rules for timing diagram 62  T1 T2 T3 T4 CLK MACHINE CYCLE (OPCODE FETCH) A15 – A8 HIGH-ORDER MEMROY ADDRESS UNSPECIFIED AD7 – AD0 LOW-ORDER OPCODE MEMROY ADDRESS ALE IO/M S1 , STATUS IO/M = 0, S1 = 1, S0 = 1 OPCODE FETCH S0 RD 63 Timing Diagram of byte transfer from memory to MPU 64 Timing Diagram of byte transfer from memory to MPU  The Opcode Fetch Execute Sequence : 1. The μp places a 16 bit memory address from PC (program counter) to address bus. – Figure : at T1 – The high order address, 20H, is placed at A15 – A8. – the low order address, 05H, is placed at AD7 - AD0 and ALE is active high. – Synchronously the IO/M’ is in active low condition to show it is a memory operation. 65 Timing Diagram of byte transfer from memory to MPU  The Opcode Fetch Execute Sequence : 2. At T2 the active low control signal, RD, is activated so as to activate read operation; it is to indicate that the MPU is in fetch mode operation. 3. T3: The active low RD signal enabled the byte instruction, 4FH, to be placed on AD7 – AD0 and transferred to the MPU. While RD high, the data bus will be in high impedance mode. 4. T4: The machine code, 4FH, will then be decoded in instruction decoder. The content of accumulator (A) will then copied into C register at time state, T4. 66 2) Timing Diagram of Memory Read Machine Cycle of 8085: The memory read machine cycle is executed by the processor to read a data byte from memory. The processor takes 3T states to execute this cycle. 67 2) Timing Diagram of Memory Read Machine Cycle of 8085: 68 3) Timing Diagram of Memory Write Machine Cycle of 8085:  The memory write machine cycle is executed by the processor to write a data byte in a memory location.  The processor takes, 3T states for this machine cycle. 69 3) Timing Diagram of Memory Write Machine Cycle of 8085: 70 Thank You