10 Diffusion and Ion Implantation PDF
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This document explains diffusion and ion implantation processes, highlighting their differences. It discusses the use of dopants and the control of majority carrier type and resistivity in semiconductor wafers using diffusion and ion implantation. The document is appropriate for studying advanced semiconductor fabrication topics.
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Diffusion ND>NA To introduce dopants such as boron, phosphorus into silicon to control majority carrier N type and resistivity of regions in wafers by the movement of atoms from P high...
Diffusion ND>NA To introduce dopants such as boron, phosphorus into silicon to control majority carrier N type and resistivity of regions in wafers by the movement of atoms from P high concentration region to low concentration region Diffusion Diffusion is a temperature and time dependent process. It is done in 2 steps: Predeposition (Constant-Source Diffusion) Drive-in (Limited-Source Diffusion) Predeposition is diffusion taking place under a constant supply of dopants to the process. Drive-in diffusion taking place in the absence of the supply of dopants but rather driving in the dopants predeposited. Diffusion Xj P N The junction depth occurs when the diffused dopants concentration is the same as the substrate dopants concentration. Given the substrate dopant concentration, the junction depth increases with: Increased Temperature Increased Time Calculation of diffused junction depth to be covered in Advanced Wafer Fabrication Technology Ion Implantation Ion Implantation is the acceleration of ionized dopants at high energy + into the surface of the wafer: Junction depth is dependent on the acceleration energy and substrate concentration. The maximum concentration of the dopants in the wafer is dependent on the dose of dopants ions accelerated. Ion Implantation Ion Implantation Low temperature process -> Photoresist, metal films etc. can be used as barrier mask Wider range of impurity species can be used Tight process control + Lattice Damage & Annealing: Ion impact can knock atoms out of the silicon lattice. Implantation damage can be removed by an annealing step At high temperature, silicon atoms can move back to the lattice sites Diffusion versus Ion Implantation Diffusion Ion Implantation High Temperature Low temperature process Narrow range of impurity Wider range species Maximum conc. at surface Uniform profile Simple High cost No crystal damage Crystal damage
