Week 9 - Memory.pptx

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ACSIT Computer Systems Fundamentals INFO1250 Conestoga College ACSIT Week 9 - Memory INFO1250 2 ACSIT ACSIT Some early memory 09/24/2024 INFO1250 4 ACSIT INFO1250 5 ...

ACSIT Computer Systems Fundamentals INFO1250 Conestoga College ACSIT Week 9 - Memory INFO1250 2 ACSIT ACSIT Some early memory 09/24/2024 INFO1250 4 ACSIT INFO1250 5 ACSIT Memory Reminder: – b – bit – B – byte INFO1250 6 ACSIT Memory (Continued) The two widely used forms of modern RAM are static RAM (SRAM) and dynamic RAM (DRAM) INFO1250 7 ACSIT SRAM a bit of data is stored using the state of a six- transistor memory cell, typically using six MOSFETS (metal-oxide-semiconductor field- effect-transistors). More expensive to produce but is generally faster and requires less dynamic power than DRAM. In modern computers, SRAM is often used as cache memory for theINFO1250 CPU. 8 ACSIT Memory SRAM Date of Capacity Access time SRAM type Manufacturer(s) Process MOSFET introduction (bits) Mar-63 1-bit ? Bipolar (cell) Fairchild N/A N/A 1965 8-bit ? Bipolar IBM ? N/A 1965 16-bit ? Bipolar IBM ? N/A 1965 64-bit ? MOSFET Fairchild ? PMOS 1966 16-bit ? Bipolar (TTL) Transitron ? N/A – Static random-access 1966 ? ? MOSFET NEC ? ? 1968 64-bit ? MOSFET Fairchild ? PMOS 1968 144-bit ? MOSFET NEC ? NMOS 1968 512-bit ? MOSFET IBM ? NMOS 1969 128-bit ? Bipolar IBM ? N/A memory 1969 256-bit 850 ns MOSFET Intel 12,000 nm PMOS 1972 1 Kibit ? MOSFET Intel ? NMOS 1974 1 Kibit 800 ns MOSFET Intel ? CMOS 1974 1 Kibit 350 ns MOSFET Intel ? NMOS (depletion) 1975 4 Kibit 450 ns MOSFET Intel ? NMOS 1976 1 Kibit 70 ns MOSFET Intel ? NMOS (HMOS) 1976 4 Kibit 55 ns MOSFET Intel ? NMOS (HMOS) -1963 –1-bit 1977 4 Kibit ? MOSFET Toshiba ? CMOS 1978 4 Kibit 55 ns MOSFET Hitachi 3,000 nm CMOS (twin-well) 1978 16 Kibit ? MOSFET Texas Instruments ? NMOS 1980 16 Kibit ? MOSFET Hitachi, Toshiba ? CMOS 1980 64 Kibit ? MOSFET Matsushita ? CMOS -1995 – 256 Mibit 1981 16 Kibit ? MOSFET Texas Instruments 2,500 nm NMOS Oct-81 4 Kibit 18 ns MOSFET Matsushita, Toshiba 2,000 nm CMOS 1982 64 Kibit ? MOSFET Intel 1,500 nm NMOS (HMOS) Feb-83 64 Kibit 50 ns MOSFET Mitsubishi ? CMOS 1984 256 Kibit ? MOSFET Toshiba 1,200 nm CMOS Sony, 1987 1 Mibit ? MOSFET Hitachi, Mitsubishi, ? CMOS Toshiba Dec-87 256 Kibit 10 ns BiMOS Texas Instruments 800 nm BiCMOS NEC, Toshiba, 1990 4 Mibit 15–23 ns MOSFET ? CMOS Hitachi, Mitsubishi 1992 16 Mibit 12–15 ns MOSFET Fujitsu, NEC 400 nm CMOS Dec-94 512 Kibit 2.5 ns MOSFET IBM ? CMOS (SOI) Cache (SyncBur 1995 4 Mibit 6 ns Hitachi 100 nm CMOS st) 1995 256 Mibit ? MOSFET Hyundai ? CMOS INFO1250 9 ACSIT DRAM Stores a bit of data using a transistor and capacitor pair (typically a MOSFET and MOS capacitor, respectively), which together comprise a DRAM cell. The capacitor holds a high or low charge (1 or 0, respectively), and the transistor acts as a switch that lets the control circuitry on the chip read the capacitor’s state of charge or change it. This form of memory is less expensive to produce than static RAM, it is the predominant form of computer memory used in modernINFO1250 computers. 10 ACSIT Memory DRAM – Dynamic random- access memory - 1965 –1-bit - 2001 – 4 Gibit INFO1250 11 ACSIT Memory SDRAM – Syncronous dynamic random-access memory - 1992 –16 Mb - 2018 – 128 Gb INFO1250 12 ACSIT Memory ECC and Non-ECC memory Error correction code memory (ECC memory) is a type of computer data storage that uses an error correction code (ECC) to detect and correct n-bit data corruption which occurs in memory. ECC memory is used in most computers where data corruption cannot be tolerated under any circumstances. Typically, ECC memory maintains a memory system immune to single-bit errors: the data that is read from each word is always the same as the data that has been written to it, even if one of the bits actually stored has been flipped to the wrong state. Most non-ECC memory cannot detect errors, although some non- ECC memory with parity support allows detection but not correction. INFO1250 13 ACSIT Memory Parity and Non-Parity Memory Parity memory is a type of error-checking memory, which is memory that verifies the information stored in memory is what is read from memory later. Non-parity memory is simply memory that does not perform any kind of error checking to ensure that the data written to memory is what is read when it is retrieved. INFO1250 14 ACSIT Memory Single Sided vs Double Side Memory – Single sided RAM refers to Ram modules that are mounted only on one side of the stick. – Double sided RAM refers to RAM modules that are mounted on both sides. – There is no difference in performance between single sided memory and double- sided memory. Single sided RAM has chips on only one side of the PCB. Double- sided RAM has chips on both sides. INFO1250 15 ACSIT Memory RAM Compatibility and Speed Considerations when expanding or replacing memory: – Memory type What type of memory does the computer use. Some examples of the different memory types include DDR-SDRAM, DDR2-SDRAM, DIMM, DRAM, EDO, FPM, SDRAM, LIMM, RDRAM (RAMBUS), RIMM, SIMM AND SODIMM. Today's computers usually use a variant of DIMM/SDRAM memory. SIMM – Single In-Line Memory Module ---- DIMM – Dual In-line memory module ---- SODIMM – Small Outline Dual In-Line memory module INFO1250 16 ACSIT Memory RAM Compatibility and Speed Considerations when expanding or replacing memory: – Number of pins INFO1250 17 ACSIT DDRx SDRAM 09/24/2024 INFO1250 18 ACSIT ACSIT Memory RAM Compatibility and Speed Considerations when expanding or replacing memory: – Speed of memory You can install faster memory than specified, but it will run at the slowest speed of the memory installed or the motherboard speed. – Error Checking ECC (error-correcting code) memory is used in servers and professional workstation computers. – Voltage What are the voltage requirements? Make sure you determine the voltage requirements of the memory. (e.g. 1.8v or 2.5v) INFO1250 20 ACSIT Memory RAM Compatibility and Speed Considerations when expanding or replacing memory: Multi-Channel – Dual Channel Architecture Dual channel architecture requires two or more DDR, DDR2, DDR3, DDR4, or DDR5 memory modules. The memory modules are installed into matching banks, each of which belong to different channel. Dual-channel-enabled memory controllers in a PC system architecture use two 64-bit data channels. Dual-channel should not be confused with double data rate (DDR), in which data exchange happens twice per DRAM clock. INFO1250 21 ACSIT Memory RAM Compatibility and Speed Considerations when expanding or replacing memory: – Triple-Channel Architecture – Quad-Channel Architecture – Six-Channel Architecture (servers) – Eight-Channel Architecture (servers) INFO1250 22

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