Timer IC 555 and Waveform Generation PDF
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Ahmedabad University
Maryam Kaveshgar/Ashok Ranade
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Summary
This document provides a comprehensive overview of using a Timer IC 555 and various waveform generations (astable, monostable, and bistable) in digital electronics. Diagrams and calculations are included for a better understanding.
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DIGITAL ELECTRONICS AND MICROPROCESSORS ENR107 Timer IC 555 By Maryam Kaveshgar/Ashok Ranade 555 IC Signetic Corporation 1971 Monolithic Timing Circuit Timer, Oscillator, Flip-flop Operates from 4.5 v to 16 v Sinks or source current upto 200 mA Can directly derive TTL It has C...
DIGITAL ELECTRONICS AND MICROPROCESSORS ENR107 Timer IC 555 By Maryam Kaveshgar/Ashok Ranade 555 IC Signetic Corporation 1971 Monolithic Timing Circuit Timer, Oscillator, Flip-flop Operates from 4.5 v to 16 v Sinks or source current upto 200 mA Can directly derive TTL It has CMOS version IC 555 Blocks 2 Operational Amplifiers 1 R-S flip-flop 1(2) Transistor 3 Resistors (5KOhm) The R-S Flip-flop R S Q 0 0 No output R Q change 0 1 1 S Q 1 0 0 1 1 Not used VTH VTL Modes of Use Stable Output States Multivibrator 0 Astable 1 Monostable 2 Bistable Astable = Oscillator Bistable mode Bistable -2nd Reset Monostable mode Monostable Mode vc = Vcc (1 − e − t / RC ) 2 At t = T : vc = Vcc 3 ∴ T = RC ln 3 T = 1.1 RC 𝑇𝑇 Monostable Schematic Diagram Astable Mode VCC RA Vcc 8 Reset R 4 Threshold RB 6 + R Q Output 3 VTH - R S Q VTL + Trigger 2 - C Discharge R 7 Ground 1 Astable Multivibrator VCC VTH vc VTL t TH VCC VTH v VTL c t TL TH vC = Vcc – (VCC- VTL) e –t/C(RA+RB) At t = TH vc = (2/3)VCC : Also VTL = VCC/3 TH = 0.69 C(RA+RB) And during discharge vC = VTHe –t/(CRB) And at t = TL vC = VCC/3 TL = 0.69 CRB Time period T = TH+TL T = 0.69 C(R A+2RB) Astable Monostable Bistable 50% Duty Cycle Exercise (50% duty Cycle) Chose RA = RB = 50 Kohms C = 100 Microfarads Build and simulate the circuit Verify the time period Simulation(Animated) Waveform generation Build a Sawtooth wave generator using Arduino Build a 3 bit D to A converter Provide the input to the D to A circuit through digital pins 1 Write x = 000 on the digital pins 2 Provide a delay of 1ms 3 Increment x by 1 4 Provide a delay of 1ms 5 Repeat 3 4 until x reaches maximum 6 Go to 1 Filter design D to A output will generate a staircase waveform To smoothen this wave form a low pass filter is required The period of triangular waveform generated is 8 ms (Frequency = 1/T = 125 Hz) Delay of 1 ms means staircase transitions occur at 1000 Hz You need a filter which will pass 125 Hz but reject 1000 Hz Filter calculations R = 100 Kohms C = 3 nF fc = 1/(2πRC) = 530.5 Hz Only first order filter is used Waveform can be improved by higher order filters Circuit Program