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Questions and Answers
What signal causes the processor to immediately terminate its present activity?
RESET
What does the INTR signal represent in the 8086 microprocessor?
The NMI (Non-Maskable Interrupt) is a hardware interrupt that can be disabled.
False
The _ pin is used to differentiate memory access and I/O access in the 8086 microprocessor.
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Match the following segment registers in the 8086 microprocessor with their descriptions:
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What mechanism is known for overlapping instruction fetch with execution in 8086 architecture?
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Which flag is set if the result of computation or comparison is zero in 8086 architecture?
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Directions Flag is used by string manipulation instructions to process strings in __________ mode.
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Overflow Flag in 8086 microprocessor architecture is set if the operation result overflows the destination register.
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Match the following registers with their descriptions:
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What type of addressing mode is used when BX or BP is used as the base value for effective address in a memory operation?
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String Addressing mode is employed in string operations to operate on string data.
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In Indirect I/O port Addressing mode, the 16-bit port address is stored in the _ register.
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Match the memory addressing mode with its description:
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Which register is used to hold the offset address of top stack memory?
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Which register is used to hold the index value of source operand (data) for string instructions?
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What is the special function of the 16-bit Accumulator register?
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The instruction will specify the name of the register which holds the data to be operated by the instruction. This is an example of __________ addressing.
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What is the main difference between minimum and maximum mode of operation in 8086?
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The 8086 microprocessor has a 20-bit address bus for accessing memory.
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What signal in 8086 is used to latch the addresses and BHE signal?
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What does the READY signal in 8086 indicate?
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Study Notes
Here are the study notes in bullet points:
- About Embedded Domain*
- To start learning in embedded domain, you need skills in:
- Embedded systems (electronic systems with a microprocessor or microcontroller)
- Assembly language programming for target devices like 8086 and 8051
- Features of 8086*
- 16-bit processor
- 16-bit data bus
- 20-bit address bus (can access up to 1MB of memory)
- 16-bit I/O address bus (can access up to 64K I/O ports)
- Multiplexed data bus and lower order address bus
- Fourteen 16-bit registers
- Requires a clock with 33% duty cycle (5MHz, 8MHz, or 10MHz)
- Powerful instruction set with various addressing modes
- Can perform bit, byte, word, and block operations
- Two modes of operation: Minimum and Maximum
- Pins and Signals*
- Classified into five groups:
- Address/Data bus (AD0-AD15)
- Address/Status bus (A16-S6)
- Control and Status signals
- Interrupts and externally initiated signals
- Power supply and clock frequency signals
- Each group has its own set of signals with specific functions
- Minimum Mode Configuration*
- Uses 8 signals for control, status, interrupt, and externally initiated functions
- Signals include:
- ALE (Address Latch Enable)
- DEN (Data Enable)
- DT/R (Data Transmit/Receive)
- M/IO (Memory/Input-Output)
- RD (Read)
- WR (Write)
- INTA (Interrupt Acknowledge)
- HLDA (Hold Acknowledge)
- Maximum Mode Configuration*
- Uses 8 signals for status, instruction queue, and multiprocessor configuration control
- Signals include:
- QS1, QS0 (Queue Status)
- S2, S1, S0 (Status bits)
- LOCK (Lock signal)
- RQ/GT (Request/Grant)
- INTA (Interrupt Acknowledge)
- Timing Diagram and Architecture*
- Execution Unit (EU) executes instructions
- Bus Interface Unit (BIU) fetches instructions, reads/writes data to memory/I/O ports
- EU and BIU function separately### 8086 Microprocessor Architecture
- The 8086 is a 16-bit microprocessor with a 1-megabyte memory divided into segments of up to 64K bytes each.
- It has a Bus Interface Unit (BIU) and an Execution Unit (EU).
Segment Registers
- There are four segment registers:
- Code Segment (CS)
- Data Segment (DS)
- Stack Segment (SS)
- Extra Segment (ES)
- Each segment register is 16-bit and points to a segment of memory.
Instruction Pointer (IP)
- The Instruction Pointer (IP) is a 16-bit register that points to the next instruction to be executed within the currently executing code segment.
- Its content is automatically incremented as the execution of the next instruction takes place.
Execution Unit (EU)
- The Execution Unit (EU) decodes and executes instructions.
- It has a decoder, a 16-bit Arithmetic Logic Unit (ALU), and four general-purpose registers (AX, BX, CX, DX).
- The AX, BX, CX, and DX registers can be used as 16-bit registers or as two 8-bit registers.
Registers
- The AX register is used for I/O operations and multiplication and division instructions.
- The BX register is used as a base register for addressing memory.
- The CX register is used as a counter register for shift, rotate, and loop instructions.
- The DX register is used to hold the high 16-bit result of a 16-bit multiplication and the high 16-bit dividend in a 32-bit division.
Stack Pointer (SP) and Base Pointer (BP)
- The Stack Pointer (SP) and Base Pointer (BP) are used to access data in the stack segment.
- The SP is used as an offset from the current SS during execution of instructions that involve the stack segment in the external memory.
- The BP contains an offset address in the current SS, which is used by instructions utilizing the based addressing mode.
Source Index (SI) and Destination Index (DI)
- The Source Index (SI) and Destination Index (DI) registers are used in indexed addressing.
- Instructions that process data strings use the SI and DI registers together with DS and ES respectively to distinguish between the source and destination addresses.
Flag Register
- The flag register is 16-bit and consists of six status flags (OF, SF, ZF, AF, PF, and CF) and three control flags (DF, IF, and TF).
Practice Problems
- Calculate the physical address for a given segment address and offset address.
- Determine the status of the flag register after the execution of a sequence of instructions.### Addressing Modes in 8086 Microprocessor
- The 8086 microprocessor has 12 addressing modes:
- 4 modes for register and immediate data (Group I)
- 5 modes for memory data (Group II)
- 2 modes for I/O ports (Group III)
- 1 mode for relative addressing (Group IV)
- 1 mode for implied addressing (Group IV)
Group I: Addressing Modes for Register and Immediate Data
- Register Addressing: specifies the name of the register which holds the data to be operated
- Example: MOV CL, DH
- The content of 8-bit register DH is moved to another 8-bit register CL
- Immediate Addressing: an 8-bit or 16-bit data is specified as part of the instruction
- Example: MOV DL, 08H
- The 8-bit data (08H) given in the instruction is moved to DL
- Direct Addressing: not applicable in this group
- Register Indirect Addressing: not applicable in this group
- Based Addressing: not applicable in this group
- Indexed Addressing: not applicable in this group
- Based Index Addressing: not applicable in this group
- String Addressing: not applicable in this group
- Direct I/O port Addressing: not applicable in this group
- Indirect I/O port Addressing: not applicable in this group
- Relative Addressing: not applicable in this group
- Implied Addressing: not applicable in this group
Group II: Addressing Modes for Memory Data
- Register Addressing: not applicable in this group
- Immediate Addressing: not applicable in this group
- Direct Addressing: the effective address of the memory location is given in the instruction
- Example: MOV BX, [1354H]
- The square brackets around the 1354H denotes the contents of the memory location
- Register Indirect Addressing: the name of the register which holds the effective address is specified
- Example: MOV CX, [BX]
- The content of the memory location is moved to CX
- Based Addressing: BX or BP is used to hold the base value for effective address and a signed 8-bit or unsigned 16-bit displacement
- Example: MOV AX, [BX + 08H]
- The effective address is calculated from BX and DS
- Indexed Addressing: SI or DI register is used to hold an index value for memory data and a signed 8-bit or unsigned 16-bit displacement
- Example: MOV CX, [SI + 0A2H]
- The effective address is calculated from SI and DS
- Based Index Addressing: the effective address is computed from the sum of a base register (BX or BP), an index register (SI or DI), and a displacement
- Example: MOV DX, [BX + SI + 0AH]
- The effective address is calculated from BX, SI, and DS
- String Addressing: employed in string operations to operate on string data
- Example: MOVS BYTE
- The effective address of source data is stored in SI register and the EA of destination is stored in DI register
- Direct I/O port Addressing: not applicable in this group
- Indirect I/O port Addressing: not applicable in this group
- Relative Addressing: not applicable in this group
- Implied Addressing: not applicable in this group
Group III: Addressing Modes for I/O Ports
- Register Addressing: not applicable in this group
- Immediate Addressing: not applicable in this group
- Direct Addressing: an 8-bit port address is directly specified in the instruction
- Example: IN AL, [09H]
- The content of port with address 09H is moved to AL register
- Register Indirect Addressing: the instruction specifies the name of the register which holds the port address
- Example: OUT [DX], AX
- The content of AX is moved to port whose address is specified by DX register
- Based Addressing: not applicable in this group
- Indexed Addressing: not applicable in this group
- Based Index Addressing: not applicable in this group
- String Addressing: not applicable in this group
- Direct I/O port Addressing: not applicable in this group
- Indirect I/O port Addressing: not applicable in this group
- Relative Addressing: not applicable in this group
- Implied Addressing: not applicable in this group
Group IV: Relative Addressing Mode
- The effective address of a program instruction is specified relative to Instruction Pointer (IP) by an 8-bit signed displacement
- Example: JZ 0AH
- If ZF = 1, then the program control jumps to new address calculated above
Group IV: Implied Addressing Mode
- Instructions using this mode have no operands
- The instruction itself will specify the data to be operated by the instruction
- Example: CLC
- This clears the carry flag to zero
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Description
Learn about the 8086 microprocessor, its features, and working with assembly language programs for target devices like 8086 and 8051. Develop essential skills for embedded systems and computer languages.
