CSC159 Computer Organization: I/O andPeriphials
35 Questions
0 Views

Choose a study mode

Play Quiz
Study Flashcards
Spaced Repetition
Chat to lesson

Podcast

Play an AI-generated podcast conversation about this lesson

Questions and Answers

What does I/O architecture refer to?

The design and structure responsible for managing communication between a computer's CPU and peripheral devices.

Which of the following are categories of peripherals connected to a computer?

  • Output Devices (correct)
  • Input Devices (correct)
  • Processing Devices
  • Storage Devices (correct)

    • Peripherals are devices separate from the CPU, memory, and power supply.

    True

    Peripherals store data for long-term retention using devices like external hard drives and ____.

    <p>USB Flash Drives</p> Signup and view all the answers

    Match the following peripheral interfaces with their descriptions:

    <p>USB (Universal Serial Bus) = Common interface for many peripherals HDMI (High-Definition Multimedia Interface) = For video and audio output Bluetooth = Wireless connection for devices like keyboards, mice, and speakers Ethernet = Wired network connection for devices like printers and NAS</p> Signup and view all the answers

    What is an interrupt?

    <p>A call for the microprocessor to interact or service the interrupting unit</p> Signup and view all the answers

    What are the two types of interrupts mentioned?

    <p>Software interrupt</p> Signup and view all the answers

    Interrupt-driven I/O approach prevents the CPU from continuously polling for module status.

    <p>True</p> Signup and view all the answers

    The interrupt handler program is also known as an ________.

    <p>interrupt routine</p> Signup and view all the answers

    Match the following uses of interrupts:

    <p>External Event Notifier = Indicate external devices that require action Completion Signal = Control the flow of data to an output device Means of Allocating CPU Time = Allocate CPU time to different programs sharing the CPU Abnormal Event Indicator = Handle abnormal events within the computer system</p> Signup and view all the answers

    What function does the CPU perform in relation to the I/O modules?

    <p>The CPU controls the I/O modules.</p> Signup and view all the answers

    Which of the following is an example of buffering?

    <p>Keyboard Input</p> Signup and view all the answers

    Handshaking is a process that establishes rules for communication with a foreign device.

    <p>True</p> Signup and view all the answers

    Polling is a technique where the CPU repeatedly checks the status of an I/O device to see if it is ready for ____ transfer.

    <p>data</p> Signup and view all the answers

    Match the I/O communication techniques with their descriptions:

    <p>Programmed I/O = CPU initiates a program for data transfer Interrupt Driven I/O = Device sends an interrupt signal to the CPU Direct Memory Access (DMA) = Device can send and receive data directly from memory</p> Signup and view all the answers

    What is a maskable interrupt in a computer system?

    <p>A type of hardware interrupt that can be turned off or 'masked' by the CPU.</p> Signup and view all the answers

    What is a non-maskable interrupt in a computer system?

    <p>A type of hardware interrupt that cannot be ignored or 'masked' by the CPU.</p> Signup and view all the answers

    Describe the purpose of Direct Memory Access (DMA) in computer systems.

    <p>DMA allows certain hardware components to directly read from and write to the main memory (RAM) without involving the CPU.</p> Signup and view all the answers

    Which of the following are advantages of DMA over programmed I/O?

    <p>Reduced CPU Overhead</p> Signup and view all the answers

    _____ devices like disk drives and network cards benefit greatly from DMA due to its high efficiency.

    <p>High-throughput</p> Signup and view all the answers

    What is the main difference between IO Bus Architecture and IO Channel Architecture?

    <p>IO Bus Architecture uses dedicated channels for I/O operations, while IO Channel Architecture shares a communication pathway.</p> Signup and view all the answers

    What does the Stack in a computer system do?

    <p>temporarily stores contents of registers</p> Signup and view all the answers

    What is the function of the Stack Pointer (SP) in a computer system?

    <p>points to the top of the stack</p> Signup and view all the answers

    Stack operates by ____ (LIFO)

    <p>Last In First Out</p> Signup and view all the answers

    Software Stack has slow access time due to limited registers.

    <p>False</p> Signup and view all the answers

    Match the following stack functions/usages with their purpose:

    <p>Subroutine call = To store data when the most recently used data will be needed first Interrupt occurrence = For efficient way of storing intermediate data values during calculations Stack instruction = To efficiently manage data during complex calculations</p> Signup and view all the answers

    Which I/O mechanism requires the highest CPU involvement?

    <p>Programmed I/O</p> Signup and view all the answers

    Which I/O mechanism is the most complex to implement?

    <p>Direct Memory Access (DMA)</p> Signup and view all the answers

    Which I/O mechanism provides the best performance?

    <p>Direct Memory Access (DMA)</p> Signup and view all the answers

    Match the I/O system architecture component with its role:

    <p>CPU = Performs processing tasks I/O Module = Interface between CPU or memory and I/O devices Memory = Stores data and instructions One or more I/O modules = Receives commands from CPU and controls I/O device(s) Buses = Connect the various components together</p> Signup and view all the answers

    Channel architecture is mainly found in mainframe computers and high-performance servers.

    <p>True</p> Signup and view all the answers

    State the contents of AX, BX, DX after the following instructions: PUSH AX, PUSH BX, PUSH DX

    <p>AX: 2424h, BX: C285h, DX: 5F23h</p> Signup and view all the answers

    After executing 'POP CX', 'POP DX', and 'POP BX' with SP = 18FA, the contents of the stack are as follows: SP 18FA: ____, SP 18FB: ____, SP 18FC: ____, SP 18FD: ____, SP 18FE: ____, SP 18FF: ____, SP 1900: ____

    <p>23, 14, 6B, 2C, 91, F6, 25</p> Signup and view all the answers

    Which of the following statements about Endian Order is correct?

    <p>Little-endian stores the high-order byte at the lowest address.</p> Signup and view all the answers

    Explain why understanding Endian Order is important when handling data files.

    <p>It is essential to know the Endian Order to correctly interpret data files across different machine architectures.</p> Signup and view all the answers

    Study Notes

    Introduction to Computer Organization

    • Computer Organization refers to the design and structure of a computer system that manages and facilitates communication between the CPU and peripheral devices.

    Peripherals

    • Peripherals are external devices connected to a computer that provide input, output, or storage functions.
    • Examples of peripherals include:
      • Input devices: keyboard, mouse, scanner, microphone
      • Output devices: monitor, printer, speakers, projector
      • Storage devices: external hard drive, USB flash drive, CD/DVD/Blu-ray drives, network attached storage (NAS)

    Peripheral Interfacing

    • Peripherals connect to the computer through various interfaces and ports, such as:
      • USB (Universal Serial Bus)
      • HDMI (High-Definition Multimedia Interface)
      • Bluetooth
      • Ethernet

    Importance of Peripherals

    • Peripherals enhance the functionality of a computer beyond its core functions.
    • They facilitate user interaction with the computer, making it easier to input and receive data.
    • Peripherals enable the computer to perform specialized tasks, such as printing, scanning, and audio recording.

    I/O Consideration

    • When designing and managing I/O systems, speed and coordination are critical factors to consider.
    • Two key I/O considerations are:
      • Speed: ensuring efficient data transfer between the CPU and peripherals
      • Coordination: managing multiple devices performing I/O operations simultaneously

    Speed Consideration

    • The CPU operates at speeds much faster than the fastest I/O device.
    • Techniques such as buffering, caching, and parallel processing can be employed to mitigate speed disparities.
    • Managing data transfers efficiently becomes challenging when devices with varying speeds are connected to the same system.
    • Implementing adaptive algorithms or prioritization schemes can help manage data transfers based on device speeds.

    Coordination Consideration

    • Multiple devices perform I/O operations simultaneously, requiring coordination to ensure efficient and error-free data transfer.
    • Coordination involves managing unexpected input, various input formats, and status information for each device.

    I/O Module

    • An I/O module serves as an interface between the CPU and peripheral devices.
    • It manages communication and data transfer between the CPU and external devices.
    • An I/O module is responsible for:
      • Controlling one or more external devices
      • Exchanging data between devices and main memory and/or CPU

    I/O Module Functions

    • The I/O module performs two different functions:
      • At the CPU interface, it accepts I/O commands from the CPU and transfers data between the module and the CPU or memory.
      • At the device interface, it supplies control of the device, such as moving the head to the correct track in a disk drive.

    Buffering

    • Buffering is a method where a buffer holds data and releases it at specific times.
    • A buffer is a region of memory used to temporarily hold data while it is being moved from one place to another.
    • Buffering is used to manage differences in data transfer rates between devices and the CPU.

    Handshaking

    • Handshaking is a process that takes place when a computer is about to communicate with a foreign device to establish rules for communication.
    • It involves a brief back-and-forth series of requests and acknowledgements to request a connection.

    I/O Techniques

    • There are three types of I/O communication techniques:
      • Programmed I/O: The CPU initiates a program to transfer data from an I/O device to memory.
      • Interrupt Driven I/O: The CPU offers a read command to the I/O device, and once the device is ready, it sends an interrupt signal to the processor.
      • Direct Memory Access (DMA): The I/O device can send and receive data directly from memory, bypassing the CPU.

    Programmed I/O

    • Programmed I/O is a method used by the CPU to directly control the data transfer between itself and peripheral devices.

    • The CPU is heavily involved in the data transfer process, issuing commands and waiting for operations to complete before moving on to the next task.

    • Polling and response are techniques used in programmed I/O, where the CPU repeatedly checks the status of an I/O device to see if it is ready for data transfer.### Programmed I/O

    • Initiation: CPU issues a command to the peripheral device by writing to its control register.

    • Polling: CPU continuously checks the status of the peripheral device to determine if it is ready for data transfer.

    • Data Transfer: CPU reads data from or writes data to the device once it indicates it is ready.

    • Completion: CPU completes the data transfer operation and moves on to the next task.

    Interrupt-Driven I/O

    • CPU initiates an I/O operation with a peripheral device and then continues executing other tasks.
    • When the I/O operation is complete or requires attention, the device sends an interrupt request (IRQ) to the CPU.
    • CPU interrupts its current task, transfers control to an interrupt handler routine, processes the I/O operation, and then resumes the interrupted task.

    Module Calls CPU When Needed

    • Module refers to a peripheral device such as a disk drive, network interface, or keyboard.
    • Module communicates with the CPU as needed for data transfer or to signal events.
    • In interrupt-driven I/O, modules do not constantly communicate with the CPU; instead, they initiate communication or notify the CPU only when necessary.

    Interrupt Requests (IRQs)

    • When a module needs the CPU's attention, it sends an interrupt request (IRQ) signal.
    • IRQ interrupts the CPU's current execution and triggers the CPU to handle the module's request or event.

    Interrupt Handler

    • CPU responds to the IRQ by transferring control to a specific part of the operating system called an interrupt handler or interrupt service routine (ISR).
    • Interrupt handler is responsible for processing the module's request, whether it involves data transfer, error handling, or other actions.

    Summary of Interrupt-Driven I/O

    • Overcome CPU waiting; no repeated CPU checking of device.
    • I/O module interrupts when ready.
    • Still requires CPU to be the go-between for moving data between I/O module and main memory.
    • Interrupt-driven I/O approach allows the CPU to focus on executing other tasks or processes until a module requires attention.

    Interrupt

    • A call for the microprocessor to interact or service the interrupting unit.
    • Signal that causes the CPU to alter its normal flow of instruction execution.
    • Frees CPU from waiting for events; provides control for external input.
    • Examples: unexpected input, abnormal situation, illegal instructions, multitasking, multiprocessing.

    Servicing the Interrupt

    • There are four steps taken by the microprocessor to handle an interrupt:
      1. Finish the current instruction.
      2. Suspend operation and store registers.
      3. Jump to the interrupt routine and execute.
      4. Return to normal operation and restore registers.

    Uses of Interrupts

    • As an external event notifier.
    • As a completion signal.
    • As a means of allocating CPU time.
    • As an abnormal event indicator.

    The Interrupt As An External Event Notifier

    • To indicate some external devices require action.
    • Frees CPU from polling; a means for the user to control the computer from an input device.
    • Example: keyboard input.

    The Interrupt As A Completion Signal

    • To control the flow of data to an output device.
    • Interrupt serves to notify the computer of the completion of a particular course of action.
    • Means of controlling the flow of data to an external device.
    • Example: printing process and DMA process.

    The Interrupt As A Means Of Allocating CPU Time

    • Time sharing.
    • Used as a method of allocating CPU time to different programs that are sharing the CPU.
    • The computer system provides an internal clock that sends an interrupt periodically to the CPU.

    The Interrupt As An Abnormal Event Indicator

    • Used to handle abnormal events that affect the operation of the computer.
    • The events are directly related to problems within the computer system itself.
    • Example: execution of an illegal instruction, nonexistent code, and hardware error.

    Software Interrupts

    • Modern CPU instruction sets include an instruction that simulates an interrupt.
    • The interrupt instruction works in the same way as a hardware interrupt, saving appropriate registers and transferring control to an interrupt handling procedure.

    Multiple Interrupts

    • Multiple interrupts will occur from time to time.
    • Two different processing methods used to determine which devices initiated the interrupt:
      1. Vectored interrupt.
      2. Polled interrupt.

    Direct Memory Access (DMA)

    • A feature in computer systems that allows certain hardware components to directly read from and write to the main memory (RAM) without involving the CPU.

    • Method of transferring data from the computer's RAM to another part of the computer without processing it using the CPU.

    • Useful when the CPU cannot keep up with the rate of data transfer, or where the CPU needs to perform useful work while waiting for a relatively slow I/O data transfer.### Direct Memory Access (DMA)

    • DMA allows I/O modules and main memory to exchange data directly, without CPU involvement.

    • DMA enables certain hardware to access main system memory independently of the CPU.

    • It enables direct transfer to and from memory.

    • DMA is used for large blocks/volumes of data transfer.

    • The CPU is not actively involved in the transfer itself.

    • In DMA, the data transfer is managed by the DMA controller, which allows the CPU to perform other tasks while the transfer is ongoing.

    • When the transfer is complete, the DMA module sends an interrupt signal to the CPU.

    DMA Instructions

    • The application program requests I/O service from the operating system.
    • To initiate DMA, programmed I/O is used to send the following information:
      • The location of the data on the I/O device.
      • The starting location of the block of data in memory.
      • The size of the block to be transferred.
      • The direction of transfer (read or write).
    • An interrupt is sent to the CPU upon completion of DMA.

    CPU-I/O Interaction

    • Conflicts between the CPU and the I/O module must be avoided.
    • Bus arbitration is used to handle conflicts, where a priority system determines whether the CPU or the DMA controller gets access to the bus at any given time.

    Advantages of DMA

    • Reduced CPU overhead, as the DMA controller manages the data transfer.
    • Faster data transfer, as DMA can transfer data directly between memory and peripherals at high speeds.

    I/O Devices that Require DMA

    • Hard Disk Drives (HDDs) and Solid-State Drives (SSDs)
    • Network Interface Cards (NICs)
    • Graphics Cards (GPUs)
    • Sound Cards

    Differences between Programmed I/O, Interrupt-Driven I/O, and DMA

    • Programmed I/O: The CPU is responsible for directly controlling all data transfers between memory and I/O devices.
    • Interrupt-Driven I/O: The CPU initiates a data transfer and then continues with other tasks, while the I/O device interrupts the CPU when it is ready to transfer data.
    • DMA: A separate hardware component (the DMA controller) manages the data transfer between memory and I/O devices.

    CPU-Memory-I/O Architecture

    • Five basic components are involved in the interface between the CPU and the I/O peripheral:
      • The CPU
      • The I/O peripheral device
      • Memory
      • One or more I/O modules
      • Buses

    I/O Bus Architecture

    • A bus forms the backbone for connection of the various components, memory, and I/O, to the CPU.
    • A single system bus connects the CPU to memory and to all the various modules that control I/O devices.
    • The system bus organization of a PC consists of a CPU bus, a PCI bus, and sometimes an ISA bus.

    Bus Characteristics

    • Buses are characterized by their:
      • Configuration
      • Width (bits carried simultaneously)
      • Speed
      • Usage

    Categories of Buses

    • Parallel bus: A bus in which there is an individual line for each bit of data, address, and control being used.
    • Serial bus: A bus in which data is transferred sequentially, one bit at a time, using a single data line pair.

    Bus Topology

    • Point-to-point bus: A bus that carries signals from a specific source to a specific destination.
    • Multipoint bus (multidrop bus/broadcast bus): A bus used to connect several points together.

    I/O Channel Architecture

    • The channel architecture is based on a separate I/O processor known as a channel subsystem.
    • The I/O processor acts as a separate computer, just for I/O operations, thus freeing the CPU for other tasks.
    • The channel subsystem executes its own set of instructions, known as channel control words, independent of the CPU.

    Comparison of I/O Bus Architecture and I/O Channel Architecture

    • I/O Bus Architecture: Connects the CPU, memory, and various peripheral devices via a shared communication pathway called a bus.
    • I/O Channel Architecture: Uses dedicated channels to manage I/O operations between the CPU and peripheral devices.
    • Each device has its dedicated channel for specific types of I/O operations.

    Studying That Suits You

    Use AI to generate personalized quizzes and flashcards to suit your learning preferences.

    Quiz Team

    Related Documents

    Computer Organization PDF

    Description

    This quiz covers peripheral roles, I/O techniques, interrupts, and data transfer in computer organization. Students will assess speed and coordination issues, understand DMA and its benefits, and compare bus and channel architectures.

    More Like This

    Use Quizgecko on...
    Browser
    Open
    Browser
    Browser