Computer Architecture and Assembly Language Quiz

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Questions and Answers

What is the maximum number of different values that can be encoded by a bit string with 4 bits?

16 (correct)

How is overflow determined by the CPU for B2S (two's complement) addition?

By checking if the most significant bit is 1

By checking if the most significant bit is 0

By checking if the carry exits from the most significant bit

By checking if the carry enters into the most significant bit (correct)

What is a byte in terms of memory size?

32 bits

16 bits

4 bits

8 bits (correct)

What is the range of values that can be encoded by a B2T (two's complement) number of 5 bits?

-16 to 15 Signup and view all the answers

What are the main components of a computer system?

Input Unit, Output Unit, Memory Unit, Central Processing Unit Signup and view all the answers

What is the smallest unit of memory in a computer system?

Bit Signup and view all the answers

Which type of CPU uses the load/store architecture?

RISC Signup and view all the answers

How many condition codes does Y86-64 have?

3 Signup and view all the answers

What is the primary difference between a subroutine call and a branch in CPU execution?

A return address must be saved for a subroutine call but not for a branch. Signup and view all the answers

What are labels used for in assembly language?

Jumping to specific locations within the code Signup and view all the answers

Which ISA type provides the human programmer with a more complex interface?

CISC Signup and view all the answers

What sizes of operands can the Y86 simulated CPU work on?

8 bytes Signup and view all the answers

In what way is saving a return address on the stack limited?

By the stack size Signup and view all the answers

Which types of instructions in the CPU are responsible for executing high-level language statements like if-else or loops?

Branch instructions Signup and view all the answers

In Y86, what are the two things that the call instruction does?

Pushes parameters then saves the return address Signup and view all the answers

What is a practical use of Boolean identities/laws?

To simplify circuits Signup and view all the answers

Why is it important for each subroutine in Y86 to save the calling subroutine’s rbp before setting its own?

To ensure the calling subroutine’s base pointer can be restored Signup and view all the answers

How does a jump (branch) differ when taken and not taken in Y86?

The next instruction is different for each scenario Signup and view all the answers

What happens when new data is pushed onto the stack in Y86?

The stack grows downward Signup and view all the answers

What is always pushed onto the stack after all parameters when a subroutine is called in Y86?

The return address Signup and view all the answers

What does a decoder do in circuit design?

Selects a specific output line based on input signals Signup and view all the answers

How many outputs does a decoder have if it has n inputs?

$2^n$ outputs Signup and view all the answers

What are labels used for in Y86 programming?

Marking addresses in memory for easy reference by the assembler Signup and view all the answers

What is stored at each subroutine's frame in Y86 before each function call?

The return address for that function and local variables used within the function Signup and view all the answers

Which type of circuit is used to implement memory?

Sequential Signup and view all the answers

What combination of input bit values must be prevented for an SR-gate?

Both S and R being high Signup and view all the answers

In the simple accumulator machine, how many bits are used for the opcode in a one-byte instruction?

3 bits Signup and view all the answers

How does a cache improve performance in a CPU system?

By reducing the need to fetch data from main memory Signup and view all the answers

What is the primary idea behind pipelining a CPU?

To overlap instruction execution stages Signup and view all the answers

What is the typical cache hit rate mentioned in class for various software types?

~90% Signup and view all the answers

Which protocol uses a dirty bit for updating data in cache memory?

Write-back Signup and view all the answers

What does fetching mean when the PC sends an address to memory?

Reading the instruction from memory and sending it back to CPU. Signup and view all the answers

How many clock cycles does each instruction require in the simple accumulator machine?

One clock cycle per instruction. Signup and view all the answers

How does the CPU determine overflow for B2T (signed) addition?

By comparing the last two carries Signup and view all the answers

What method is used to negate an integer in B2T (Two’s complement)?

Bitwise NOT followed by adding 1 Signup and view all the answers

In B2O (One’s complement), how is an integer negated?

Bitwise XOR with 1 Signup and view all the answers

Why is Two’s complement encoding universally used in hardware?

It eliminates the need for separate overflow checks Signup and view all the answers

How does the CPU detect overflow in Two’s complement operations?

By comparing the last two carries using an XOR gate Signup and view all the answers

What technique is used for subtraction in Two’s complement with a first carry of 1?

Bitwise NOT followed by adding 1 Signup and view all the answers

How many bits are used for the exponent in IEEE 754 single-precision floating-point encoding?

11 bits Signup and view all the answers

Which value is encoded by an IEEE 754 number if the true exponent is negative?

-Infinity Signup and view all the answers

What trade-off allows for a greater range of values in IEEE 754 encoded numbers?

Less precision for each value Signup and view all the answers

Why are many IEEE 754 encoded values only approximations to real number values?

Due to rounding errors during encoding process Signup and view all the answers

Study Notes

Y86 Architecture

Y86 is a simulated CPU based on Intel X86-64 architecture
Y86 has 15 registers
Y86 has 3 condition codes (flags): ZF, SF, and OF
Y86 set condition codes/flags based on the result of the operation
Y86 can work on signed operands only
Y86 can work on 8-byte (64-bit) data only
Y86 addresses are 8 bytes (64 bits) in size

Address Expressions

DISP(BASE) is the format of address expressions in Y86
DISP is an optional constant displacement of the base address
BASE is a named register (one of the 15 Y86 registers)

ALU Instructions

Y86 has 4 ALU instructions: addq, subq, andq, and xorq
ALU instructions use two register operands
ALU instructions set the 3 flags (And, Or, and Xor)

Jump Instructions

Unconditional jump instruction: jmp
Conditional jump instructions: je, jne, jl, jle, jg, and jge
Jump instructions are taken if the flags are set accordingly

Flags

Flags are set based on the result of the operation
Flags are used to determine if a jump instruction is taken

Labels

Labels are used to mark addresses in memory
The assembler converts the label to the corresponding address

Call and Ret Instructions

Call instruction: pushes the return address onto the stack and jumps to the subroutine
Ret instruction: pops the return address from the stack and jumps to the return address

Stack

The stack grows downward (toward lower addresses)
Pushq instruction: pushes a value onto the stack
Popq instruction: pops a value from the stack

Parameters

Parameters are passed on the stack in reverse order
The return address is pushed onto the stack after all parameters

Boolean Logic

Boolean logic uses values 1 and 0 (true and false)
Truth tables for AND, OR, and NOT operations
NAND and NOR gates are universal and cheap to implement

Circuit Simplification

Boolean identities/laws can be used to simplify circuits
Circuit simplification can reduce cost, power consumption, and heat

Computer Components

Main components of a computer: CPU, memory, and input/output devices
Memory is organized as an array of bytes
Addresses are indexes into the memory array

Bit Strings

Bit strings are used to encode data and instructions
Instructions are encoded as bit strings
Data can be encoded as bit strings (unsigned and signed integers, floating-point numbers, etc.)

Encoding

Unsigned integers: B2U (binary-to-unsigned) encoding
Signed integers: B2S (binary-to-signed), B2T (two's complement), and B2O (one's complement) encoding
Floating-point numbers: IEEE 754 single-precision encoding

Integer Arithmetic

Unsigned integer addition: no overflow detection
Signed integer addition: overflow detection using carry flags
Subtraction: can be done using inversion and addition

Encoding and Data Types

ASCII encoding: 7-bit code for characters
UTF-8 encoding: variable-length code for characters
Parity and msb of ASCII code can be used for error detection

CPU Functionality

CPU can perform four types of instructions: arithmetic, load, store, and control
CPU has sub-parts: registers, ALU, and control
CPU can execute instructions in a pipeline

Instruction Set Architecture (ISA)

ISA is the human programmer visible machine interface
ISA defines the syntax and semantics of instructions
RISC (Reduced Instruction Set Computing) and CISC (Complex Instruction Set Computing) are two types of ISAs

Processor Status Register (PSR)

PSR has four flags: ZF, SF, OF, and CF
Flags are used to determine the result of an operation

Branch Instructions

Branch instructions: conditional and unconditional jumps
Branch instructions are used to implement if-else statements and loops

Subroutines

Subroutines: functions, procedures, and methods
Subroutines can be called using a call instruction
Subroutines can return using a ret instruction

Stack and Frames

Stack is used to store parameters and return values
Frames are used to store local variables
Frames are allocated and deallocated using push and pop instructions

Cache

Cache is a small, fast memory
Cache improves performance by reducing memory access time
Cache hit rate and miss rate are used to measure cache performance

Pipelining

Pipelining is a technique to improve CPU performance
Pipelining overlaps the stages of instruction execution
Pipelining can improve performance by 2-5 times

Hazards

Hazards: instruction hazards and data hazards
Hazards can reduce the performance of a pipelined CPU
Hazards can be resolved using techniques such as stalls and bypassing

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Test your knowledge on computer architecture and assembly language with questions about RISC and CISC processors, conversion from assembly to machine language, processor architectures, and assembly language instructions compared to high-level languages.