Computer Architecture and Assembly Language Quiz

Y86 Architecture

• Y86 is a simulated CPU based on Intel X86-64 architecture
• Y86 has 15 registers
• Y86 has 3 condition codes (flags): ZF, SF, and OF
• Y86 set condition codes/flags based on the result of the operation
• Y86 can work on signed operands only
• Y86 can work on 8-byte (64-bit) data only
• Y86 addresses are 8 bytes (64 bits) in size

Address Expressions

• DISP(BASE) is the format of address expressions in Y86
• DISP is an optional constant displacement of the base address
• BASE is a named register (one of the 15 Y86 registers)

ALU Instructions

• Y86 has 4 ALU instructions: addq, subq, andq, and xorq
• ALU instructions use two register operands
• ALU instructions set the 3 flags (And, Or, and Xor)

Jump Instructions

• Unconditional jump instruction: jmp
• Conditional jump instructions: je, jne, jl, jle, jg, and jge
• Jump instructions are taken if the flags are set accordingly

Flags

• Flags are set based on the result of the operation
• Flags are used to determine if a jump instruction is taken

Labels

• Labels are used to mark addresses in memory
• The assembler converts the label to the corresponding address

Call and Ret Instructions

• Call instruction: pushes the return address onto the stack and jumps to the subroutine
• Ret instruction: pops the return address from the stack and jumps to the return address

Stack

• The stack grows downward (toward lower addresses)
• Pushq instruction: pushes a value onto the stack
• Popq instruction: pops a value from the stack

Parameters

• Parameters are passed on the stack in reverse order
• The return address is pushed onto the stack after all parameters

Boolean Logic

• Boolean logic uses values 1 and 0 (true and false)
• Truth tables for AND, OR, and NOT operations
• NAND and NOR gates are universal and cheap to implement

Circuit Simplification

• Boolean identities/laws can be used to simplify circuits
• Circuit simplification can reduce cost, power consumption, and heat

Computer Components

• Main components of a computer: CPU, memory, and input/output devices
• Memory is organized as an array of bytes
• Addresses are indexes into the memory array

Bit Strings

• Bit strings are used to encode data and instructions
• Instructions are encoded as bit strings
• Data can be encoded as bit strings (unsigned and signed integers, floating-point numbers, etc.)

Encoding

• Unsigned integers: B2U (binary-to-unsigned) encoding
• Signed integers: B2S (binary-to-signed), B2T (two's complement), and B2O (one's complement) encoding
• Floating-point numbers: IEEE 754 single-precision encoding

Integer Arithmetic

• Unsigned integer addition: no overflow detection
• Signed integer addition: overflow detection using carry flags
• Subtraction: can be done using inversion and addition

Encoding and Data Types

• ASCII encoding: 7-bit code for characters
• UTF-8 encoding: variable-length code for characters
• Parity and msb of ASCII code can be used for error detection

CPU Functionality

• CPU can perform four types of instructions: arithmetic, load, store, and control
• CPU has sub-parts: registers, ALU, and control
• CPU can execute instructions in a pipeline

Instruction Set Architecture (ISA)

• ISA is the human programmer visible machine interface
• ISA defines the syntax and semantics of instructions
• RISC (Reduced Instruction Set Computing) and CISC (Complex Instruction Set Computing) are two types of ISAs

Processor Status Register (PSR)

• PSR has four flags: ZF, SF, OF, and CF
• Flags are used to determine the result of an operation

Branch Instructions

• Branch instructions: conditional and unconditional jumps
• Branch instructions are used to implement if-else statements and loops

Subroutines

• Subroutines: functions, procedures, and methods
• Subroutines can be called using a call instruction
• Subroutines can return using a ret instruction

Stack and Frames

• Stack is used to store parameters and return values
• Frames are used to store local variables
• Frames are allocated and deallocated using push and pop instructions

Cache

• Cache is a small, fast memory
• Cache improves performance by reducing memory access time
• Cache hit rate and miss rate are used to measure cache performance

Pipelining

• Pipelining is a technique to improve CPU performance
• Pipelining overlaps the stages of instruction execution
• Pipelining can improve performance by 2-5 times

Hazards

• Hazards: instruction hazards and data hazards
• Hazards can reduce the performance of a pipelined CPU
• Hazards can be resolved using techniques such as stalls and bypassing

Test your knowledge on computer architecture and assembly language with questions about RISC and CISC processors, conversion from assembly to machine language, processor architectures, and assembly language instructions compared to high-level languages.