27 Questions
What is the purpose of MOSFET design rules?
To define how small features can be and how closely they can be packed
Which unit process step is responsible for creating a layer of silicon dioxide on the wafer surface?
Oxidation
What do layout design rules in IC fabrication primarily govern?
The size and spacing of features in the IC
What makes migrating from one process to a more advanced process difficult?
Not all rules scale in the same way
What is the main objective of creating stick diagrams for MOS circuits?
To visualize the physical layout of the circuit
Why is it important to understand the capabilities and limitations of stick diagrams?
To optimize circuit performance
What does CMOS stand for in Complementary CMOS Logic Style?
Complementary Metal-Oxide-Semiconductor
What is a key topic covered in EC303 CMOS VLSI Design?
Fabrication, operation, and characteristics of MOSFET
In building CMOS gates, what is located on the 'n-side'?
N-diffusion
Which course outcome involves analyzing the performance of a CMOS inverter?
CO2: Analyze the performance of CMOS inverter
What is the purpose of a stick diagram in circuit design?
To provide a high-level overview of circuit functionality
What are some of the design techniques covered in the course for digital circuits using CMOS?
Pseudo NMOS and Dynamic logic
What is the purpose of studying MOSFET capacitances in EC303 CMOS VLSI Design?
For analyzing circuit stability
Which type of logic design is NOT discussed in EC303 CMOS VLSI Design?
Analog-to-digital conversion logic
What is an essential part of the unit process steps in CMOS technology discussed in EC303?
Fabrication process flow
What is the purpose of stick diagrams in VLSI design?
To translate circuit concepts onto silicon
What does a poly crossing diffusion represent in a stick diagram?
Transistor
According to the rules of stick diagrams, what does it mean when two sticks of different types cross or touch each other?
No electrical contact
What information do stick diagrams convey through color codes or monochrome encoding?
Topography and layer information
In CMOS stick diagrams, what is the purpose of the demarcation line drawn between p-diff and n-diff?
To prevent direct contact between p-diff and n-diff
What aspect of MOS circuits do stick diagrams help plan and visualize?
Interconnections between components
What should be the relationship between the placement of pMOS and nMOS in Stick Diagrams?
All pMOS must lie on one side while all nMOS must be on the other side
What is a key component of the physical structure of an NMOS?
p+ source/drain
Which layer is not part of the implicit layers in PMOS layout representation?
n-well
What does Leff < Ldrawn indicate in NMOS physical structure?
Lateral doping effects are minimal
What should be the relationship between p-substrate and n+ source/drain in physical structure of pMOS?
They must be on opposite sides of SiO2
Which component is common in both NMOS and PMOS layout representations?
polysilicon gate
Study Notes
EC303 CMOS VLSI Design
Course Outcomes
- Explain the fabrication, operation, and characteristics of MOSFET
- Analyze the performance of CMOS inverter
- Design digital circuits using CMOS gates
- Design analog circuits using CMOS gates
- Outline the latest trends in CMOS technology
Introduction to MOSFETs
- Unit process steps of CMOS technology:
- Wafer preparation
- Oxidation
- Lithography
- Diffusion
- Ion-implantation
- Epitaxy
- Metallization
- Fabrication process flow: NMOS, PMOS, Twin well CMOS
- Structure and operation of the MOS transistor
- I-V and CV characteristics
- MOSFET capacitances
- Layout and design rules
- Scaling and short channel effects
MOS Inverters
- Inverters with resistive, MOSFET load
- CMOS inverter: Voltage transfer characteristics
- Noise margins
- Switching characteristics
- Calculation of delay times
- Effect of load on switching characteristics and driving large loads
- Logical effort of paths
Digital Circuits Using CMOS
- Pseudo NMOS
- Pass transistor
- Transmission gates
- Dynamic logic
- Domino logic
- Differential cascode voltage switch logic
- Design of combinational circuits
- Design of sequential circuits
- Timing requirements
Analog Circuits
- Second-order effects in MOSFETs
- Single stage Amplifiers:
- Common-source stage
- Source follower
- Common-gate
- Cascode stage
- Differential Amplifiers
- Passive and Active current mirrors
- CMOS operational amplifier
- Gain boosting techniques
Trends in CMOS Technology
- SOI
- FinFET and multi-gate FET
- 2D materials-based FETs
- On-chip interconnects
Layout Design Rules
- Definition: A schematic of the Integrated Circuit (IC) that describes the exact placement of components for fabrication
- Purpose: To specify how small features can be and how closely they can be packed in a manufacturing process
- Importance: Why we need layout design rules
- Specification: Typically in microns, making it difficult to migrate to more advanced processes
Stick Diagrams
- Definition: A means of capturing topography and layer information using simple diagrams
- Purpose: Acts as an interface between symbolic circuit and actual layout
- Features:
- Does show all components/vias
- Shows relative placement of components
- Goes one step closer to the layout
- Helps plan the layout and routing
- Limitations:
- Does not show exact placement of components
- Does not show transistor sizes
- Does not show wire lengths, wire widths, tub boundaries
- Does not show low-level details such as parasitics
Drawing Stick Diagrams
- Rule 1: When two or more ‘sticks’ of the same type cross or touch each other, it represents electrical contact
- Rule 2: When two or more ‘sticks’ of different types cross or touch each other, there is no electrical contact
- Rule 3: When a poly crosses diffusion, it represents a transistor
- Rule 4: In CMOS, a demarcation line is drawn to avoid touching of p-diff with n-diff
Test your knowledge on CMOS logic design concepts including the structure of N-channel MOSFET, using MOSFET as a switch, building CMOS gates, Complementary CMOS logic style, and stick diagrams. Identify challenges in scaling design rules for advanced processes.
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