ARM Virtual Memory Address Translation

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Questions and Answers

What is the purpose of sections and supersections in ARM virtual memory address translation?

To allow mapping of a large region of memory while using only a single entry in the TLB

What is the primary function of the Scheduler in the depicted system?

To allocate CPU time to processes

What is the size of a supersection in ARM virtual memory address translation?

16-MB blocks of main memory

What is the state of Process A in figure (a)?

Running Signup and view all the answers

What is the function of the level 1 table in ARM virtual memory address translation?

To hold level 1 descriptors that contain the base address and translation properties Signup and view all the answers

What is the size of a large page in ARM virtual memory address translation?

64-kB blocks of main memory Signup and view all the answers

What is the role of the Service Handler in the system?

To handle interrupts and context switching Signup and view all the answers

What is the state of Process B in figure (c)?

Running Signup and view all the answers

What is the purpose of the translation table in ARM virtual memory address translation?

To hold the level 1 and level 2 tables Signup and view all the answers

What is the size of a small page in ARM virtual memory address translation?

4-kB blocks of main memory Signup and view all the answers

What is the primary function of the Interrupt Handler in the system?

To handle interrupts and context switching Signup and view all the answers

What is the state of Process A in figure (b)?

Waiting Signup and view all the answers

What is the function of the level 2 table in ARM virtual memory address translation?

To hold level 2 descriptors that contain the base address and translation properties Signup and view all the answers

How much memory is required by the level 2 table in ARM virtual memory address translation?

1kB of memory Signup and view all the answers

What is a monitor in the context of computer systems?

A computer program that manages system resources Signup and view all the answers

Why is memory protection necessary in a computer system?

To prevent user programs from altering the memory area containing the monitor Signup and view all the answers

What happens when a processor encounters a privileged instruction while executing a user program?

The processor transfers control to the monitor Signup and view all the answers

What is the purpose of a timer in a computer system?

To prevent a job from monopolizing the system Signup and view all the answers

What happens when the timer expires?

An interrupt occurs and control returns to the monitor Signup and view all the answers

What is the purpose of interrupts in a computer system?

To give the OS more flexibility in relinquishing control to and regaining control from user programs Signup and view all the answers

What type of instructions can only be executed by the monitor?

Privileged instructions Signup and view all the answers

What is the role of the monitor when a user program encounters an error?

The monitor aborts the job, prints an error message, and loads the next job Signup and view all the answers

What is the main purpose of the Inverted Page Table Structure?

To provide a more efficient way of mapping virtual addresses to physical addresses Signup and view all the answers

What happens when the CPU checks the TLB and does not find a page table entry?

The CPU starts the page fault handling routine Signup and view all the answers

What is the function of the hash function in the Inverted Page Table Structure?

To index the page table Signup and view all the answers

What is stored in each entry of the Inverted Page Table?

A page number and its corresponding frame number Signup and view all the answers

What is the purpose of the Lookaside Buffer (TLB)?

To cache recently accessed page table entries Signup and view all the answers

What happens when the OS instructs the CPU to read a page from disk?

The CPU reads the page from disk and loads it into main memory Signup and view all the answers

What is the purpose of the page fault handling routine?

To handle page faults by reading pages from disk Signup and view all the answers

What is the main advantage of using an Inverted Page Table?

It optimizes the translation of virtual addresses to physical addresses Signup and view all the answers

What does the Base field in a segment descriptor define?

The starting address of the segment Signup and view all the answers

What is the function of the D/B bit in a code segment?

It indicates whether operands and addressing modes are 16 or 32 bits Signup and view all the answers

What does the Granularity bit (G) control?

The interpretation of the Limit field Signup and view all the answers

What is the maximum segment size limit when the Granularity bit is set to 1?

4 Gbytes Signup and view all the answers

What is the function of the S bit in a segment descriptor?

It determines whether a segment is a system segment or a code or data segment Signup and view all the answers

What is the function of the Accessed bit (A) in a page table?

It indicates whether a read or write operation to the corresponding page occurs Signup and view all the answers

What is the function of the Dirty bit (D) in a page table?

It indicates whether a write operation to the corresponding page occurs Signup and view all the answers

What does the Page Frame Address provide?

The physical address of the page in memory Signup and view all the answers

Study Notes

Virtual Memory Address Translation

The ARM supports memory access based on either sections or pages
Sections consist of 1-MB blocks of main memory
Supersections (optional) consist of 16-MB blocks of main memory
Large pages consist of 64-kB blocks of main memory
Small pages consist of 4-kB blocks of main memory

Translation Tables

Level 1 table holds level 1 descriptors that contain the base address and translation properties for a section and supersection
Level 2 table holds level 2 descriptors that contain the base address and translation properties for a small page or a large page
Level 2 table requires 1kB of memory

Desirable Hardware Features

Memory protection ensures user programs do not alter the memory area containing the monitor
The processor hardware detects errors and transfers control to the monitor
Privileged instructions can only be executed by the monitor
I/O instructions are privileged, so the monitor retains control of all I/O devices
Timer is used to prevent a job from monopolizing the system

Interrupts

Interrupts give the OS more flexibility in relinquishing control to and regaining control from user programs
Timer interrupts occur when the timer expires

Operating System

Operatingsystem has three components: service handler, scheduler, and interrupt handler
The scheduler decides which job to execute next
Interrupt handler handles interrupts and returns control to the scheduler

Inverted Page Table Structure

Inverted page table structure is used to translate virtual addresses to physical addresses
Each entry in the inverted page table corresponds to a physical memory frame
The page table contains a hash function, page number, and control bits

Operation of Paging and Translation

The Lookaside Buffer (TLB) is used to cache recently accessed page table entries
The CPU checks the TLB for a page table entry before accessing the page table
If the page table entry is not in the TLB, a page fault occurs and the OS handles the page fault

x86 Memory Management Parameters

Segment descriptor (segment table entry) contains the base address, D/B bit, descriptor privilege level (DPL), granularity bit (G), limit, S bit, and segment present bit (P)
Page directory entry and page table entry contain the accessed bit (A), dirty bit (D), and page frame address

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