MIPS Instruction Set PDF

MIPS32/64 Instruction Set MIPS Architecture MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA) developed by MIPS Computer Systems, now MIPS Technologies, based in the United States....

MIPS32/64 Instruction Set MIPS Architecture MIPS (Microprocessor without Interlocked Pipelined Stages) is a family of reduced instruction set computer (RISC) instruction set architectures (ISA) developed by MIPS Computer Systems, now MIPS Technologies, based in the United States. 2 MIPS Architecture There are multiple versions of MIPS: including MIPS I, II, III, IV, and V; as well as five releases of MIPS32/64 (for 32- and 64-bit implementations, respectively). The early MIPS architectures were 32-bit; 64-bit versions were developed later. 3 What is Instruction Set? The repertoire of instructions of a computer Different computers have different instruction sets But with many aspects in common Early computers had very simple instruction sets Simplified implementation Many modern computers also have simple instruction sets 4 What is Instruction Set? Understanding the language of the hardware is key to understanding the hardware/software interface A program (in say, C) is compiled into an executable that is composed of machine instructions – this executable must also run on future machines – for example, each Intel processor reads in the same x86 instructions, but each processor handles instructions differently 5 What is Instruction Set? Java programs are converted into portable bytecode that is converted into machine instructions during execution (just-in-time compilation) Important design principles when defining the instruction set architecture (ISA): next slide 6 What is Instruction Set? keep the hardware simple – the chip must only implement basic primitives and run fast keep the instructions regular – simplifies the decoding/scheduling of instructions 7 The MIPS Instruction Set Used as the example throughout the book Stanford MIPS commercialized by MIPS Technologies Large share of embedded core market Applications in consumer electronics, network/storage equipment, cameras, printers, etc. Typical of many modern ISAs 8 MIPS arithmetic Most instructions have 3 operands Operand order is fixed (destination first) Example: C code: A=B+C MIPS code: add $s0, $s1, $s2 ($s0, $s1 and $s2 are associated with variables by compiler) 9 Operands In C, each “variable” is a location in memory In hardware, each memory access is expensive – if variable a is accessed repeatedly, it helps to bring the variable into an on-chip scratchpad and operate on the scratchpad (registers) 10 Operands To simplify the instructions, we require that each instruction (add, sub) only operate on registers Note: the number of operands (variables) in a C program is very large; the number of operands in assembly is fixed… there can be only so many scratchpad registers 11 Registers vs. Memory Arithmetic instruction operands must be registers, — only 32 registers provided Compiler associates variables with registers What about programs with lots of variables ? 12 Registers vs. Memory Registers are faster to access than memory Operating on memory data requires loads and stores More instructions to be executed Compiler must use registers for variables as much as possible Only spill to memory for less frequently used variables; Register optimization is important! 13 Register Allocation Compiler tries to keep as many variables in registers as possible Some variables can not be allocated large arrays (too few registers) aliased variables (variables accessible through pointers in C) dynamic allocated variables: heap and stack 14 Memory Address The compiler organizes data in memory… it knows the location of every variable (saved in a table)… it can fill in the appropriate mem-address for load-store instructions 15 Memory Organization Viewed as a large, single- dimension array, with an address A memory address is an index into the array "Byte addressing" means that successive addresses are one byte apart 16 Memory Organization Bytes are nice, but most data items use larger "words" For MIPS, a word is 32 bits or 4 bytes. 232 bytes with byte addresses from 0 to 232-1 230 words with byte addresses 0, 4, 8,... 232-4 17 Memory Layout: Alignment Words are aligned What are the least 2 significant bits of a word address? 18 MIPS ISA Selected Instruction Set 19 Assembly Language vs. Machine Language Assembly provides convenient symbolic representation much easier than writing down numbers e.g., destination first Machine language is the underlying reality e.g., destination is no longer first 20 Assembly Language vs. Machine Language Assembly can provide 'pseudoinstructions' e.g., “move $t0, $t1” exists only in Assembly would be implemented using “add $t0,$t1,$zero” When considering performance you should count real instructions 21 References Maza, M. 2015. CS3350B Computer Architecture Winter 2015. Lecture 4.1: MIPS ISA: Introduction. Henk Corporaal. 2011. Advanced Computer Architecture 5MD00 / 5Z033 MIPS Instruction-Set Architecture. TUEindhoven. 22 Let’s have an ice breaker ☺ 4-pics 1-word ______ MEMORY _________ PROCESSOR _______ MACHINE ___________ INSTRUCTION __________ ARITHMETIC Let’s have a short break ☺