Computer Architecture CSL3020 PDF

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Indian Institute of Technology, Jodhpur

Deepak Mishra

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computer architecture computer science instruction set architecture digital logic

Summary

These are lecture notes from a computer architecture course. The notes cover various topics, including instruction set architectures (ISAs), including the RISC and CISC paradigms, as well as MIPS instructions.

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Computer Architecture CSL3020 Deepak Mishra http://home.iitj.ac.in/∼dmishra/ Department of Computer Science and Engineering Indian Institute of Technology Jodhpur Computer Architecture: CSL3020 Indian Institute of Technology...

Computer Architecture CSL3020 Deepak Mishra http://home.iitj.ac.in/∼dmishra/ Department of Computer Science and Engineering Indian Institute of Technology Jodhpur Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 1/46 ISA ISA is an abstract interface between hardware and software that encompasses all the information necessary to write a machine language program. Example of instructions in an ISA Arithmetic instructions: add, sub, mul, div Logical instructions: and, or, not Data transfer/movement instructions Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 2/46 ISA Features Following features are desirable in an ISA Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 3/46 ISA Features Following features are desirable in an ISA Completeness: It should be able to implement all the programs that users may write. Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 3/46 ISA Features Following features are desirable in an ISA Completeness: It should be able to implement all the programs that users may write. Conciseness: The instruction set should have a limited size. Typically an ISA contains 32-1000 instructions. Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 3/46 ISA Features Following features are desirable in an ISA Completeness: It should be able to implement all the programs that users may write. Conciseness: The instruction set should have a limited size. Typically an ISA contains 32-1000 instructions. Generic: Instructions should not be too specialized, e.g. add14 (adds a number with 14) instruction is too specialized. Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 3/46 ISA Features Following features are desirable in an ISA Completeness: It should be able to implement all the programs that users may write. Conciseness: The instruction set should have a limited size. Typically an ISA contains 32-1000 instructions. Generic: Instructions should not be too specialized, e.g. add14 (adds a number with 14) instruction is too specialized. Simplicity: Should not be very complicated. Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 3/46 ISA Paradigms There are two popular ISA paradigms Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 4/46 ISA Paradigms There are two popular ISA paradigms RISC: Reduced Instruction Set Computer. Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 4/46 ISA Paradigms There are two popular ISA paradigms RISC: Reduced Instruction Set Computer. RISC implements simple instructions that have a simple and regular structure. The number of instructions is typically a small number e.g. ARM. Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 4/46 ISA Paradigms There are two popular ISA paradigms RISC: Reduced Instruction Set Computer. RISC implements simple instructions that have a simple and regular structure. The number of instructions is typically a small number e.g. ARM. CISC: Complex Instruction Set Computer. Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 4/46 ISA Paradigms There are two popular ISA paradigms RISC: Reduced Instruction Set Computer. RISC implements simple instructions that have a simple and regular structure. The number of instructions is typically a small number e.g. ARM. CISC: Complex Instruction Set Computer. CISC implements complex instructions that are irregular, take multiple operands, and implement complex functionalities. The number of instructions is large e.g. Intel x86 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 4/46 ISA Example Single instruction ISA sbn – subtract and branch if negative Add (a + b) (assume temp = 0) 1 sbn temp, b, 2 2 sbn a, temp, exit Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 5/46 ISA Example Add the numbers – 1... 10 Slide credit: SR Sarangi Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 6/46 Real-world ISA Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 7/46 Real-world ISA We will consider MIPS instruction set to learn about Assembly Language. Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 7/46 MIPS Instructions MIPS: Microprocessor without Interlocked Pipeline Stages : ISA MIPS: Millions Instructions Per Sec: Measure Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 8/46 MIPS Arithmetic Addition C code: a=b+c MIPS code: add $s0, $s1, $s2 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 9/46 MIPS Arithmetic Addition C code: a=b+c MIPS code: add $s0, $s1, $s2 Subtraction C code: a=b-c MIPS code: sub $s0, $s1, $s2 # register $s0 contains b - c Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 9/46 MIPS Arithmetic Addition C code: a=b+c MIPS code: add $s0, $s1, $s2 Subtraction C code: a=b-c MIPS code: sub $s0, $s1, $s2 # register $s0 contains b - c Simplicity favors regularity Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 9/46 MIPS Arithmetic C code: a = (b + c) - (d + e) Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 10/46 MIPS Arithmetic C code: a = (b + c) - (d + e) MIPS code: add $t0, $s1, $s2 add $t1, $s3, $s4 sub $s0, $t0, $t1 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 10/46 MIPS Registers Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 11/46 MIPS Registers Why are there only 32 registers? Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 11/46 MIPS Arithmetic C code: A = h + A; Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 12/46 MIPS Arithmetic C code: A = h + A; Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 12/46 MIPS Arithmetic C code: A = h + A; Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 12/46 MIPS Arithmetic C code: A = h + A; MIPS code: lw $t0, 32($s0) add $t0, $s1, $t0 sw $t0, 48($s0) Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 12/46 MIPS Arithmetic addi $s3, $s3, 4 # add immediate Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 13/46 MIPS Instructions MIPS Assembly to Machine Instructions add $t0, $s1, $s2 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 14/46 MIPS Instructions MIPS Assembly to Machine Instructions add $t0, $s1, $s2 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 14/46 MIPS Instructions MIPS Assembly to Machine Instructions add $t0, $s1, $s2 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 15/46 MIPS Instructions MIPS Assembly to Machine Instructions add $t0, $s1, $s2 Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 16/46 MIPS Instructions Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 17/46 MIPS Instructions op: Basic operation of the instruction (opcode). rs: The first source operand register. rt: The second source operand register. rd: The destination operand register. shamt: Shift amount. funct: Function. This field selects the specific variant of the operation in the op field. address: Offset for load/store instructions constant: Constants for immediate instructions Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 17/46 MIPS Instructions MIPS Assembly to Machine Instructions lw $t0, 32($s0) Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 18/46 MIPS Instructions MIPS Assembly to Machine Instructions lw $t0, 32($s0) Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 18/46 MIPS Instructions Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 19/46 MIPS Logical Instructions Logical Operations Computer Architecture: CSL3020 Indian Institute of Technology Jodhpur 20/46 MIPS Logical Instructions For example if register $s0 contains 0000 0000 0000 0000 0000 0000 0000 1001 sll $t2, $s0, 4 # reg $t2 = reg $s0

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