Microprocessors Ch1. The Architecture of a Computer PDF

Horia Cucu Speech & Dialogue Research Laboratory Faculty of Electronics, Telecommunications and Information Technology University POLITEHNICA of Bucharest 1.1 Definitions  Block Diagram of a Von Neumann...

Horia Cucu Speech & Dialogue Research Laboratory Faculty of Electronics, Telecommunications and Information Technology University POLITEHNICA of Bucharest 1.1 Definitions  Block Diagram of a Von Neumann computer  A computer is a digital electronic machine that can be programmed to carry out a sequence of arithmetic and logical operations. 01.10.2024 Microprocessor Architectures 4  Functional Components  CPU: the hardware block which processes data and controls the system  Memory: the hardware block which stores data in a sequence of memory locations  I/O devices: hardware blocks that form the interface between the computer and the external world  Busses: the connections between the above blocks 01.10.2024 Microprocessor Architectures 5  Von Neumann Principles  Both data and instructions are stored in the memory  The contents of the memory is accessed by location  The microprocessor is the CPU of the computer; its role is to process data and control the system  The instructions are fetched from the memory and executed sequentially by the CPU  I/O ports are used to communicate with other devices  The three hardware blocks are interconnected by the system bus 01.10.2024 Microprocessor Architectures 6  The Memory – Basic Principles  Memory – sequence of memory locations used to store info  Each memory location:  stores an 8-bit number, a byte of data  is identified by a unique number, called address  The memory is accessed and organized by the CPU only  The CPU can choose to create logical subdivisions within the memory (called pages or segments)  The memory map – all memory locations that can be addressed by the CPU (not necessarily implemented)  The size of the memory map – performance criterion 01.10.2024 Microprocessor Architectures 7  The Memory – A Closer Look 01.10.2024 Microprocessor Architectures 8  The Memory – A Closer Look  The size of the memory is directly linked with the size of an address through the following equation: memorySize = 2 addressSize[bits]  Example 1:  using an address of 2 bits, one can form 4 different addresses: 00, 01, 10, and 11, for up to 4 different memory locations  consequently, a memory with an address of 2 bits will comprise 4 memory locations (4 bytes).  Example 2:  using a 20-bit address, one can form 220 different addresses, corresponding to 220 different memory locations  consequently, a memory with a 20-bit address will comprise 220 memory locations (1 MB). 01.10.2024 Microprocessor Architectures 9  The Memory – Content Significance This could be a 16-bit result This could be an instruction These could be the first two elements in an array of 8-bit numbers The significance of the information is given by the programmer. The memory “doesn’t know” the significance of the information it stores! 01.10.2024 Microprocessor Architectures 10  Input/Output Devices  I/O Devices – hardware blocks that form the interface between the computer and the external world  I/O Devices – can be regarded as a set of I/O Ports  Each I/O port can be used to:  send an 8-bit/16-bit/32-bit number to an external device  receive an 8-bit/16-bit/32-bit number from an external device  is identified by a unique number, called port address  The ports map – all ports that can be addressed by the CPU (not necessarily implemented)  The size of the ports map – performance criterion 01.10.2024 Microprocessor Architectures 11  The System Bus  Bus – set of physical connections that link several hardware blocks; these connections are used for information transfer  The CPU, Memory and I/O Devices are connected through a unique System Bus with three components:  A bidirectional Data Bus  Transfers data (operands, results, etc.) and instructions  An unidirectional Address Bus  Through this bus the CPU sends addresses to the Memory and I/O Devices  A bidirectional Control Bus  Transfers command and control signals from/to the CPU 01.10.2024 Microprocessor Architectures 12  The Software Component  The computer is executing instructions organized in computer programs, namely the software  Two main categories:  The Operating System: set of programs which facilitate the user’s access to the system’s resources  User Software: set of programs specifically created by the user to achieve a certain task 01.10.2024 Microprocessor Architectures 13  Summary  The CPU: executes instructions (processes data) and controls the system  The Memory: stores both the data and the instructions  The I/O Devices: interconnect the computer with the outside world 01.10.2024 Microprocessor Architectures 14 1.2 Information Representation in Computer Systems  Information Representation in Computer Systems  Information is stored using electronic circuits, called flip- flops (or bistables), that have two stable states: on/off  The state of a bistable can be used to represent a bit (i.e. binary digit: 0, 1) or a boolean value (true, false)  Data types with more than two possible values are stored using sequences of bits:  Byte (B) – a sequence of 8 bits: can store max 28 (256) values  Word (w) – a sequence of 16 bits: can store max 216 values  Double word (dw) – 32 bits: can store max 232 values 01.10.2024 Microprocessor Architectures 16  The binary, decimal and hexadecimal bases  Any sequence of bits can also be represented as:  a decimal number (number in base 10); i.e. sequence of decimal digits (0, 1, …, 9)  a hexadecimal number (number in base 16); i.e. sequence of hexadecimal digits (0, 1, …, 9, A, B, C, D, E and F)  Hexadecimal numbers representation conventions:  the “h” suffix: 1A44h  the “0x” prefix: 0x1A44 binary decimal  Conversion algorithms hex 01.10.2024 Microprocessor Architectures 17  Numbers representation  Unsigned (positive) integer numbers  “Natural binary” representation  Signed integer numbers  “Sign & magnitude” representation  “1’s complement” representation  “2’s complement” representation  Signed real numbers  “Fixed point” representation  “Floating point” representation 01.10.2024 Microprocessor Architectures 18  Integer numbers representation Decimal Sign and magnitude 1’s complement 2’s complement value 5 natural binary: 00000101 natural binary: 00000101 natural binary: 00000101 natural binary: 00000101 natural binary: 00000101 natural binary: 00000101 -5 flip all bits: 11111010 flip the sign bit: 10000101 flip all bits: 11111010 add 1: 11111011 12 natural binary: 00001100 natural binary: 00001100 natural binary: 00001100 natural binary: 00001100 natural binary: 00001100 natural binary: 00001100 -12 flip all bits: 11110011 flip the sign bit: 10001100 flip all bits: 11110011 add 1: 11110100 01.10.2024 Microprocessor Architectures 19  Real numbers representation  “Fixed point” representation  A fixed sequence of bits is used to represent decimal part  Two’s complement representation  A fixed sequence of bits is used to represent the fractional part  Natural binary representation  “Floating point” representation  A fixed sequence of bits is used to represent the mantissa  Two’s complement representation  A fixed sequence of bits is used to represent the exponent  Two’s complement representation  Example: real number = mantissa × 2exponent 01.10.2024 Microprocessor Architectures 20  Characters representation  Coding conventions:  ASCII  UTF-8  UTF-16  Unicode 01.10.2024 Microprocessor Architectures 21  Programs representation  Instructions are represented using sequences of bytes;  Some processors have fixed-size instructions  8086 has variable-size instructions (1-6 bytes)  The instruction codes  are formed of several fields:  one field representing the instruction type  none, one or several fields representing data  none, one or several fields representing addresses  are associated with mnemonics (to be used in programming)  Example: add AX, 8017h 051780h 01.10.2024 Microprocessor Architectures 22