MCQ_CO1_4.docx

**[MODULE 1 and 2]** CMOS technology is used in developing\ a) microprocessors\ b) microcontrollers\ c) digital logic circuits\ d) all of the mentioned N-well is formed by a\) Decomposition b\) Diffusion c\) Dispersion d\) Filtering CMOS has\ a) high noise margin\ b) high packing density\ c)...

**[MODULE 1 and 2]** CMOS technology is used in developing\ a) microprocessors\ b) microcontrollers\ c) digital logic circuits\ d) all of the mentioned N-well is formed by a\) Decomposition b\) Diffusion c\) Dispersion d\) Filtering CMOS has\ a) high noise margin\ b) high packing density\ c) high power dissipation\ d) high complexity For a MOSFET Vgs= 2V, Vtn =1v,Id=1mA, λ =0.01v-1, then its intrinsic gain is a\) 200 b\) 100 c\) 50 d\) 500 In CMOS fabrication, nMOS and pMOS are integrated in same substrate.\ a) true\ b) false Inverters are essential for a\) NAND gate b\) NOR gate c\) Sequential circuits d\) All of the mentioned P-well is created on\ a) p subtrate\ b) n substrate\ c) p & n substrate\ d) none of the mentioned Large scale integration has a\) ten logic gates b\) fifty logic gates c\) hundred logic gates d\) thousands logic gates In basic inverter circuit, \_\_\_\_\_\_ is connected to ground\ a) source\ b) gates\ c) drain d\) resistance In inverter circuit, \_\_\_\_\_\_\_\_ transistors is used as load\ a) enhancement mode\ b) depletion mode\ c) all of the mentioned\ d) none of the mentioned The design flow of VLSI system is 1.architecture design 2. market requirement 3. logic design 4. HDL coding a\) 2-1-3-4 b\) 4-1-3-2 c\) 3-2-1-4 d\) 1-2-3-4 In nMOS inverter configuration depletion mode device is called as\ a) pull up\ b) pull down\ c) all of the mentioned\ d) none of the mentioned Photoresist layer is formed using\ a) high sensitive polymer\ b) light sensitive polymer\ c) polysilicon\ d) silicon di oxide In DIBL, which among the following is/are regarded as the source/s of leakage? a\) Subthreshold conduction b\) Gate leakage c\) Junction leakage d\) All of the above In CMOS fabrication, the photoresist layer is exposed to\ a) visible light\ b) ultraviolet light\ c) infra red light\ d) fluorescent P-well doping concentration and depth will affect the\ a) threshold voltage\ b) Vss\ c) Vdd\ d) Vgs Which type of CMOS circuits are good and better?\ a) p well\ b) n well\ c) all of the mentioned\ d) none of the mentioned N-well is formed by\ a) decomposition\ b) diffusion\ c) dispersion\ d) filtering The enhancement MOSFET is a. Normally of MOSFET b. Useful as a very good constant voltage source c. Widely used because of easy in its fabrication d. Normally on MOSFET Mobility depends on\ a) transverse electric field\ b) Vg\ c) Vdd\ d) Channel length For a symmetric CMOS inverter a\) (W/L)~P~ = 1.5(W/L)~N~ b\) (W/L)~P~ = 2.5(W/L)~N~ c\) (W/L)~P~ = 4(W/L)~N~ d\) (W/L)~P~ = 3(W/L)~N~ The \_\_\_\_\_\_ is used to reduce the resistivity of poly silicon:\ a) Photo resist\ b) Etching\ c) Doping impurities\ d) None of the mentioned If n-transistor conducts and has large voltage between source and drain ,then it is said to be in \_\_\_\_\_\_\_\_\_\_ region a\) Linear b\) Saturation c\) Non Saturation d\) Cutoff How is nMOS inverter represented? a\) b) c) d) vlsi-questions-answers-nmos-inverter-q6a  vlsi-questions-answers-nmos-inverter-q6c  A CMOS inverter has \_\_\_\_\_\_\_\_\_\_\_\_ distinct modes of operation a\) Three b\) Four c\) Two d\) Five MOSFET has greatest application in digital circuit due to a\) Low power consumption b\) Less noise c\) Small amount of space it takes on a chip d\) All of the above