Prelude to MARIE - Computer Architecture Lecture

PRELUDE TO MARIE An introduction to a simple computer…  Objectives Chapter four has the following goals Discover the components common to every modern computer system These are system-level components, not how we build a computer from parts! Be capable of explain...

PRELUDE TO MARIE An introduction to a simple computer…  Objectives Chapter four has the following goals Discover the components common to every modern computer system These are system-level components, not how we build a computer from parts! Be capable of explaining how each component contributes to the execution of programs Understand a simple machine architecture created to illuminate these basic concepts, and to put them in context in relation to real-world architectures Understand the concept of the assembler  In Context Chapter 1 presented a general overview of computer systems Chapter 2 discussed how data is stored and manipulated by various computer system components Chapter 3 illustrated the fundamental components of digital circuits, the basis of modern computing With this background, we can now investigate how computer components work, and how they interoperate to create useful computer  Work Plan CPU Basics Buses Clocks Input/Output Subsystem Memory Interrupts  CPU The Central Processing Unit (CPU) fetches, decodes and executes program instructions There are two principal subsystems in a CPU – the datapath, and the control unit Datapath: consists of an Arithmetic-Logic Unit (ALU) and storage units (registers) that are interconnected by a data bus which is also connected to main memory Control Unit (CU): controls the sequencing of operations by decoding instructions and providing control signals to the ALU, and other system components, to perform work  Basic CPU Components A register is a hardware device that stores binary data It differs from main memory, in that it is located directly inside the the CPU so that it can service information storage operations extremely quickly As we saw previously, registers can be implemented using D-type flip-flops; a 32-bit register would need 32 DFFs The ALU carries out logical and arithmetic operations as directed by the CU The CU decodes instructions and determines which actions to carry out – the program counter register tells it where to look, and the status register provides reference results from the ALU on a previous operation THE DATA BUS The CPU shares data with other system components by using the data bus A bus is a set of parallel wires, each of which conveys a single bit of data Two types of buses are commonly found in computer systems: point-to-point and multipoint These are examples of point-to-point bus configurations Multipoint Bus I/O controller  Bus Structure Buses are composed of data lines, control lines, address lines and power lines Data lines transfer information from one device to another as a group of bits (in parallel) Control lines determine the direction of data flow, and which devices can access the bus Address lines determine the location of the source or destination of the data information Power lines provide electrical power for units connected to the bus  Bus Types Different information types and device types connected to buses dictate that there are different types of buses processor-memory buses I/O buses backplane buses Each of these types has a specific usage and purpose Using a single bus to “do everything” is both inefficient and results in an overly complex design We will now examine these bus types and what  Bus Type Details Processor-Memory used to connect the processor to main memory short length, and high-speed Input/Output (I/O) used to connect various input-output devices longer than processor-memory buses, and may not be as high in speed Backplane built into the chassis of the machine, and connects the processor, the I/O devices and the memory This allows all buses to interact if necessary without making all traffic necessarily traverse all buses  Bus Hierarchy Many computers employ multiple buses It is not uncommon to have two or more buses in the same computer High-performance computers often employ all three types of buses  Bus Operation In terms of how they co-ordinate data transfer, buses operate in two basic modes: synchronous and asynchronous Synchronous buses are clocked, and bus operations happen only on clock “ticks” (in the same way that sequential circuits are coordinated by a clock) Asynchronous buses utilize control lines to coordinate bus operations; a complex handshaking protocol must be employed to enforce fair access time to the bus  Master and servant? Devices connected via buses are often divided into two categories: bus master and bus slave Bus masters are those devices that initiate transfer of information Bus slaves are devices that respond to requests by bus masters For multipoint buses, multiple devices are using the same bus To use the bus, a device must reserve it In a very simple system, the processor is the only device permitted to serve as bus master  Arbitration When a system has more than one bus master, concurrent requests by bus masters must be arbitrated (a decision as to who has access must be made) Think of two roommates who both want to use the telephone at the same time Two example arbitration schemes are: Daisy chain: permissions are passed from the highest- priority device to the lowest – no fairness is ensured, as the high-priority devices get “first dibs” Distributed using collision detection: any device can try to use the bus; if the access creates a data collision with another device’s data, a random choice is made to determine which device gets access  Clock Sync All computers contain at least one clock which synchronizes the activities of its components Some computers have more than one, but these are usually synchronized in some fashion A clock cycle is the time between two successive clock pulses (or ticks) cycle The clock frequency is defined as the number of clock cycles per second, and is the reciprocal of the clock cycle An 800MHz clock has a cycle time of 1.25ns  The Clock Instruction processing is often measured in clock cycles Generally, it takes a fixed number of clock cycles to process one instruction However, different instructions have different fixed numbers of clock cycles according to their complexity As a result, the higher the clock frequency, the greater the number of instructions that can be processed in a unit of time (i.e. 1 second) Therefore, clock frequency determines instruction processing speed  Performance Clock frequency should not be confused with CPU performance CPU performance is measured by the time required to run a program, and is calculated thus: To improve CPU throughput (or performance), we should reduce Reduce the number of instructions in a program, reduce the number of cycles per instruction and reduce the number of nanoseconds per clock cycle We will revisit this equation later in the course.  I/O Subsystem A computer communicates with the outside world via its input/output (I/O) subsystem I/O devices connect to the CPU through various interfaces I/O can be memory-mapped, where the I/O device behaves like main memory from the CPU’s perspective instruction-based, where the CPU has a specialized set of instructions of input/output We will study I/O in detail in Chapter 7  Coming Next We’ll review the concepts of memory and its organization We will introduce the concept of interrupts – events that can alter the normal flow of execution of program steps in a computer system The Machine Architecture that is Really Intuitive and Easy, or MARIE This is a machine simulation, written in Java, which is a greatly simplified view of a model computer