Cs2301.pdf

CHAPTER 1 Introduction Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com. Objectives  Know the difference between computer organization and computer architecture....

CHAPTER 1 Introduction Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com. Objectives  Know the difference between computer organization and computer architecture. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Understand units of measure common to computer systems.  Appreciate the evolution of computers.  Understand the computer as a layered system.  Be able to explain the von Neumann architecture and the function of basic computer components. 1.1 Overview (1 of 2)  Why study computer organization and architecture? Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Design better programs, including system software such as compilers, operating systems, and device drivers.  Optimize program behavior.  Evaluate (benchmark) computer system performance.  Understand time, space, and price tradeoffs. 1.1 Overview (2 of 2)  Computer organization Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Encompasses all physical aspects of computer systems (e.g., circuit design, control signals, memory types).  How does a computer work?  Computer architecture  Logical aspects of system implementation as seen by the programmer (e.g., instruction sets, instruction formats, data types, addressing modes).  How do I design a computer? 1.2 Computer Systems (1 of 2) There is no clear distinction between matters related to Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com computer organization and matters relevant to computer architecture. Principle of Equivalence of Hardware and Software:  Any task done by software can also be done using hardware, and any operation performed directly by hardware can be done using software.* * Assuming speed is not a concern. 1.2 Computer Systems (2 of 2) At the most basic level, a computer is a device consisting of Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com three pieces:  A processor to interpret and execute programs  A memory to store both data and programs  A mechanism for transferring data to and from the outside world  Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 1.3 An Example System (1 of 19)  Consider this advertisement: 1.3 An Example System (2 of 19) Measures of capacity and speed: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Kilo- (K) = 1 thousand = 103 and 210  Mega- (M) = 1 million = 106 and 220  Giga- (G) = 1 billion = 109 and 230  Tera- (T) = 1 trillion = 1012 and 240  Peta- (P) = 1 quadrillion = 1015 and 250  Exa- (E) = 1 quintillion = 1018 and 260  Zetta- (Z) = 1 sextillion = 1021 and 270  Yotta- (Y) = 1 septillion = 1024 and 280 Whether a metric refers to a power of ten or a power of two typically depends upon what is being measured. 1.3 An Example System (3 of 19) Hertz = clock cycles per second (frequency) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  1MHz = 1,000,000Hz  Processor speeds are measured in MHz or GHz. Byte = a unit of storage  1KB = 210 = 1024 Bytes  1MB = 220 = 1,048,576 Bytes  1GB = 230 = 1,099,511,627,776 Bytes  Main memory (RAM) is measured in GB.  Disk storage is measured in GB for small systems, TB (240) for large systems. 1.3 An Example System (4 of 19) Measures of time and space: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Milli- (m) = 1 thousandth = 10-3  Micro- ( ) = 1 millionth = 10-6  Nano- (n) = 1 billionth = 10-9  Pico- (p) = 1 trillionth = 10-12  Femto- (f) = 1 quadrillionth = 10-15  Atto- (a) = 1 quintillionth = 10-18  Zepto- (z) = 1 sextillionth = 10-21  Yocto- (y) = 1 septillionth = 10-24 1.3 An Example System (5 of 19) Millisecond = 1 thousandth of a second Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Hard disk drive access times are often 10 to 20 milliseconds. Nanosecond = 1 billionth of a second  Main memory access times are often 50 to 70 nanoseconds. Micron (micrometer) = 1 millionth of a meter  Circuits on computer chips are measured in microns. 1.3 An Example System (6 of 19)  We note that cycle time is the reciprocal of clock frequency. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  A bus operating at 133MHz has a cycle time of 7.52 nanoseconds:  133,000,000 cycles/second = 7.52 ns/cycle Now back to the advertisement... 1.3 An Example System (7 of 19) Compact computer Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  This is a computer with the compact form factor. 1.3 An Example System (8 of 19) Intel i9 16 Core, 4.20GHz Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The microprocessor is the “brain” of the system. It executes program instructions. This one is an Intel i9 running at 4.2GHz. 1.3 An Example System (9 of 19)  Computers with large main memory capacity can run larger programs with greater speed than computers having small memories. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  RAM is an acronym for random access memory. Random access means that memory contents can be accessed directly if you know their location.  Cache is a type of temporary memory that can be accessed faster than RAM. 1.3 An Example System (10 of 19) 3733MHz 32GB DDR4 SDRAM Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  This system has 32GB of (fast) synchronous dynamic RAM (SDRAM) … 128KB L1 cache, 2MB L2 cache  …and two levels of cache memory, the level 1 (L1) cache is smaller and (probably) faster than the level 2 (L2) cache. Note that these cache sizes are measured in KB and MB. 1.3 An Example System (11 of 19) Dual storage (7200RPM SATA 1TB HDD, 128GB SSD) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Disk capacity determines the amount of data and size of programs you can store.  The hard disk drive can store 1TB. 7200 RPM is the rotational speed of the disk. Generally, the faster a disk rotates, the faster it can deliver data to RAM. (There are many other factors involved.) It also has a 128GB solid state drive. 1.3 An Example System (12 of 19) Dual storage (7200RPM SATA 1TB HDD, 128GB SSD) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  SATA stands for serial advanced technology attachment, which describes how the hard disk interfaces with (or connects to) other system components. 16x CD/DVD RW drive  A DVD can store about 4.7GB of data. This drive supports rewritable DVDs, RW, that can be written to many times. 16x describes its speed. 1.3 An Example System (13 of 19) 10 USB ports, 1 serial port, 4 PCI expansion slots (1 PCI, 1 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com PCI x 16, 2 PCI x 1), HDMI  Ports allow movement of data between a system and its external devices.  This system has 10 USB ports, a serial port, and expansion slots. 1.3 An Example System (14 of 19)  Serial ports send data as a series of pulses along one or two data lines. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Parallel ports send data as a single pulse along at least eight data lines.  USB, Universal Serial Bus, is an intelligent serial interface that is self- configuring. (It supports “plug and play.”) 1.3 An Example System (15 of 19) 10 USB ports, 1 serial port, 4 PCI expansion slots (1 PCI, 1 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com PCI x 16, 2 PCI x 1), HDMI  System buses can be augmented by dedicated I/O buses. PCI, peripheral component interface, is one such bus. 1GB PCIe video card PCIe sound card  This system has two PCIe (PCI express) devices: a video card and a sound card. 1.3 An Example System (16 of 19)  Active matrix technology uses one transistor per picture element (pixel). The resolution of a monitor determines the amount of text and graphics Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com that the monitor can display.  24” widescreen LCD monitor, 16:10 aspect ration, 1920 x 1200 WUXGA, 300 cd/ , active matrix, 1000:1 (static), 8ms, 24-bit color (16.7 million colors), VGA/DVI input, 2 USB ports  This monitor has a resolution of 1920 x 1200 pixels.  1GB PCIe video card  The video card contains memory and programs that support the monitor. 1.3 An Example System (17 of 19)  Gigabit ethernet Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  This system can connect to the Internet with speeds of up to 1Gigabit. 1.3 An Example System (18 of 19)  7-in-1 card reader Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The card reader allows transfer from external media and has built-in Bluetooth. 1.3 An Example System (19 of 19)  Throughout the remainder of the book, you will see how these components work and how they interact with software to make complete Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com computer systems.  This statement raises two important questions:  What assurance do we have that computer components will operate as we expect?  What assurance do we have that computer components will operate together? 1.4 Standards Organizations (1 of 4)  There are many organizations that set computer hardware standards— including the interoperability of computer components. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Throughout this book, and in your career, you will encounter many of them.  Some of the most important standards-setting groups include the following. 1.4 Standards Organizations (2 of 4)  The Institute of Electrical and Electronics Engineers (IEEE) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Promotes the interests of the worldwide electrical engineering community  Establishes standards for computer components, data representation, and signaling protocols, among many other things 1.4 Standards Organizations (3 of 4)  The International Telecommunications Union (ITU) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Concerns itself with the interoperability of telecommunications systems, including data communications and telephony  National groups establish standards within their respective countries:  The American National Standards Institute (ANSI)  The British Standards Institution (BSI) 1.4 Standards Organizations (4 of 4)  The International Organization for Standardization (ISO) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Establishes worldwide standards for everything from screw threads to photographic film  Is influential in formulating standards for computer hardware and software, including their methods of manufacture Note: ISO is not an acronym. ISO comes from the Greek, isos, meaning “equal.” 1.5 Historical Development (1 of 10)  To fully appreciate the computers of today, it is helpful to understand how things got the way they are. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The evolution of computing machinery has taken place over several centuries.  In modern times, computer evolution is usually classified into four generations according to the salient technology of the era.  We note that many of the following dates are approximate. 1.5 Historical Development (2 of 10)  Generation Zero: Mechanical Calculating Machines (1642–1945) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Calculating Clock: Wilhelm Schickard (1592–1635)  Pascaline: Blaise Pascal (1623–1662)  Stepped Reckoner: Gottfried von Leibniz (1646–1716)  Difference Engine: Charles Babbage (1791–1871), also designed but never built the Analytical Engine.  Punched card tabulating machines: Herman Hollerith (1860–1929) [Hollerith cards were commonly used for computer input well into the 1970s.] 1.5 Historical Development (3 of 10)  The First Generation: Vacuum Tube Computers (1945–1953) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Z1 (Konrad Zuse)  Electronic Numerical Integrator and Computer (ENIAC) (John Mauchly and J. Presper Eckert) [The ENIAC was the first general-purpose computer.]  ABC (John Atanasoff and Clifford Berry) Credited with designing the first completely electronic computer. 1.5 Historical Development (4 of 10) The First Generation: Vacuum Tube Computers (1945–1953) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The IBM 650 was the first mass-produced computer (1955).  It was phased out in 1969.  Other major computer manufacturers of this period include UNIVAC, Engineering Research Associates (ERA), and Computer Research Corporation (CRC).  UNIVAC and ERA were bought by Remington Rand, the ancestor of the Unisys Corporation.  CRC was bought by the Underwood (typewriter) Corporation, which left the computer business. 1.5 Historical Development (5 of 10)  The Second Generation: Transistorized Computers (1954–1965) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  IBM 7094 (scientific) and 1401 (business)  Digital Equipment Corporation (DEC) PDP-1  Univac 1100  Control Data Corporation 1604 ... and many others.  These systems had few architectural similarities. 1.5 Historical Development (6 of 10)  The Third Generation: Integrated Circuit Computers (1965–1980) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  IBM 360  DEC PDP-8 and PDP-11  Cray-1 supercomputer ... and many others.  By this time, IBM had gained overwhelming dominance in the industry.  Computer manufacturers of this era were characterized as IBM and the BUNCH (Burroughs, Unisys, NCR, Control Data, and Honeywell). 1.5 Historical Development (7 of 10)  The Fourth Generation: VLSI Computers (1980–????) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Very large-scale integrated circuits (VLSI) have more than 10,000 components per chip.  Enabled the creation of microprocessors.  The first was the 4-bit Intel 4004.  Later versions, such as the 8080, 8086, and 8088 spawned the idea of “personal computing.” 1.5 Historical Development (8 of 10)  Moore’s Law (1965) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Gordon Moore, Intel founder  “The density of transistors in an integrated circuit will double every year.”  Contemporary version:  “The density of silicon chips doubles every 18 months.”  But this “law” cannot hold forever... 1.5 Historical Development (9 of 10)  Rock’s Law Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Arthur Rock, Intel financier  “The cost of capital equipment to build semiconductors will double every 4 years.”  In 1968, a new chip plant cost about $12,000.  At the time, $12,000 would buy a nice home in the suburbs.  An executive earning $12,000 per year was “making a very comfortable living.” 1.5 Historical Development (10 of 10) Rock’s Law Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  In 2012, chip plants under construction cost well over $5 billion.  $5 billion is more than the gross domestic product of some small countries, including Barbados, Mauritania, and Rwanda.  For Moore’s Law to hold, Rock’s Law must fall, or vice versa. But no one can say which will give out first.  MtM (More than Moore) technology relies on alternative technologies and explores the use of micro and nanoelectronics. 1.6 The Computer Level Hierarchy (1 of 7)  Computers consist of many things besides chips. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Before a computer can do anything worthwhile, it must also use software.  Writing complex programs requires a “divide and conquer” approach, where each program module solves a smaller problem.  Complex computer systems employ a similar technique through a series of virtual machine layers. 1.6 The Computer Level Hierarchy (2 of 7)  Each virtual machine layer is an abstraction of the level below it. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The machines at each level execute their own particular instructions, calling upon machines at lower levels to perform tasks as required.  Computer circuits ultimately carry out the work. 1.6 The Computer Level Hierarchy (3 of 7)  Level 6: The User Level Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Program execution and user interface level  The level with which we are most familiar  Level 5: High-Level Language Level  The level with which we interact when we write programs in languages such as C, Pascal, Lisp, and Java 1.6 The Computer Level Hierarchy (4 of 7)  Level 4: Assembly Language Level Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Acts upon assembly language produced from Level 5, as well as instructions programmed directly at this level  Level 3: System Software Level  Controls executing processes on the system  Protects system resources  Assembly language instructions often pass through Level 3 without modification. 1.6 The Computer Level Hierarchy (5 of 7)  Level 2: Machine Level Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Also known as the Instruction Set Architecture (ISA) Level  Consists of instructions that are particular to the architecture of the machine  Programs written in machine language need no compilers, interpreters, or assemblers. 1.6 The Computer Level Hierarchy (6 of 7)  Level 1: Control Level Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  A control unit decodes and executes instructions and moves data through the system.  Control units can be microprogrammed or hardwired.  A microprogram is a program written in a low-level language that is implemented by the hardware.  Hardwired control units consist of hardware that directly executes machine instructions. 1.6 The Computer Level Hierarchy (7 of 7)  Level 0: Digital Logic Level Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  This level is where we find digital circuits (the chips).  Digital circuits consist of gates and wires.  These components implement the mathematical logic of all other levels. 1.7 Cloud Computing: Computing as a Service (1 of 5)  The ultimate aim of every computer system is to deliver functionality to its users. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Computer users typically do not care about terabytes of storage and gigahertz of processor speed.  Many companies outsource their data centers to third-party specialists, who agree to provide computing services for a fee.  These arrangements are managed through service-level agreements (SLAs). 1.7 Cloud Computing: Computing as a Service (2 of 5)  Rather than pay a third party to run a company-owned data center, another approach is to buy computing services from someone else’s data Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com center and connect to it via the Internet.  This is the idea behind a collection of service models known as Cloud computing.  The “Cloud” is a visual metaphor traditionally used for the Internet. It is even more apt for service-defined computing. 1.7 Cloud Computing: Computing as a Service (3 of 5)  More Cloud computing models: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Software as a Service, or SaaS. The consumer of this service buys application services.  Well-known examples include Gmail, Dropbox, GoToMeeting, and Netflix.  Platform as a Service, or PaaS. Provides server hardware, operating systems, database services, security components, and backup and recovery services.  Well-known PaaS providers include Google App Engine and Microsoft Windows Azure Cloud Services. 1.7 Cloud Computing: Computing as a Service (4 of 5)  More Cloud computing models: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Infrastructure as a Service (IaaS) provides only server hardware, secure network access to the servers, and backup and recovery services. The customer is responsible for all system software, including the operating system and databases.  Well-known IaaS platforms include Amazon EC2, Google Compute Engine, Microsoft Azure Services Platform, Rackspace, and HP Cloud.  Cloud storage is a limited type of IaaS that includes services such as Dropbox, Google Drive, and Amazon.com’s Cloud Drive. 1.7 Cloud Computing: Computing as a Service (5 of 5)  Cloud computing relies on the concept of elasticity where resources can be added and removed as needed. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  You pay for only what you use.  Virtualization is an enabler of elasticity.  Instead of having a physical machine, you have a “logical” machine that may span several physical machines or occupy only part of a single physical machine.  Potential issues: Privacy, security, having someone else in control of software and hardware you use 1.8 The Fragility of the Internet (1 of 2)  Practically everyone understands that the Internet is crucial to global commerce. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  What is less clear is the importance of the Internet to the health and safety of the modern world.  SCADA (supervisory control and data acquisition) systems operate vital portions of our physical infrastructure including:  Power generation  Transportation networks  Sewage systems  Oil and gas pipelines 1.8 The Fragility of the Internet (2 of 2)  Reliance on the Internet as a physical infrastructure is only going to increase with the Internet of Things (IoT) or Machine-to-Machine (M2M) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com communication.  In 2021, there were an estimated 77 billion IoT devices installed around the world; by 2030, this figure could reach 125 billion.  Can the Internet deal with this traffic? Congestive collapse is a concern.  Congestive collapse: Routers become overwhelmed, and reroute packets to other routers, which then become overwhelmed in a cascading fashion.  The ultimate fix is to make the Internet “smarter,” but this won’t happen quickly. Until then, we worry. 1.9 The von Neumann Model (1 of 8)  On the ENIAC, all programming was done at the digital logic level. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Programming the computer involved moving plugs and wires.  A different hardware configuration was needed to solve every unique problem type.  Configuring the ENIAC to solve a “simple” problem required many days of labor by skilled technicians. 1.9 The von Neumann Model (2 of 8)  Inventors of the ENIAC, John Mauchley and J. Presper Eckert, conceived of a computer that could store instructions in memory. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The invention of this idea has since been ascribed to a mathematician, John von Neumann, who was a contemporary of Mauchley and Eckert.  Stored-program computers have become known as von Neumann Architecture systems. 1.9 The von Neumann Model (3 of 8)  Today’s stored-program computers have the following characteristics: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Three hardware systems:  A central processing unit (CPU)  A main memory system  An I/O system  The capacity to carry out sequential instruction processing  A single data path between the CPU and main memory  This single path is known as the von Neumann bottleneck. 1.9 The von Neumann Model (4 of 8)  This is a general depiction of a von Neumann system: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  These computers employ a fetch-decode-execute cycle to run programs as follows... 1.9 The von Neumann Model (5 of 8)  The control unit fetches the next instruction from memory using the program counter to determine where the instruction is located. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 1.9 The von Neumann Model (6 of 8)  The instruction is decoded into a language that the ALU can understand. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 1.9 The von Neumann Model (7 of 8)  Any data operands required to execute the instruction are fetched from memory and placed into registers within the CPU. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 1.9 The von Neumann Model (8 of 8)  The ALU executes the instruction and places results in registers or memory. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 1.10 Non–von Neumann Models (1 of 2)  Conventional stored-program computers have undergone many incremental improvements over the years. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  These improvements include adding specialized buses, floating-point units, and cache memories, to name only a few.  But enormous improvements in computational power require departure from the classic von Neumann architecture.  Adding processors is one approach. 1.10 Non–von Neumann Models (2 of 2)  Some of today’s systems have separate buses for data and instructions. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Called a Harvard architecture  Other non-von Neumann systems provide special-purpose processors to offload work from the main CPU.  More radical departures include dataflow computing, quantum computing, cellular automata, and parallel computing.  IBM, Microsoft, Google, Cray, and HP (just to name a few) have designed non-von Neumann architectures. 1.11 Parallel Computing (1 of 3)  In the late 1960s, high-performance computer systems were equipped with dual processors to increase computational throughput. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  In the 1970s, supercomputer systems were introduced with 32 processors.  Supercomputers with 1,000 processors were built in the 1980s.  In 1999, IBM announced its Blue Gene system, containing over 1 million processors. 1.11 Parallel Computing (2 of 3)  Parallel processing allows a computer to simultaneously work on subparts of a problem. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Multicore processors have two or more processor cores sharing a single die.  Each core has its own ALU and set of registers, but all processors share memory and other resources.  “Dual core” differs from “dual processor.”  Dual-processor machines, for example, have two processors, but each processor plugs into the motherboard separately. 1.11 Parallel Computing (3 of 3)  Multicore systems provide the ability to multitask (e.g., browse the Web while burning a CD). Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Multithreaded applications spread mini-processes, threads, across one or more processors for increased throughput.  New programming languages are necessary to fully exploit multiprocessor power. Conclusion  This chapter has given you an overview of the subject of computer architecture. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  You should now be sufficiently familiar with general system structure to guide your studies throughout the remainder of this course.  Subsequent chapters will explore many of these topics in greater detail. CHAPTER 2 Data Representation in Computer Systems Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com. Objectives (1 of 2)  Understand the fundamentals of numerical data representation and Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com manipulation in digital computers.  Master the skill of converting between various radix systems.  Understand how errors can occur in computations because of overflow and truncation. Objectives (2 of 2)  Understand the fundamental concepts of floating-point Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com representation.  Gain familiarity with the most popular character codes.  Understand the concepts of error detecting and correcting codes. 2.1 Introduction (1 of 2)  A bit is the most basic unit of information in a computer. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  It is a state of “on” or “off” in a digital circuit.  Sometimes these states are “high” or “low” voltage instead of “on” or “off.”  A byte is a group of eight bits.  A byte is the smallest possible addressable unit of computer storage.  The term “addressable” means that a particular byte can be retrieved according to its location in memory. 2.1 Introduction (2 of 2)  A word is a contiguous group of bytes. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Words can be any number of bits or bytes.  Word sizes of 16, 32, or 64 bits are most common.  In a word-addressable system, a word is the smallest addressable unit of storage.  A group of four bits is called a nibble.  Bytes, therefore, consist of two nibbles: a “high-order” nibble, and a “low-order” nibble. 2.2 Positional Numbering Systems (1 of 3)  Bytes store numbers using the position of each bit to represent a Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com power of 2.  The binary system is also called the base-2 system.  Our decimal system is the base-10 system. It uses powers of 10 for each position in a number.  Any integer quantity can be represented exactly using any base (or radix). 2.2 Positional Numbering Systems (2 of 3)  The decimal number 947 in powers of 10 is: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The decimal number 5836.47 in powers of 10 is: 2.2 Positional Numbering Systems (3 of 3)  The binary number 11001 in powers of 2 is: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  When the radix of a number is something other than 10, the base is denoted by a subscript.  Sometimes, the subscript 10 is added for emphasis: 2.3 Converting Between Bases (1 of 19)  Because binary numbers are the basis for all data representation in Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com digital computer systems, it is important that you become proficient with this radix system.  Your knowledge of the binary numbering system will enable you to understand the operation of all computer components as well as the design of instruction set architectures. 2.3 Converting Between Bases (2 of 19)  In an earlier slide, we said that every integer value can be Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com represented exactly using any radix system.  There are two methods for radix conversion: the subtraction method and the division remainder method.  The subtraction method is more intuitive, but cumbersome. It does, however, reinforce the ideas behind radix mathematics. 2.3 Converting Between Bases (3 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Suppose we want to convert the decimal number to base 8.  The largest power of 8 that we need is , and 512 1 = 512.  Write down the 1 and subtract 512 from 538, giving 26. 2.3 Converting Between Bases (4 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Converting 538 to base 8  The next power of 8 is. However, that is too large, so we write down 0.  The next power of 8, , goes into our remainder three times, so we write down 3 and subtract. This leaves us 2. 2.3 Converting Between Bases (5 of 19)  Converting 538 to base 8 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  , so we use. This is our last choice, and it gives us a difference of zero.  Our result, reading from top to bottom is: 2.3 Converting Between Bases (6 of 19)  Another method of converting integers from decimal to some other Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com radix uses division.  This method is mechanical and easy.  It employs the idea that successive division by a base is equivalent to successive subtraction by powers of the base.  Let’s use the division remainder method to again convert 190 in decimal to base 3. 2.3 Converting Between Bases (7 of 19)  Converting 538 to base 8 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  First, we take the number that we wish to convert and divide it by the radix in which we want to express our result.  In this case, 8 divides 538 67 times, with a remainder of 2.  Record the quotient and the remainder. 2.3 Converting Between 2.3 Converting Between Bases (8 of 19) Bases (8 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Converting 538 to base 8  First divide 538 by 8, which gives us 67 with a remainder of 2.  Then divide 67 by 8, which gives us 8 with a remainder of 3. 2.3 Converting Between Bases (9 of 19)  Converting 538 to base 8 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Continue in this way until the quotient is zero.  In the final calculation, we note that 8 divides 1 zero times with a remainder of 1.  Our result, reading from bottom to top is: 2.3 Converting Between Bases (10 of 19)  Fractional values can be approximated in all base systems. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Unlike integer values, fractions do not necessarily have exact representations under all radices.  The quantity ½ is exactly representable in the binary and decimal systems but is not in the ternary (base 3) numbering system. 2.3 Converting Between Bases (11 of 19)  Fractional decimal values have nonzero digits to Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com the right of the decimal point.  Fractional values of other radix systems have nonzero digits to the right of the radix point.  Numerals to the right of a radix point represent negative powers of the radix: 2.3 Converting Between Bases (12 of 19)  As with whole-number conversions, you can use either of two Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com methods: a subtraction method or an easy multiplication method.  The subtraction method for fractions is identical to the subtraction method for whole numbers. Instead of subtracting positive powers of the target radix, we subtract negative powers of the radix.  We always start with the largest value first, , where n is our radix, and work our way along using larger negative exponents. 2.3 Converting Between Bases (13 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The calculation to the right is an example of using the subtraction method to convert the decimal 0.8125 to binary.  Our result, reading from top to bottom, is:  Of course, this method works with any base, not just binary. 2.3 Converting Between Bases (14 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Using the multiplication method to convert the decimal 0.8125 to binary, we multiply by the radix 2.  The first product carries into the unit’s place. 2.3 Converting Between Bases (15 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Converting 0.8125 to binary  Ignoring the value in the unit’s place at each step, continue multiplying each fractional part by the radix. 2.3 Converting Between Bases (16 of 19) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Converting 0.8125 to binary  You are finished when the product is zero, or until you have reached the desired number of binary places.  Our result, reading from top to bottom is:  This method also works with any base. Just use the target radix as the multiplier. 2.3 Converting Between Bases (17 of 19)  The binary numbering system is the most important radix system Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com for digital computers.  However, it is difficult to read long strings of binary numbers—and even a modestly sized decimal number becomes a very long binary number.  For example:  For compactness and ease of reading, binary values are usually expressed using the hexadecimal, or base-16, numbering system. 2.3 Converting Between Bases (18 of 19)  The hexadecimal numbering system uses the numerals 0 through 9 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com and the letters A through F.  The decimal number 12 is.  The decimal number 26 is.  It is easy to convert between base 16 and base 2, because.  Thus, to convert from binary to hexadecimal, all we need to do is group the binary digits into groups of four.  A group of four binary digits is called a hextet. 2.3 Converting Between Bases (19 of 19)  Using groups of hextets, the binary number Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com (= ) in hexadecimal is: If the number of bits is not a multiple of 4, pad on the left with zeros.  Octal (base 8) values are derived from binary by using groups of three bits (8 = ): Octal was very useful when computers used six-bit words. 2.4 Signed Integer Representation (1 of 35)  The conversions we have so far presented have involved only Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com unsigned numbers.  To represent signed integers, computer systems allocate the high- order bit to indicate the sign of a number.  The high-order bit is the leftmost bit. It is also called the most significant bit.  0 is used to indicate a positive number; 1 indicates a negative number.  The remaining bits contain the value of the number (but this can be interpreted different ways). 2.4 Signed Integer Representation (2 of 35)  There are three ways in which signed binary integers may be Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com expressed:  Signed magnitude  One’s complement  Two’s complement  In an 8-bit word, signed magnitude representation places the absolute value of the number in the 7 bits to the right of the sign bit. 2.4 Signed Integer Representation (3 of 35)  For example, in 8-bit signed magnitude representation: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  +3 is: 00000011  is: 10000011  Computers perform arithmetic operations on signed magnitude numbers in much the same way as humans carry out pencil and paper arithmetic.  Humans often ignore the signs of the operands while performing a calculation, applying the appropriate sign after the calculation is complete. 2.4 Signed Integer Representation (4 of 35)  Binary addition is as easy as it gets. You need to know only four Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com rules: 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10  The simplicity of this system makes it possible for digital circuits to carry out arithmetic operations.  We will describe these circuits in Chapter 3. Let’s see how the addition rules work with signed magnitude numbers... 2.4 Signed Integer Representation (5 of 35) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Example:  Using signed magnitude binary arithmetic, find the sum of 75 and 46.  First, convert 75 and 46 to binary, and arrange as a sum, but separate the (positive) sign bits from the magnitude bits. 2.4 Signed Integer Representation (6 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Using signed magnitude binary arithmetic, find the sum of 75 and 46.  Just as in decimal arithmetic, we find the sum starting with the rightmost bit and work left. 2.4 Signed Integer Representation (7 of 35) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Example:  Using signed magnitude binary arithmetic, find the sum of 75 and 46.  In the second bit, we have a carry, so we note it above the third bit. 2.4 Signed Integer Representation (8 of 35) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Example:  Using signed magnitude binary arithmetic, find the sum of 75 and 46.  The third and fourth bits also give us carries. 2.4 Signed Integer Representation (9 of 35) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Example:  Using signed magnitude binary arithmetic, find the sum of 75 and 46.  Once we have In this example, we were worked our way careful to pick two values through all eight bits, whose sum would fit into seven we are done. bits. If that is not the case, we have a problem. 2.4 Signed Integer Representation (10 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Using signed magnitude binary arithmetic, find the sum of 107 and 46.  We see that the carry from the seventh-bit overflows and is discarded, giving us the erroneous result: 107 + 46 = 25. 2.4 Signed Integer Representation (11 of 35)  The signs in signed magnitude representation Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com work just like the signs in pencil and paper arithmetic.  Example: Using signed magnitude binary arithmetic, find the sum of and.  Because the signs are the same, all we do is add the numbers and supply the negative sign when we are done. 2.4 Signed Integer Representation (12 of 35)  Mixed sign addition (or subtraction) is done the Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com same way.  Example: Using signed magnitude binary arithmetic, find the sum of 46 and.  The sign of the result gets the sign of the number that is larger.  Note the “borrows” from the second and sixth bits. 2.4 Signed Integer Representation (13 of 35)  Signed magnitude representation is easy for people to understand, Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com but it requires complicated computer hardware.  Another disadvantage of signed magnitude is that it allows two different representations for zero: positive zero and negative zero.  For these reasons (among others), computer systems employ complement systems for numeric value representation. 2.4 Signed Integer Representation (14 of 35)  In complement systems, negative values are represented by some Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com difference between a number and its base.  The diminished radix complement of a non-zero number N in base r with d digits is  In the binary system, this gives us one’s complement. It amounts to little more than flipping the bits of a binary number. 2.4 Signed Integer Representation (15 of 35)  For example, using 8-bit one’s complement representation: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  +3 is: 00000011  is: 11111100  In one’s complement representation, as with signed magnitude, negative values are indicated by a 1 in the high-order bit.  Complement systems are useful because they eliminate the need for subtraction. The difference between two values is found by adding the minuend to the complement of the subtrahend. 2.4 Signed Integer Representation (16 of 35)  With one’s complement Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com addition, the carry bit is “carried around” and added to the sum.  Example: Using one’s complement binary arithmetic, find the sum of 48 and.  We note that 19 in binary is 00010011,  so in one’s complement is: 11101100. 2.4 Signed Integer Representation (17 of 35)  Although the “end carry around” adds some complexity, one’s Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com complement is simpler to implement than signed magnitude.  But it still has the disadvantage of having two different representations for zero: positive zero and negative zero.  Two’s complement solves this problem.  Two’s complement is the radix complement of the binary numbering system; the radix complement of a non-zero number N in base r with d digits is. 2.4 Signed Integer Representation (18 of 35)  To express a value in two’s complement representation: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  If the number is positive, just convert it to binary and you’re done.  If the number is negative, find the one’s complement of the number and then add 1.  Example:  In 8-bit binary, 3 is: 00000011  using one’s complement representation is: 11111100  Adding 1 gives us in two’s complement form: 11111101. 2.4 Signed Integer Representation (19 of 35)  With two’s complement arithmetic, Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com all we do is add our two binary numbers. Just discard any carries emitting from the high-order bit.  Example: Using one’s complement binary arithmetic, find the sum of 48 and.  We note that 19 in binary is: 00010011,  so using one’s complement is: 11101100,  and using two’s complement is: 11101101. 2.4 Signed Integer Representation (20 of 35)  Excess-M representation (also called offset binary representation) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com is another way for unsigned binary values to represent signed integers.  Excess-M representation is intuitive because the binary string with all 0s represents the smallest number, whereas the binary string with all 1s represents the largest value.  An unsigned binary integer M (called the bias) represents the value 0, whereas all zeroes in the bit pattern represent the integer 2M.  The integer is interpreted as positive or negative depending on where it falls in the range. 2.4 Signed Integer Representation (21 of 35)  If n bits are used for the binary representation, we select the bias in Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com such a manner that we split the range equally.  Typically, we choose a bias of.  For example, if we were using 4-bit representation, the bias should be.  Just as with signed magnitude, one’s complement, and two’s complement, there is a specific range of values that can be expressed in n bits. 2.4 Signed Integer Representation (22 of 35)  The unsigned binary value for a signed integer using excess-M Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com representation is determined simply by adding M to that integer.  For example, assuming that we are using excess-7 representation, the integer is represented as.  The integer is represented as.  The integer 7 is represented as.  To find the decimal value of the excess-7 binary number subtract 7: = and ; thus , in excess-7 is +.  Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 2.4 Signed Integer Representation (23 of 35)  Let’s compare our representations: 2.4 Signed Integer Representation (24 of 35)  When we use any finite number of bits to represent a number, we Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com always run the risk of the result of our calculations becoming too large or too small to be stored in the computer.  While we can’t always prevent overflow, we can always detect overflow.  In complement arithmetic, an overflow condition is easy to detect. 2.4 Signed Integer Representation (25 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Using two’s complement binary arithmetic, find the sum of 107 and 46.  We see that the nonzero carry from the seventh bit overflows into the sign bit, giving us the erroneous result: 107 + 46 =.  But overflow into the sign bit does not always mean that we have an error. 2.4 Signed Integer Representation (26 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Using two’s complement binary arithmetic, find the sum of 23 and.  We see that there is carry into the sign bit and carry out. The final result is correct:. Rule for detecting signed two’s complement overflow: When the “carry in” and the “carry out” of the sign bit differ, overflow has occurred. If the carry into the sign bit equals the carry out of the sign bit, no overflow has occurred. 2.4 Signed Integer Representation (27 of 35)  Signed and unsigned numbers are both useful. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  For example, memory addresses are always unsigned.  Using the same number of bits, unsigned integers can express twice as many “positive” values as signed numbers.  Trouble arises if an unsigned value “wraps around.”  In four bits: 1111 + 1 = 0000.  Good programmers stay alert for this kind of problem. 2.4 Signed Integer Representation (28 of 35)  Research into finding better arithmetic algorithms has continued for Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com over 50 years.  One of the many interesting products of this work is Booth’s algorithm.  In most cases, Booth’s algorithm carries out multiplication faster and more accurately than pencil-and-paper methods.  The general idea is to replace arithmetic operations with bit shifting to the extent possible. 2.4 Signed Integer Representation (29 of 35)  In Booth’s algorithm: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  If the current multiplier bit is 1 and the preceding bit was 0, subtract the multiplicand from the product.  If the current multiplier bit is 0 and the preceding bit was 1, we add the multiplicand to the product.  If we have a 00 or 11 pair, we simply shift.  Assume a mythical “0” starting bit.  Shift after each step. We see that 3  6 = 18! 2.4 Signed Integer Representation (30 of 35) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Here is a larger example. Ignore all bits over 2n. 53  126 = 6678! 2.4 Signed Integer Representation (31 of 35)  Overflow and carry are tricky ideas. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Signed number overflow means nothing in the context of unsigned numbers, which set a carry flag instead of an overflow flag.  If a carry out of the leftmost bit occurs with an unsigned number, overflow has occurred.  Carry and overflow occur independently of each other. The table on the next slide summarizes these ideas.  Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com 2.4 Signed Integer Representation (32 of 35) 2.4 Signed Integer Representation (33 of 35)  We can do binary multiplication and division by 2 very easily using Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com an arithmetic shift operation.  A left arithmetic shift inserts a 0 in for the rightmost bit and shifts everything else left one bit; in effect, it multiplies by 2.  A right arithmetic shift shifts everything one bit to the right but copies the sign bit; it divides by 2.  Let’s look at some examples. 2.4 Signed Integer Representation (34 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Multiply the value 11 (expressed using 8-bit signed two’s complement representation) by 2.  We start with the binary value for 11: 00001011 (+11)  We shift left one place, resulting in: 00010110 (+22)  The sign bit has not changed, so the value is valid. To multiply 11 by 4, we simply perform a left shift twice. 2.4 Signed Integer Representation (35 of 35)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Divide the value 12 (expressed using 8-bit signed two’s complement representation) by 2.  We start with the binary value for 12: 00001100 (+12)  We shift left one place, resulting in: 00000110 (+6) (Remember, we carry the sign bit to the left as we shift.) To divide 12 by 4, we right shift twice. 2.5 Floating-Point Representation (1 of 33)  The signed magnitude, one’s complement, and two’s complement Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com representations that we have just presented deal with signed integer values only.  Without modification, these formats are not useful in scientific or business applications that deal with real number values.  Floating-point representation solves this problem. 2.5 Floating-Point Representation (2 of 33)  If we are clever programmers, we can perform floating-point Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com calculations using any integer format.  This is called floating-point emulation because floating-point values aren’t stored as such; we just create programs that make it seem as if floating-point values are being used.  Most of today’s computers are equipped with specialized hardware that performs floating-point arithmetic with no special programming required. 2.5 Floating-Point Representation (3 of 33)  Floating-point numbers allow an arbitrary number of decimal places Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com to the right of the decimal point.  For example: 0.5  0.25 = 0.125  They are often expressed in scientific notation.  For example:   2.5 Floating-Point Representation (4 of 33)  Computers use a form of scientific notation for floating-point Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com representation.  Numbers written in scientific notation have three components: 2.5 Floating-Point Representation (5 of 33)  Computer representation of a floating-point Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com number consists of three fixed-size fields:  This is the standard arrangement of these fields. Note: Although “significand” and “mantissa” do not technically mean the same thing, many people use these terms interchangeably. We use the term “significand” to refer to the fractional part of a floating-point number. 2.5 Floating-Point Representation (6 of 33)  The one-bit sign field is the sign of the stored Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com value.  The size of the exponent field determines the range of values that can be represented.  The size of the significand determines the precision of the representation. 2.5 Floating-Point Representation (7 of 33)  We introduce a hypothetical “Simple Model” to Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com explain the concepts.  In this model:  A floating-point number is 14 bits in length.  The exponent field is 5 bits.  The significand field is 8 bits. 2.5 Floating-Point Representation (8 of 33)  The significand is always preceded by an implied Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com binary point.  Thus, the significand always contains a fractional binary value.  The exponent indicates the power of 2 by which the significand is multiplied. 2.5 Floating-Point Representation (9 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Express in the simplified 14-bit floating-point model.  We know that 32 is. So, in (binary) scientific notation 32 = 1.0 x = 0.1 x.  In a moment, we’ll explain why we prefer the second notation versus the first.  Using this information, we put 110 (= ) in the exponent field and 1 in the significand as shown. 2.5 Floating-Point Representation (10 of 33) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The illustrations shown on the right are all equivalent representations for 32 using our simplified model.  Not only do these synonymous representations waste space, but they can also cause confusion. 2.5 Floating-Point Representation (11 of 33) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Another problem with our system is that we have made no allowances for negative exponents. We have no way to express 0.5 (= )! (Notice that there is no sign in the exponent field.) All of these problems can be fixed with no changes to our basic model. 2.5 Floating-Point Representation (12 of 33)  To resolve the problem of synonymous forms, we establish a rule Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com that the first digit of the significand must be 1, with no ones to the left of the radix point.  This process, called normalization, results in a unique pattern for each floating-point number.  In our simple model, all significands must have the form 0.1xxxxxxxx  For example,. The last expression is correctly normalized. In our simple instructional model, we use no implied bits. 2.5 Floating-Point Representation (13 of 33)  To provide for negative exponents, we will use a biased exponent. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  In our case, we have a 5-bit exponent.   Thus, we will use 15 for our bias: Our exponent will use excess-15 representation.  In our model, exponent values less than 15 are negative, representing fractional numbers. 2.5 Floating-Point Representation (14 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Express in the revised 14-bit floating-point model.  We know that 32 = 1.0 x = 0.1 x.  To use our excess-15 biased exponent, we add 15 to 6, giving ( ).  So, we have: 2.5 Floating-Point Representation (15 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Express in the revised 14-bit floating-point model.  We know that 0.0625 is. So, in (binary) scientific notation 0.0625 = 1.0 x = 0.1 x.  To use our excess-15 biased exponent, we add 15 to , giving (= ). 2.5 Floating-Point Representation (16 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Express in the revised 14-bit floating-point model.  We find. Normalizing, we have: x.  To use our excess-15 biased exponent, we add 15 to 5, giving (= ). We also need a 1 in the sign bit. 2.5 Floating-Point Representation (17 of 33)  The IEEE has established a standard for floating-point numbers. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The IEEE-754 single-precision floating-point standard uses an 8-bit exponent (with a bias of 127) and a 23-bit significand.  The IEEE-754 double-precision standard uses an 11-bit exponent (with a bias of 1023) and a 52-bit significand. 2.5 Floating-Point Representation (18 of 33)  In both the IEEE single-precision and double-precision floating- Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com point standard, the significand has an implied 1 to the LEFT of the radix point.  The format for a significand using the IEEE format is: 1.xxx…  For example, 4.5 =.1001 x in IEEE format is: 4.5 = 1.001 x. The 1 is implied, which means it does not need to be listed in the significand (the significand would include only 001). 2.5 Floating-Point Representation (19 of 33)  Example: Express as a floating-point number using IEEE Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com single precision.  First, let’s normalize according to IEEE rules:   The bias is 127, so we add 127 + 1 = 128 (this is our exponent)  The first 1 in the significand is implied, so we have:  Since we have an implied 1 in the significand, this equates to 2.5 Floating-Point Representation (20 of 33)  Using the IEEE-754 single-precision floating-point standard: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  An exponent of 255 indicates a special value.  If the significand is zero, the value is infinity.  If the significand is nonzero, the value is NaN, “not a number,” often used to flag an error condition.  Using the double-precision standard:  The “special” exponent value for a double-precision number is 2047, instead of the 255 used by the single-precision standard. 2.5 Floating-Point Representation (21 of 33)  Both the 14-bit model that we have presented and the IEEE-754 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com floating-point standard allow two representations for zero.  Zero is indicated by all zeros in the exponent and the significand, but the sign bit can be either 0 or 1.  This is why programmers should avoid testing a floating-point value for equality to zero.  Negative zero does not equal positive zero. 2.5 Floating-Point Representation (22 of 33)  Floating-point addition and subtraction are done using methods Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com analogous to how we perform calculations using pencil and paper.  The first thing that we do is express both operands in the same exponential power, then add the numbers, preserving the exponent in the sum.  If the exponent requires adjustment, we do so at the end of the calculation. 2.5 Floating-Point Representation (23 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Find the sum of and using the 14-bit “simple” floating-point model.  We find = 0.1100 x. And = 0.101 x = 0.000101 x.  Thus, our sum is 0.110101 x. 2.5 Floating-Point Representation (24 of 33)  Example: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Find the product of and using the 14-bit floating-point model.  We find = 0.1100 x. And = 0.101 x.  Thus, our product is 0.0111100 x = 0.1111 x.  The normalized product requires an exponent of. 2.5 Floating-Point Representation (25 of 33)  No matter how many bits we use in a floating-point representation, Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com our model must be finite.  The real number system is, of course, infinite, so our models can give nothing more than an approximation of a real value.  At some point, every model breaks down, introducing errors into our calculations.  By using a greater number of bits in our model, we can reduce these errors, but we can never totally eliminate them. 2.5 Floating-Point Representation (26 of 32)  Our job becomes one of reducing error, or at least being aware of Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com the possible magnitude of error in our calculations.  We must also be aware that errors can compound through repetitive arithmetic operations.  For example, our 14-bit model cannot exactly represent the decimal value 128.5. In binary, it is 9 bits wide:  2.5 Floating-Point Representation (27 of 32)  When we try to express in our 14-bit model, we lose the Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com low-order bit, giving a relative error of:  If we had a procedure that repetitively added 0.5 to 128.5, we would have an error of nearly 2% after only four iterations. 2.5 Floating-Point Representation (28 of 32)  Floating-point errors can be reduced when we use operands that Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com are similar in magnitude.  If we were repetitively adding 0.5 to 128.5, it would have been better to iteratively add 0.5 to itself and then add 128.5 to this sum.  In this example, the error was caused by loss of the low-order bit.  Loss of the high-order bit is more problematic. 2.5 Floating-Point Representation (29 of 32)  Floating-point overflow and underflow can cause Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com programs to crash.  Overflow occurs when there is no room to store the high-order bits resulting from a calculation.  Underflow occurs when a value is too small to store, possibly resulting in division by zero. Experienced programmers know that it’s better for a program to crash than to have it produce incorrect, but plausible, results. 2.5 Floating-Point Representation (30 of 32)  When discussing floating-point numbers, it is important to Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com understand the terms range, precision, and accuracy.  The range of a numeric integer format is the difference between the largest and smallest values that can be expressed.  Accuracy refers to how closely a numeric representation approximates a true value.  The precision of a number indicates how much information we have about a value. 2.5 Floating-Point Representation (31 of 32)  Most of the time, greater precision leads to better accuracy, but this Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com is not always true.  For example: 3.1333 is a value of pi that is accurate to two digits but has 5 digits of precision.  There are other problems with floating-point numbers.  Because of truncated bits, you cannot always assume that a particular floating-point operation is commutative or distributive. 2.5 Floating-Point Representation (32 of 32)  This means that we cannot assume: Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  or   Moreover, to test a floating-point value for equality to some other number, it is best to declare a “nearness to x” epsilon value. For example, instead of checking to see if floating point x is equal to 2 as follows:  if x = 2 then …  it is better to use:  if then...  (assuming we have epsilon defined correctly!) 2.6 Character Codes (1 of 6)  Calculations aren’t useful until their results can be displayed in a Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com manner that is meaningful to people.  We also need to store the results of calculations and provide a means for data input.  Thus, human-understandable characters must be converted to computer-understandable bit patterns using some sort of character encoding scheme. 2.6 Character Codes (2 of 6)  As computers have evolved, character codes have evolved. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Larger computer memories and storage devices permit richer character codes.  The earliest computer coding systems used six bits.  Binary-coded decimal (BCD) was one of these early codes. It was used by IBM mainframes in the 1950s and 1960s. 2.6 Character Codes (3 of 6)  In 1964, BCD was extended to an 8-bit code, Extended Binary- Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com Coded Decimal Interchange Code (EBCDIC).  EBCDIC was one of the first widely used computer codes that supported upper- and lowercase alphabetic characters, in addition to special characters, such as punctuation and control characters.  EBCDIC and BCD are still in use by IBM mainframes today. 2.6 Character Codes (4 of 6)  Other computer manufacturers chose the 7-bit ASCII (American Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com Standard Code for Information Interchange) as a replacement for 6-bit codes.  While BCD and EBCDIC were based upon punched card codes, ASCII was based upon telecommunications (Telex) codes.  Until recently, ASCII was the dominant character code outside the IBM mainframe world. 2.6 Character Codes (5 of 6)  Many of today’s systems embrace Unicode, a 16-bit system that Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com can encode the characters of every language in the world.  The Java programming language, and some operating systems, now use Unicode as their default character code.  The Unicode codespace is divided into six parts. The first part is for Western alphabet codes, including English, Greek, and Russian. 2.6 Character Codes (6 of 6)  The Unicode Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com codespace allocation is shown on the right.  The lowest-numbered Unicode characters comprise the ASCII code.  The highest provide for user-defined codes. 2.7 Error Detection and Correction (1 of 25)  It is physically impossible for any data recording or transmission Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com medium to be 100% perfect, 100% of the time, over its entire expected useful life.  As more bits are packed onto a square centimeter of disk storage, as communications transmission speeds increase, the likelihood of error increases— sometimes geometrically.  Thus, error detection and correction are critical to accurate data transmission, storage, and retrieval. 2.7 Error Detection and Correction (2 of 25)  Check digits, appended to the end of a long number, can provide Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com some protection against data input errors.  The last characters of UPC barcodes and ISBNs are check digits.  Longer data streams require more economical and sophisticated error detection mechanisms.  Cyclic redundancy checking (CRC) codes provide error detection for large blocks of data. 2.7 Error Detection and Correction (3 of 25)  Checksums and CRCs are examples of systematic error detection. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  In systematic error detection, a group of error control bits is appended to the end of the block of transmitted data.  This group of bits is called a syndrome.  CRCs are polynomials over the modulo 2 arithmetic field. The mathematical theory behind modulo 2 polynomials is beyond our scope. However, we can easily work with it without knowing its theoretical underpinnings. 2.7 Error Detection and Correction (4 of 25)  Modulo 2 arithmetic works like clock arithmetic. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  In clock arithmetic, if we add 2 hours to 11:00, we get 1:00.  In modulo 2 arithmetic, if we add 1 to 1, we get 0. The addition rules couldn’t be simpler: 0+0=0 0+1=1 1+0=1 1+1=0 You will fully understand why modulo 2 arithmetic is so handy after you study digital circuits in Chapter 3. 2.7 Error Detection and Correction (5 of 25)  Find the quotient and Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com remainder when 1111101 is divided by 1101 in modulo 2 arithmetic.  As with traditional division, we note that the dividend is divisible once by the divisor.  We place the divisor under the dividend and perform modulo 2 subtraction. 2.7 Error Detection and Correction (6 of 25) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Find the quotient and remainder when 1111101 is divided by 1101 in modulo 2 arithmetic.  Now we bring down the next bit of the dividend.  We see that 00101 is not divisible by 1101. So, we place a zero in the quotient. 2.7 Error Detection and Correction (7 of 25) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Find the quotient and remainder when 1111101 is divided by 1101 in modulo 2 arithmetic.  1010 is divisible by 1101 in modulo 2.  We perform the modulo 2 subtraction. 2.7 Error Detection and Correction (8 of 25)  Find the quotient and remainder when 1111101 Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com is divided by 1101 in modulo 2 arithmetic.  We find the quotient is 1011, and the remainder is 0010.  This procedure is very useful to us in calculating CRC syndromes. Note: The divisor in this example corresponds to a modulo 2 polynomial: 2.7 Error Detection and Correction (9 of 25)  Suppose we want to transmit the Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com information string: 1111101.  The receiver and sender decide to use the (arbitrary) polynomial pattern, 1101.  The information string is shifted left by one position less than the number of positions in the divisor.  The remainder is found through modulo 2 division (at right) and added to the information string: 1111101000 + 111 = 1111101111. 2.7 Error Detection and Correction (10 of 25)  If no bits are lost or corrupted, Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com dividing the received information string by the agreed-upon pattern will give a remainder of zero.  We see this is so in the calculation on the right.  Real applications use longer polynomials to cover larger information strings.  Some of the standard polynomials are listed in the text. 2.7 Error Detection and Correction (11 of 25)  Data transmission errors are easy to fix once an error is detected. Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  Just ask the sender to transmit the data again.  In computer memory and data storage, however, this cannot be done.  Too often the only copy of something important is in memory or on disk.  Thus, to provide data integrity over the long term, error-correcting codes are required. 2.7 Error Detection and Correction (12 of 25)  Hamming codes and Reed-Solomon codes are two important error- Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com correcting codes.  Reed-Solomon codes are particularly useful in correcting burst errors that occur when a series of adjacent bits are damaged.  Because CD-ROMs are easily scratched, they employ a type of Reed-Solomon error correction.  Because the mathematics of Hamming codes is much simpler than Reed-Solomon, we discuss Hamming codes in detail. 2.7 Error Detection and Correction (13 of 25)  Hamming codes are code words formed by adding redundant Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com This pair of bytes has a check bits, or parity bits, to a Hamming distance of 3: data word.  The Hamming distance between two code words is the number of bits in which two code words differ.  The minimum Hamming distance for a code is the smallest Hamming distance between all pairs of words in the code. 2.7 Error Detection and Correction (14 of 25) Copyright © 2024 by Jones & Bartlett Learning, LLC an Ascend Learning Company. www.jblearning.com  The minimum Hamming distance for a code, , determines its error-detecting and error-correcting capability.  For any code word, X, to be interpreted as a different valid code word, Y, at least single-bit errors must occur in X.  Thus, to detect k (or fewer) single-bit errors, the code must have a Hamming distance of = k + 1. 2.7 Error Detection and Correction (15 of 25)  Hamming codes can detect errors and correct Copyright © 2024 by