Computer Architecture Lecture 1 PDF

+ Computer Architecture SCS3203 Lecture 1 Introduction Organization And Architecture  2 + Basic Concepts and Computer Evolution Dr Almaz Yohannis 9/16/24  To...

+ Computer Architecture SCS3203 Lecture 1 Introduction Organization And Architecture  2 + Basic Concepts and Computer Evolution Dr Almaz Yohannis 9/16/24  Topics to be covered 1. Architecture and Organization 2. Structure and Functions 3. Computer Evolution and Performance Dr Almaz Yohannis 9/16/24 3  Computer Architecture 4 Computer Organization Attributes of a system Instruction set, number of visible to the bits used to represent programmer various data types, I/O Have a direct impact on mechanisms, techniques the logical execution of a for addressing memory program Architectural Computer attributes Architecture include: Organizational attributes Computer Organization include: Hardware details The operational units and transparent to the their interconnections programmer, control that realize the signals, interfaces architectural between the computer specifications and peripherals, memory technology used Dr Almaz Yohannis 9/16/24 + 5 IBM System 370 Architecture n IBM System/370 architecture n Was introduced in 1970 n Included a number of models n Could upgrade to a more expensive, faster model without having to abandon original software n New models are introduced with improved technology, but retain the same architecture so that the customer’s software investment is protected n Architecture has survived to this day as the architecture of IBM’s mainframe product line 9/16/24 + 6 Structure and Function n Hierarchical system n Structure n Set of interrelated n The way in which subsystems components relate to each n Hierarchical nature of complex other systems is essential to both their design and their n Function description n The operation of individual components as part of the n Designer need only deal with structure a particular level of the system at a time n Concerned with structure and function at each level Dr Almaz Yohannis 9/16/24 + 7 Function n There are four basic functions that a computer can perform: n Data processing n Data may take a wide variety of forms and the range of processing requirements is broad n Data storage n Short-term n Long-term n Data movement n Input-output (I/O) - when data are received from or delivered to a device (peripheral) that is directly connected to the computer n Data communications – when data are moved over longer distances, to or from a remote device n Control n A control unit manages the computer’s resources and orchestrates the performance of its functional parts in response to instructions 9/16/24  COMPUTER 8 I/O Main memory System Bus CPU CPU Registers ALU Structure Internal Bus Control Unit CONTROL UNIT Sequencing Logic Control Unit Registers and Decoders Control Memory Figure 1.1 A Top-Down View of a Computer Dr Almaz Yohannis 9/16/24 + ª CPU – controls the operation of the computer and performs its There are four data processing functions main structural components ª Main Memory – stores data of the computer: ª I/O – moves data between the computer and its external environment ª System Interconnection – some mechanism that provides for communication among CPU, main memory, and I/O Dr Almaz Yohannis 9/16/24 + n Control Unit CPU n Controls the operation of the CPU and hence the computer Major structural n Arithmetic and Logic Unit (ALU) components: n Performs the computer’s data processing function n Registers n Provide storage internal to the CPU n CPU Interconnection n Some mechanism that provides for communication among the control unit, ALU, and registers Dr Almaz Yohannis 9/16/24 + 11 Multicore Computer Structure n Central processing unit (CPU) n Portion of the computer that fetches and executes instructions n Consists of an ALU, a control unit, and registers n Referred to as a processor in a system with a single processing unit n Core n An individual processing unit on a processor chip n May be equivalent in functionality to a CPU on a single-CPU system n Specialized processing units are also referred to as cores n Processor n A physical piece of silicon containing one or more cores n Is the computer component that interprets and executes instructions n Referred to as a multicore processor if it contains multiple cores 9/16/24 + 12 Cache Memory n Multiple layers of memory between the processor and main memory n Is smaller and faster than main memory n Used to speed up memory access by placing in the cache data from main memory that is likely to be used in the near future n A greater performance improvement may be obtained by using multiple levels of cache, with level 1 (L1) closest to the core and additional levels (L2, L3, etc.) progressively farther from the core 9/16/24  MOTHERBOARD Main memory chips 13 Processor I/O chips chip PROCESSOR CHIP Core Core Core Core L3 cache L3 cache Core Core Core Core CORE Arithmetic Instruction and logic Load/ logic unit (ALU) store logic L1 I-cache L1 data cache L2 instruction L2 data cache cache Figure 1.2 Simplified View of Major Elements of a Multicore Computer Dr Almaz Yohannis 9/16/24  + Figure 1.3 Motherboard with Two Intel Quad-Core Xeon Processors 9/16/24 Dr Almaz Yohannis 14  15 Figure 1.4 zEnterprise EC12 Processor Unit (PU) Chip Diagram Dr Almaz Yohannis 9/16/24  16 Figure 1.5 zEnterprise EC12 Core Layout Dr Almaz Yohannis 9/16/24 + 17 Computer Evolution and Performance: Computer Generation 1. Zeroth generation- Mechanical Computers (1642-1940) 2. First generation - Vacuum Tubes (1940-1955) 3. Second Generation -Transistors (1956-1963) 4. Third Generation - Integrated Circuits (1964-1971) 5. Fourth Generation – VLS-Integration (1971-present) 6. Fifth Generation – Artificial Intelligence (Present and Beyond) 9/16/24 + 18 The Zero Generation Pascal’s machine – Addition and Subtraction Analytical engine – Four components (Store, mill, input, output 9/16/24 + 19 Charles Babbage Difference Engine 1823- First successful automatic calculator Analytic Engine 1833- The forerunner of modern digital computer The first conception of a general-purpose computer 9/16/24 + 20 History of Computers First Generation: Vacuum Tubes n Vacuum tubes were used for digital logic elements and memory n IAS computer n Fundamental design approach was the stored program concept n Attributed to the mathematician John von Neumann n First publication of the idea was in 1945 for the EDVAC n Design began at the Princeton Institute for Advanced Studies n Completed in 1952 n Prototype of all subsequent general-purpose computers 9/16/24 Von-Neumann Machine Dr Almaz Yohnannus 21  The Von Neumann Machine The task of entering and altering programs for the ENIAC was extremely tedious. What if we could store the program in memory alongside the data? Stored-program computer features of an IAS computer: A main memory, which stores both data and instructions An arithmetic and logic unit (ALU) capable of operating on binary data A control unit, which interprets the instructions in memory and causes them to be executed Input/output (I/O) equipment operated by the control unit.  Central processing unit (CPU) 23 Arithmetic-logic unit (CA) AC MQ Input- Arithmetic-logic output circuits equipment (I, O) MBR Instructions and data Instructions and data M(0) M(1) M(2) M(3) PC IBR M(4) AC: Accumulator register MQ: multiply-quotient register MBR: memory buffer register IBR: instruction buffer register MAR IR PC: program counter MAR: memory address register Main IR: insruction register memory (M) Control Control circuits signals M(4092) M(4093) M(4095) Program control unit (CC) Addresses Figure 1.6 IAS Structure Dr Almaz Yohannis 9/16/24  24 0 1 39 sign bit (a) Number word left instruction (20 bits) right instruction (20 bits) 0 8 20 28 39 opcode (8 bits) address (12 bits) opcode (8 bits) address (12 bits) (b) Instruction word Figure 1.7 IAS Memory Formats Dr Almaz Yohannis 9/16/24 + Registers 25 Memory buffer register Contains a word to be stored in memory or sent to the I/O unit (MBR) Or is used to receive a word from memory or from the I/O unit Memory address Specifies the address in memory of the word to be written from register (MAR) or read into the MBR Instruction register (IR) Contains the 8-bit opcode instruction being executed Instruction buffer Employed to temporarily hold the right-hand instruction from a register (IBR) word in memory Contains the address of the next instruction pair to be fetched Program counter (PC) from memory Accumulator (AC) and Employed to temporarily hold operands and results of ALU multiplier quotient (MQ) operations 9/16/24  Start 26 Yes Is next No instruction MAR PC No memory in IBR? Fetch access cycle required MBR M(MAR) Left No Yes IBR MBR (20:39) IR IBR (0:7) IR MBR (20:27) instruction IR MBR (0:7) MAR IBR (8:19) MAR MBR (28:39) required? MAR MBR (8:19) PC PC + 1 Decode instruction in IR AC M(X) Go to M(X, 0:19) If AC > 0 then AC AC + M(X) go to M(X, 0:19) Execution Yes Is AC > 0? cycle MBR M(MAR) PC MAR No MBR M(MAR) AC MBR AC AC + MBR M(X) = contents of memory location whose address is X (i:j) = bits i through j Figure 1.8 Partial Flowchart of IAS Operation Dr Almaz Yohannis 9/16/24  IAS Instruction Cycle Instruction cycle Fetch cycle - The opcode of the next instruction is loaded into the IR and the address portion is loaded into the MAR Instruction is taken from the IBR, or it can be obtained from memory by loading a word into the MBR, and then down to the IBR, IR, and MAR Execute Cycle Control circuitry interprets the opcode and executes the instruction by sending out the appropriate control signals to cause data to be moved or an operation to be performed by the ALU.  Symbolic Instruction Type Opcode Representation Description 28 00001010 LOAD MQ Transfer contents of register MQ to the accumulator AC 00001001 LOAD MQ,M(X) Transfer contents of memory location X to MQ 00100001 STOR M(X) Transfer contents of accumulator to memory Data transfer location X 00000001 LOAD M(X) Transfer M(X) to the accumulator 00000010 LOAD –M(X) Transfer –M(X) to the accumulator 00000011 LOAD |M(X)| Transfer absolute value of M(X) to the accumulator 00000100 LOAD –|M(X)| Transfer –|M(X)| to the accumulator Unconditional 00001101 JUMP M(X,0:19) Take next instruction from left half of M(X) Table 1.1 branch 00001110 JUMP M(X,20:39) Take next instruction from right half of M(X) 00001111 JUMP+ M(X,0:19) If number in the accumulator is nonnegative, take next instruction from left half of M(X) 0 JU If number in the 0 MP accumulator is nonnegative, Conditional branch 0 + take next instruction from The IAS 1 M(X right half of M(X) 0 ,20: 0 39) Instruction Set 0 0 00000101 ADD M(X) Add M(X) to AC; put the result in AC 00000111 ADD |M(X)| Add |M(X)| to AC; put the result in AC 00000110 SUB M(X) Subtract M(X) from AC; put the result in AC 00001000 SUB |M(X)| Subtract |M(X)| from AC; put the remainder in AC 00001011 MUL M(X) Multiply M(X) by MQ; put most significant bits of result in AC, put least significant bits Arithmetic in MQ 00001100 DIV M(X) Divide AC by M(X); put the quotient in MQ and the remainder in AC 00010100 LSH Multiply accumulator by 2; i.e., shift left one bit position 00010101 RSH Divide accumulator by 2; i.e., shift right one position 00010010 STOR M(X,8:19) Replace left address field at M(X) by 12 rightmost bits of AC Address modify 00010011 STOR M(X,28:39) Replace right address field at M(X) by 12 rightmost bits of AC (Table can be found on page 17 in the textbook.) Dr Almaz Yohannis 9/16/24 + 29 History of Computers Second Generation: Transistors n Smaller n Cheaper n Dissipates less heat than a vacuum tube n Is a solid state device made from silicon n Was invented at Bell Labs in 1947 n It was not until the late 1950’s that fully transistorized computers were commercially available 9/16/24 + 30 Table 1.2 Computer Generations Approximate Typical Speed Generation Dates Technology (operations per second) 1 1946–1957 Vacuum tube 40,000 2 1957–1964 Transistor 200,000 3 1965–1971 Small and medium scale 1,000,000 integration 4 1972–1977 Large scale integration 10,000,000 5 1978–1991 Very large scale integration 100,000,000 6 1991- Ultra large scale integration >1,000,000,000 9/16/24 + 31 Second Generation Computers n Introduced: n More complex arithmetic and logic units and control units n The use of high-level programming languages n Provision of system software which provided the ability to: n Load programs n Move data to peripherals n Libraries perform common computations 9/16/24  IBM 7094 computer Peripheral devices 32 Mag tape units CPU Card punch Data channel Line printer Card reader Drum Multi- Data plexor channel Disk Data Disk channel Hyper- tapes Memory Data Teleprocessing channel equipment Figure 1.9 An IBM 7094 Configuration Dr Almaz Yohannis 9/16/24  33 History of Computers Third Generation: Integrated Circuits n 1958 – the invention of the integrated circuit n Discrete component n Single, self-contained transistor n Manufactured separately, packaged in their own containers, and soldered or wired together onto masonite-like circuit boards n Manufacturing process was expensive and cumbersome n The two most important members of the third generation were the IBM System/360 and the DEC PDP-8 Dr Almaz Yohannis 9/16/24  34 Boolean Binary Input logic Output Input storage Output function cell Read Activate Write signal (a) Gate (b) Memory cell Figure 1.10 Fundamental Computer Elements Dr Almaz Yohannis 9/16/24 + n A computer consists of gates, 35 Integrated memory cells, and interconnections among these Circuits elements n The gates and memory cells n Data storage – provided by are constructed of simple memory cells digital electronic components n Data processing – provided by gates n Exploits the fact that such components as transistors, resistors, and conductors can be n Data movement – the paths fabricated from a among components are used semiconductor such as silicon to move data from memory to memory and from memory n Many transistors can be through gates to memory produced at the same time on a single wafer of silicon n Control – the paths among components can carry control n Transistors can be connected signals with a processor metallization to form circuits Dr Almaz Yohannis 9/16/24  Wafer 36 Chip Gate Packaged chip Figure 1.11 Relationship Among Wafer, Chip, and Gate Dr Almaz Yohannis 9/16/24  37 t ui g ed of rc o r in ga w d st rk ci ul s la at n te gr t io si o an w ’ om e te n r tr irst in ve pr oo In M F 100 bn 10 bn 1 bn 100 m 10 m 100,000 10.000 1,000 100 10 1 1947 50 55 60 65 70 75 80 85 90 95 2000 05 11 Figure 1.12 Growth in Transistor Count on Integrated Circuits (DRAM memory) Dr Almaz Yohannis 9/16/24 Moore’s Law 38 1965; Gordon Moore – co-founder of Intel Observed number of transistors that could be put on a single chip was doubling every year Consequences of Moore’s law: The pace slowed to a doubling every 18 months in the 1970’s but has sustained The cost of The electrical Computer computer logic path length is becomes smaller Reduction in that rate ever since and memory shortened, and is more power and Fewer cooling interchip circuitry has increasing convenient to use in a variety connections fallen at a operating requirements dramatic rate speed of environments Dr Almaz Yohannis 9/16/24 + 39 IBM System/360 n Announced in 1964 n Product line was incompatible with older IBM machines n Was the success of the decade and cemented IBM as the overwhelmingly dominant computer vendor n The architecture remains to this day the architecture of IBM’s mainframe computers n Was the industry’s first planned family of computers n Models were compatible in the sense that a program written for one model should be capable of being executed by another model in the series 9/16/24 + Family Characteristics 40 Similar or Similar or identical identical operating instruction set system Increasing Increasing number of I/O speed ports Increasing Increasing cost memory size 9/16/24  41 Console Main I/O I/O CPU controller memory module module Omnibus Figure 1.13 PDP-8 Bus Structure Dr Almaz Yohannis 9/16/24 + LSI Large Scale Later Integration Generations VLSI Very Large Scale Integration ULSI Semiconductor Memory Ultra Large Microprocessors Scale Integration 9/16/24 Dr Almaz Yohannis  Semiconductor Memory 43 In 1970 Fairchild produced the first relatively capacious semiconductor memory Chip was about the size Could hold 256 bits of of a single core memory Non-destructive Much faster than core In 1974 the price per bit of semiconductor memory dropped below the price per bit of core memory There has been a continuing and rapid decline in Developments in memory and processor memory cost accompanied by a corresponding technologies changed the nature of computers in increase in physical memory density less than a decade Since 1970 semiconductor memory has been through 13 generations Each generation has provided four times the storage density of the previous generation, accompanied by declining cost per bit and declining access time Dr Almaz Yohannis 9/16/24 + 44 Microprocessors n The density of elements on processor chips continued to rise n More and more elements were placed on each chip so that fewer and fewer chips were needed to construct a single computer processor n 1971 Intel developed 4004 n First chip to contain all of the components of a CPU on a single chip n Birth of microprocessor n 1972 Intel developed 8008 n First 8-bit microprocessor n 1974 Intel developed 8080 n First general purpose microprocessor n Faster, has a richer instruction set, has a large addressing capability 9/16/24  45 Evolution of Intel Microprocessors 4004 8008 8080 8086 8088 Introduced 1971 1972 1974 1978 1979 5 MHz, 8 MHz, 10 Clock speeds 108 kHz 108 kHz 2 MHz 5 MHz, 8 MHz MHz Bus width 4 bits 8 bits 8 bits 16 bits 8 bits Number of 2,300 3,500 6,000 29,000 29,000 transistors Feature size 10 8 6 3 6 (µm) Addressable 640 Bytes 16 KB 64 KB 1 MB 1 MB memory (a) 1970s Processors Dr Almaz Yohannis 9/16/24  46 Evolution of Intel Microprocessors 486TM DX 80286 386TM DX 386TM SX CPU Introduced 1982 1985 1988 1989 6 MHz - 12.5 16 MHz - 33 16 MHz - 33 25 MHz - 50 Clock speeds MHz MHz MHz MHz Bus width 16 bits 32 bits 16 bits 32 bits Number of transistors 134,000 275,000 275,000 1.2 million Feature size (µm) 1.5 1 1 0.8 - 1 Addressable 16 MB 4 GB 16 MB 4 GB memory Virtual 1 GB 64 TB 64 TB 64 TB memory Cache — — — 8 kB (b) 1980s Processors Dr Almaz Yohannis 9/16/24  47 Evolution of Intel Microprocessors 486TM SX Pentium Pentium Pro Pentium II Introduced 1991 1993 1995 1997 16 MHz - 33 60 MHz - 166 150 MHz - 200 200 MHz - 300 Clock speeds MHz MHz, MHz MHz Bus width 32 bits 32 bits 64 bits 64 bits Number of 1.185 million 3.1 million 5.5 million 7.5 million transistors Feature size (µm) 1 0.8 0.6 0.35 Addressable 4 GB 4 GB 64 GB 64 GB memory Virtual memory 64 TB 64 TB 64 TB 64 TB 512 kB L1 and 1 Cache 8 kB 8 kB 512 kB L2 MB L2 (c) 1990s Processors Dr Almaz Yohannis 9/16/24  48 Evolution of Intel Microprocessors Core 2 Duo Core i7 EE Pentium III Pentium 4 4960X Introduced 1999 2000 2006 2013 Clock speeds 450 - 660 MHz 1.3 - 1.8 GHz 1.06 - 1.2 GHz 4 GHz Bus wid 64 bits 64 bits 64 bits 64 bits th Number of 9.5 million 42 million 167 million 1.86 billion transistors Feature size (nm) 250 180 65 22 Addressable 64 GB 64 GB 64 GB 64 GB memory Virtual memory 64 TB 64 TB 64 TB 64 TB 1.5 MB L2/15 Cache 512 kB L2 256 kB L2 2 MB L2 MB L3 Number of cores 1 1 2 6 (d) Recent Processors Dr Almaz Yohannis 9/16/24 + 49 The Evolution of the Intel x86 Architecture n Two processor families are the Intel x86 and the ARM architectures n Current x86 offerings represent the results of decades of design effort on complex instruction set computers (CISCs) n An alternative approach to processor design is the reduced instruction set computer (RISC) n ARM architecture is used in a wide variety of embedded systems and is one of the most powerful and best-designed RISC-based systems on the market 9/16/24  50 Highlights of the Evolution of the Intel Product Line: 8080 8086 80286 80386 80486 World’s first A more Extension of the Intel’s first 32- Introduced the general- powerful 16-bit 8086 enabling bit machine use of much purpose machine addressing a First Intel more microprocessor Has an 16-MB memory processor to sophisticated 8-bit machine, instruction instead of just support and powerful 8-bit data path cache, or 1MB multitasking cache to memory queue, that technology and Was used in the prefetches a sophisticated first personal few instructions instruction computer before they are pipelining (Altair) executed Also offered a The first built-in math appearance of coprocessor the x86 architecture The 8088 was a variant of this processor and used in IBM’s first personal computer (securing the success of Intel Dr Almaz Yohannis 9/16/24 Highlights of the Evolution of the 51 Intel Product Line: Pentium Intel introduced the use of superscalar techniques, which allow multiple instructions to execute in parallel Pentium Pro Continued the move into superscalar organization with aggressive use of register renaming, branch prediction, data flow analysis, and speculative execution Pentium II Incorporated Intel MMX technology, which is designed specifically to process video, audio, and graphics data efficiently Pentium III Incorporated additional floating-point instructions Streaming SIMD Extensions (SSE) Pentium 4 Includes additional floating-point and other enhancements for multimedia Core First Intel x86 micro-core Core 2 Extends the Core architecture to 64 bits Core 2 Quad provides four cores on a single chip More recent Core offerings have up to 10 cores per chip An important addition to the architecture was the Advanced Vector Extensions instruction set Dr Almaz Yohannis 9/16/24 + 52 Embedded Systems n The use of electronics and software within a product n Billions of computer systems are produced each year that are embedded within larger devices n Today many devices that use electric power have an embedded computing system n Often embedded systems are tightly coupled to their environment n This can give rise to real-time constraints imposed by the need to interact with the environment n Constraints such as required speeds of motion, required precision of measurement, and required time durations, dictate the timing of software operations n If multiple activities must be managed simultaneously this imposes more complex real-time constraints 9/16/24  Custom 53 logic Processor Memory Human Diagnostic interface port A/D D/A conversion Conversion Actuators/ Sensors indicators Figure 1.14 Possible Organization of an Embedded System Dr Almaz Yohannis 9/16/24 + 54 The Internet of Things (IoT) n Term that refers to the expanding interconnection of smart devices, ranging from appliances to tiny sensors n Is primarily driven by deeply embedded devices n Generations of deployment culminating in the IoT: n Information technology (IT) n PCs, servers, routers, firewalls, and so on, bought as IT devices by enterprise IT people and primarily using wired connectivity n Operational technology (OT) n Machines/appliances with embedded IT built by non-IT companies, such as medical machinery, SCADA, process control, and kiosks, bought as appliances by enterprise OT people and primarily using wired connectivity n Personal technology n Smartphones, tablets, and eBook readers bought as IT devices by consumers exclusively using wireless connectivity and often multiple forms of wireless connectivity n Sensor/actuator technology n Single-purpose devices bought by consumers, IT, and OT people exclusively using wireless connectivity, generally of a single form, as part of larger systems n It is the fourth generation that is usually thought of as the IoT and it is marked by the use of billions of embedded devices 9/16/24 + 55 Embedded Application Processors Operating versus Systems Dedicated Processors n There are two general n Application processors approaches to developing an n Defined by the processor’s ability to execute complex operating embedded operating system systems (OS): n General-purpose in nature n Take an existing OS and n An example is the smartphone – the embedded system is designed adapt it for the embedded to support numerous apps and application perform a wide variety of functions n Design and implement an n Dedicated processor OS intended solely for n Is dedicated to one or a small embedded use number of specific tasks required by the host device n Because such an embedded system is dedicated to a specific task or tasks, the processor and associated components can be engineered to reduce size and cost Dr Almaz Yohannis 9/16/24  56 Processor Analog data A/D Temporary RAM acquisition converter data Analog data D/A Program ROM transmission converter and data Send/receive Serial I/O Permanent EEPROM data ports data Peripheral Parallel I/O Timing TIMER interfaces ports System functions bus Figure 1.15 Typical Microcontroller Chip Elements Dr Almaz Yohannis 9/16/24 + 57 Deeply Embedded Systems n Subset of embedded systems n Has a processor whose behavior is difficult to observe both by the programmer and the user n Uses a microcontroller rather than a microprocessor n Is not programmable once the program logic for the device has been burned into ROM n Has no interaction with a user n Dedicated, single-purpose devices that detect something in the environment, perform a basic level of processing, and then do something with the results n Often have wireless capability and appear in networked configurations, such as networks of sensors deployed over a large area n Typically have extreme resource constraints in terms of memory, processor size, time, and power consumption 9/16/24  ARM 58 Refers to a processor architecture that has evolved from RISC design principles and is used in embedded systems Family of RISC-based microprocessors and microcontrollers designed by ARM Holdings, Cambridge, England Chips are high-speed processors that are known for their small die size and low power requirements Probably the most widely used embedded processor architecture and indeed the most widely used processor architecture of any kind in the world Acorn RISC Machine/Advanced RISC Machine Dr Almaz Yohannis 9/16/24 + 59 ARM Products Cortex-M Cortex-M0 Cortex-R Cortex-M0+ Cortex-M3 Cortex- Cortex-M4 A/Cortex- A50 9/16/24  Security Analog Interfaces Timers &Triggers Parallel I/O Ports Serial Interfaces Periph Timer/ 60 bus int counter Pin Hard- reset USART USB ware A/D D/A Low Real AES con- con- energy time ctr General External Low- verter verter energy Pulse Watch- purpose Inter- UART counter dog tmr I/O rupts UART Peripheral bus 32-bit bus Voltage Voltage High fre- High freq Flash SRAM Debug DMA regula- compar- quency RC crystal memory memory inter- control- tor ator oscillator oscillator 64 kB 64 kB face ler Brown- Low fre- Low freq Memory Power- protec- out de- quency RC crystal Cortex-M3 processor on reset tion unit tector oscillator oscillator Energy management Clock management Core and memory Microcontroller Chip ICode SRAM & interface peripheral I/F Bus matrix Debug logic Memory DAP protection unit ARM NVIC core ETM Cortex-M3 Core NVIC ETM Cortex-M3 interface interface Processor 32-bit ALU Hardware 32-bit divider multiplier Control Thumb logic decode Instruction Data interface interface Figure 1.16 Typical Microcontroller Chip Based on Cortex-M3 Dr Almaz Yohannis 9/16/24 + 61 Cloud Computing n NIST defines cloud computing as: “A model for enabling ubiquitous, convenient, on-demand network access to a shared pool of configurable computing resources that can be rapidly provisioned and released with minimal management effort or service provider interaction.” n You get economies of scale, professional network management, and professional security management n The individual or company only needs to pay for the storage capacity and services they need n Cloud provider takes care of security 9/16/24  Cloud Networking 62 n Refers to the networks and network management functionality that must be in place to enable cloud computing n One example is the provisioning of high-performance and/or high- reliability networking between the provider and subscriber n The collection of network capabilities required to access a cloud, including making use of specialized services over the Internet, linking enterprise data center to a cloud, and using firewalls and other network security devices at critical points to enforce access security policies Cloud Storage n Subset of cloud computing n Consists of database storage and database applications hosted remotely on cloud servers n Enables small businesses and individual users to take advantage of data storage that scales with their needs and to take advantage of a variety of database applications without having to buy, maintain, and manage the storage assets Dr Almaz Yohannis 9/16/24  Traditional IT Infrastructure as Platform as a Software as a architecture a service (IaaS) service (PaaS) service (SaaS) 63 Managed by client Applications Applications Applications Applications Managed by client Application Application Application Application Framework Framework Framework Framework Compilers Compilers Compilers Compilers Run-time Run-time Run-time Run-time environment environment environment environment Managed by CSP Managed by CSP Databases Databases Databases Databases Operating Operating Operating Operating system Managed by CSP system system system Virtual Virtual Virtual Virtual machine machine machine machine Server Server Server Server hardware hardware hardware hardware Storage Storage Storage Storage Networking Networking Networking Networking More complex Less complex More upfront cost Lower upfront cost Less scalable More scalable More customizable Less customizable IT = information technology CSP = cloud service provider Figure 1.17 Alternative Information Technology Architectures Dr Almaz Yohannis 9/16/24 + Summary 64 Basic Concepts and Computer Evolution Lesson 1 n Organization and architecture n Embedded systems n Structure and function n The Internet of things n Brief history of computers n Embedded operating systems n The First Generation: Vacuum n Application processors versus tubes dedicated processors n The Second Generation: Transistors n Microprocessors versus n The Third Generation: Integrated microcontrollers Circuits n Embedded versus deeply n Later generations embedded systems n The evolution of the Intel x86 architecture n ARM architecture n ARM evolution n Cloud computing n Instruction set architecture n Basic concepts n ARM products n Cloud services Dr Almaz Yohannis 9/16/24