II PU Computer Science Question Bank PDF 2024-25

GOVERNMENT OF KARNATAKA DEPARTMENT OF SCHOOL EDUCATION (PRE UNIVERSITY) REVISED QUESTION BANK (2024-25) SUBJECT: COMPUTER SCIENCE SECOND YEAR PUC  Computer Science Question PÉÆÃn Committee - 2024-25 Sl. name...

GOVERNMENT OF KARNATAKA DEPARTMENT OF SCHOOL EDUCATION (PRE UNIVERSITY) REVISED QUESTION BANK (2024-25) SUBJECT: COMPUTER SCIENCE SECOND YEAR PUC  Computer Science Question PÉÆÃn Committee - 2024-25 Sl. name Address Designation No Computer Science Lecturer (Retd.) 1 Dr.Udayakumar B.G. Seshadripuram PU College Coordinator Seshadripuram, Bangalore – 20. Computer Science Lecturer 2 Ravindra K.V. Government PU College Members Sagar Computer Science Lecturer (Granted) 3 Bharat Bhushan Vijaya College Members Jayanagar. Bangalore - 11 Computer Science Lecturer Government PU College, BP Wadia Road 4 Manjula Priyadarshini Members Basavanagudi Bangalore - 560004 Computer Science Lecturer Government PU College 5 Bhuvneshwari Ankalagi Members Yelahanka New Town Bangalore - 560064  Chapter 1 TYPICAL CONFIGURATION OF COMPUTER SYSTEM 1. …………. is directly accessed and manipulated by the CPU during program execution a. RAM b. Cache c. Primary memory d. Registers 2. …………is known as CPU’s working memory a. Cache b. Primary Memory c. Register d. secondary memory 3. …………. is referenced by the CPU without address. a. RAM b. Primary Memory c. hard disk d. Registers 4. Which component of computer co-ordinates overall functioning of the computer. a. ALU b. CU c. Registers c. North Bridge 5. The primary memory of a computer consists of a. Only RAM b. Only ROM c. Both a and b d. Flash drives 6. Which of the following is not a secondary memory a. Magnetic Tape b. Hard disk c. Optical Disk d. Cache memory 7. …………. is a large, printed circuit board having many chips, ports, controllers and other electronic components mounted on it a. Integrated Circuit b. Motherboard c. Chip set d. Firewire 8. Which among the following are characteristics of motherboard? a. only form factor b. only Chip set c. Only Processor Socket d. All of these 9. form factor refers to a. Geometry b. Electrical requirements c. Dimensions d. All of these 10. …………. characteristic of motherboard should be considered to maximize the computers upgradability. a. Form Factor b. Chip set c. Processor socket d. All from (a) to (c) 11. Which of the following motherboard is old model mother board a. AT b. ATX c. XT d. Baby AT 12. Which of the following motherboards has no ports a. AT b. ATX c. XT d. Baby AT 13. Pentium-I, Pentium-II and Pentium – MMX processors used in……….type of motherboards a. AT b. ATX c. XT d. Baby AT 14. Pentium -III Processors are used in …………. type of motherboards a. ET b. ATX c. XT d. Baby AT 15. Both Pentium III and Pentium IV processors are supported by………. motherboards a. XT b. AT c. Baby AT d. ATX 16. Processors supported by ATX mother board are………. a. Only Pentium-IV, Dual Core b. Only Dual Core and Core 2 Duo c. Quad Core, i3, i5 and i7 d. All the above 17. Which among the following motherboards have slot type and PGA type processor sockets? a. ATX motherboard b. Baby AT motherboard c. XT motherboard d. AT motherboard 18. Choose the component not present in Baby AT motherboard a. Slot type processor sockets and PGA processor sockets b. SDRAM slots and DDRRAM slots c. PCI slots and ISA slots d. AGP slots 19. Which one of the following has 24-pin Power connector? a. AT motherboard b. Baby AT motherboard c. XT motherboard d. ATX motherboard 20. XT motherboard has……….power pin connectors a. 24 b. 12 c. 20 d. 20 and 24 21. MPGA processor sockets are found in type of motherboards a. Baby AT b. ATX c. AT c. XT 22. Choose the very old motherboard model from the following a. ATX b. XT c. Baby AT d. AT 23. Which of the following motherboard types consists of SATA connectors? a. AT motherboard b. Baby AT motherboard c. ATX motherboard d. XT motherboard 24. One of the following is the main component of the motherboard a. BUS b. BIOS c. CMOS d. Processor 25. ……….is the frequency with which a processor executes instructions. a. Bus speed b. Clock speed c. MHz d. GHz 26. The computer’s operating speed is linked to the speed of ------------- a. BUS b. Memory access c. System Clock d. North Bridge 27.CPU’s performance is measured by the per second a. Number of instructions de-coded b. Number of instructions loaded c. Number of instructions executed d. Number of programs executed 28.CPU is fabricated on a single IC chip is known as-------------- a. Multiprocessor c. graphic processor b. Microprocessor d. microcomputer 29. _________establishes a communication path for movement of data between processor and memory a. Cache b. Bus c. motherboard d. North Bridge 30. Which one of the following is the alternative name for North Bridge a. Host Bridge b. south chipset c. North Chipset d. Both (a) and (c) are correct 31. ……….is responsible for control of high speed components like CPU, RAM and video card a. South chipset b. south bridge c. North Chipset d. Both (a) and (b) 32. ……….is responsible for control of slower components. a. South chipset b. north bridge c. North Chipset d. Both (a) and (c) 33.The most common motherboard standard for desktop computers a. AT b. ATX c. XT d. Baby ATX 34.Identify the devices which are not managed by North Bridge a. RAM b. CPU c. Video cards d. CD ROM drive 35. __________ chipset manages data communication between low speed components a. North Bridge b. South Bridge c. IDE c. SATA 36.Which of the following performs POST a. CMOS b. BIOS c. Control unit d. ALU 37.Identify operations which are not part of BIOS a. Holds instructions to load hardware settings b. Performing POST c. Invoking bootstrap loader d. Storing date and time 38.Invoking bootstrap loader is done by ………. a. BIOS b. CMOS c. SMPS d. South Bridge 39.BIOS stand for ………. a. Basic input output system b. boot input output system c. basic internal output system d. boot internal output system 39. ………. is a type of memory chip to store the date, time and system setup parameters. a. BIOS b. CMOS c. RAM d. ROM 40.BIOS and CMOS are powered by battery kept on the motherboard a. Lithium-Ion b. Sodium Ion c. Magnesium ion d Silicon Ion 41.PC cards are used in_______computers a. Desktop b. Mini c. Smart Phones d. Laptop 42. ……….is used to connect modem and input devices a. ISA b. PCI c. AGP d. PCI Express 43.………. is used to connect graphic accelerator cards , sound cards, internal modems or scsi cards a. ISA b. PCI c. AGP d. PCI Express 43. Disk controller is a circuit that enables communication between CPU and ………. a. Hard Disk b. Floppy Disk c. Any External disk drive d. All of the above 46. ……….is a plug and play interface a. Serial port b. parallel port c. USB d. AGP port 47. The number of devices supported in USB is ………………. a. 64 b. 127 c. 128 d. 63 48. What is the basic speed of USB …………….. a. 12 Mbps b. 8 Mbps c.16 Mbps d. 32 Mbps 49. ………. is the interface that directs and controls reading and writing to a computer’s floppy disk drive(FDD) a. Hard Disk b)Floppy Disk controller b. c) Any External disk drive d)All of the above 50. ……….are used to connect external device like printers keyboard or scanners to computer a. ISA b. Ports and interfaces c. AGP d. PCI Express 51. ……….are used to connect communication devices. a. Serial port b. parallel port c. USB d. AGP port 52. ……….needs a single wire to transmit I bit of data a. Serial port b. parallel port c. USB d. AGP port 53. ……….are used to connect external input/output devices like…. printers or scanners a. Serial port b. parallel port c. USB d. AGP port 54. CD-ROM drives or hard disk drives are connected to the motherboard through a. Serial port b. parallel port c. USB d. IDE port 55. ports are also called as mouse ports a. Serial port b. parallel port c. PS-2 port d. AGP port 56. ……….port uses synchronous serial signals to communicate between the keyboard and a mouse to the computer a. Serial port b. parallel port c. PS-2 port d. AGP port 57. ……….is used to connect to graphic card. a. Serial port b. parallel port c. PS-2 port d. AGP port 58. ………. port is used for adding external devices such as high speed hard disks, high end scanners CD-ROM drives a. Serial port b. SCSI c. PS-2 port d. AGP port 59. ………. connects monitor to computers video card a. VGA b. parallel port c. PS-2 port d. AGP port 60. ……….transfer large amount of data at very fast speed and connects camcorders and video equipment. a. Serial port b. parallel port c. firewire port d. AGP port 61. ………. connects PC’s modem to telephone network a. Serial port b. parallel port c. modem d. AGP port 62. ……….connects to a network and high speed internet and network cable to computer a. Serial port b. ethernet port c. PS-2 port d. AGP port 63. ……….are used to connect microphone, speakers to sound card. a. Serial port b. parallel port c. sockets d. AGP port 64. ………. is designed to transmit information between electronic musical instruments a. Serial port b. MIDI c. PS-2 port d. AGP port 65. The different components of computer are connected to each other through………. a. BUS b. CMOS c. BIOS d. South Bridge 66. … connects major computer components like processor, memory and I/O a. Internal bus b. external bus c. both a and b d. expansion bus 67. ……….connects the different external devices , peripherals, slots ports to rest of computer a. Internal bus b. external bus c. both a and b d. system bus 68. System bus and expansion bus consists of ………. a. data bus b. address bus c. control bus d. all of these 69. ……….provides a path to transfer data between CPU and Memory a. data bus b. address bus c. control bus d. all of these 70. ……….connects CPU and RAM a. data bus b. address bus c. control bus d. all of these 71. ……….is used to control the access to and he use of the data and address line a. data bus b. address bus c. control bus d. all of these 72. ………. is referred to the electronic storing space for instructions and data a. BIOS b. BUS c. CMOS d. memory 73. ……….includes registers, cache memory and primary memory a. Internal memory b. secondary memory c. permanent memory d. main memory 74. ……….works under the direction of CU to accepts, store and transfer instructions or data and performs arithmetic and logical comparisons at high speed. a. BIOS b. BUS c. Cache d. register 75. ……….is the high speed memory placed in between RAM and CPU a. Secondary memory b. primary memory c. Cache d. register 76. ………. stores the data that is used more often, temporarily and makes it available to CPU at fast rate. a. Secondary memory b. primary memory c. Cache d. register 77. ……….is also known as main memory a. Secondary memory b. primary memoryc. Cache d. register 78. ……….has to be refreshed continuously to store information a. SRAM b. primary memory c. DRAM d. register 79. ……….RAM is synchronized to system clock a. DDR-DRAM b. SRAM c. DRAM d. SDRAM 80. Access speed of SRAM ranges up to ………. a. 2 to 10ns b. 100 to 1000ns c. 10 to 100ns d. 10 to 50 ns 81. Access speed of DRAM ranges up to ………. a. 2 to 10ns b. 50 to 150 ns c. 100 to 1000ns d. 10 to 50 ns 82. ……….is essential for computer to prevent them from failures, breakdowns or shutdown a. Power supply b. software c. hardware d. user 83. ……….converts Ac power to Dc power needed by system a. UPS b. SRAM c. DRAM d. SMPS 84. ……….converts 230v of AC to 5 to 12 v of DC a. UPS b. SRAM c. DRAM d. SMPS  85. ……….is a power supply that includes a battery to maintain power in the event of power failure. a. UPS b. SRAM c. DRAM d. SMPS 86. ……….avoids momentary power lapses by continuously providing power from its own inverter, even when the power line is functioning properly. a. Offline UPS b. stand by UPS c. Online UPS d. SMPS 87. ……….monitors the power line and switches to battery power as soon as it detects a problem. a. Power supply b. stand by UPS c. Online UPS d. SMPS 88. ……….is a process of setting up your hardware devices and assigning resources to them so that they work together without problems a. Computer configuration b. software c. hardware d. power supply Two marks questions: 1. Name any two types of motherboards. 2. Explain North Bridge. 3. Briefly explain South Bridge. 4. Name the different I/O ports. 5. Explain parallel port. 6. Briefly explain USB port. 7. Name the two types of primary memory. 8. What are the sources of power supply to the computer? 9. Explain SMPS. 10. Explain UPS. 11. Name the two types of UPS. 12. Explain off-line UPS. 13. Explain online UPS. Three marks questions: 1. Explain the characteristics of a motherboard. 2. Explain different types of motherboards. 3. What is a north bridge? Name the devices controlled by North Bridge. 4. What is south bridge? Name the devices controlled by south bridge. 5. Explain any three components of a motherboard. 6. Give the functions of BIOS. 7. What is a slot? Explain any two slots. 8. Explain the different types of I/O ports. 9. Write a note on serial port. 10. Write a note on parallel port. 11. Explain USB port. 12. Give the features of USB.  13. Explain cache memory. 14. Explain the different types of system bus. 15. Write a note on registers. 16. What is primary memory? Name the two types of primary memory. 17. Briefly explain RAM. 18. Briefly explain ROM. 19. Write a note on DRAM. 20. Write a note on SRAM. 21. Write a note on SMPS. Five marks questions: 1. Explain any five components of a motherboard. 2. Explain the different slots in a motherboard. 3. Explain the different I/O ports and interfaces. 4. Explain USB. 5. What is an internal memory? Give the features of internal memory? 6. Explain cache memory. 7. Explain different types of RAMs.  Chapter 2 Boolean Algebra 1. In Boolean algebra, the OR operation is performed by which properties? a. Associative properties b. Commutative properties c. Distributive properties d. All the Mentioned 2. The expression for Absorption law is given by a. A + AB = A b. A + AB = B c. AB + AA’ = A d. A + B = B + A 3. The involution of A is equal to a. A b. A’ c. 1 d. 0 4. A(A + B) =? a. AB b. 1 c. (1 + AB) d. A 5. (A + B) (A’ * B’) =? a. 1 b. 0 c. AB d. AB’ 6. Complement of the expression A’B + CD’ is a. (A’ + B) (C’ + D) b. (A + B’)(C’ + D) c. (A’ + B) (C’ + D) d. (A + B’)(C + D’) 7. Simplify Y = AB’ + (A’ + B) C) a. AB’ + C b. AB + AC c. A’B + AC’ d. AB + A 8. The Boolean function A + BC is a reduced form of a. AB + BC b. (A + B) (A + C) c. A’B + AB’C d. (A + C) B 9. The logical sum of two or more logical product terms is called a. SOP b. POS c. OR operation d. NAND operation 10. The expression Y=AB+BC+AC shows the…. operation. a. EX-OR b. SOP c. POS d. NOR 11. The expression Y=(A+B) (B+C) (C+A. shows the…. operation. a. AND b. POS c. SOP d. NAND 12. The canonical sum of product form of the function y(A,B) = A + B is a. AB + BB + A’A b. AB + AB’ + A’B c. BA + BA’ + A’B’ d. AB’ + A’B + A’B’ 13. A variable on its own or in its complemented form is known as a a. Product Term b. Literal c. Sum Term d. Word 14. Canonical form is a unique way of representing a. SOP b. Minterm c. Boolean Expressions d. POS 15. Boolean algebra is also called a. switching algebra b. arithmetic algebra c. linear algebra d. Algebra 16. To perform product of max terms Boolean function must be brought into a. AND term b. OR terms c. NOT terms d. NAND terms 17. According to the Boolean algebra absorption law, which of the following is correct? a. x+xy=x b. (x+y)=xy c. xy+y=x d. x+y=y 18. The expression for Absorption law is given by a. A + AB = A b. A + AB = B c. AB + AA' = A d. A + B = B + A 19. X*y = y*x is the a. commutative law b. inverse property c. associative law d. identity element 20. There are ………. minterms for 3 variables(a,b,c) a. 0 b. 2 c. 8 d. 1 21. The output of x-nor gate is 1, which input combination is correct. a. a=1,b=0 b. a=0 b=1 c. a=0, b=0 d. a=0, b=1 22. odd parity of word can be conveniently tested by….. a. OR GATE b. AND GATE c. NAND GATE d. X-OR GATE 23. determine the values of a,b,c,d that make the sum termA+B+C+D a. a=1 b=0 c=0 d=0 b. a=1 b=0 c=1 d=0 c. a=0 b=1 c=0 d=0 d. a=1 b=0 c=1 d=1 24. which of the following expressions is in the sum-of- product(sop)form. a. (a+b).(c+d). b. (a. b(cd)) c. ab(cd). d. ab+cd 25. For the SOP expression , how many 1s are in the truth table's output column? a. 1 b. 2 c. 3 d. 5 26. A truth table for the SOP expression has how many input combinations? a. 1 b. 2 c. 4 d. 8 27. How many gates would be required to implement the following Boolean expression before simplification? XY + X(X + Z) + Y(X + Z) a. 1 b. 2 c. 4 d. 5 28. How many gates would be required to implement the following Boolean expression after simplification? XY + X(X + Z) + Y(X + Z) a. 1 b. 2 c. 4 d. 5 29. Determine the values of A, B, C, and D that make the product term equal to 1 a. A = 0, B = 1, C = 0, D = 1 b. A = 0, B = 0, C = 0, D = 1 c. A = 1, B = 1, C = 1, D = 1 d. A = 0, B = 0, C = 1, D = 0 30. What is the primary motivation for using Boolean algebra to simplify logic expressions? a) It may make it easier to understand the overall function of the circuit. b) It may reduce the number of gates. c) It may reduce the number of inputs required) d) all of the above 31. Use Boolean algebra to find the most simplified SOP expression for F = ABD + CD + ACD + ABC + ABCD) a. F = ABD + ABC + CD b. F = CD + AD c. F = BC + AB d. F = AC + AD 32. In Boolean algebra the word ‘literal’ means a. a product term b. all the variables in a Boolean expression c. the inverse function d. a variable or it’s compliment 33. The truth table for sop expression AB+𝐵̅C has how many input combinations? a. 1 b. 2 c. 4 d. 8 34. converting the Boolean expression LM+M(NO+PQ) to sop form , we get a. LM+ MNOPQ b. B) L+MNO+MPQ c. LM+M +NO+MPQ d. LM+MNO+MPQ 48. ………… expression is equal to 0. a. (0+ 1+ 0)(1+ 0+ 1) b. (1 + 1 + 1)(0 + 0 + 0) c. (0 + 0 + 0)(1 + 0 + 1) d. (1 + 1 + 0)(1 + 0 + 0) 49. The expression W(X + YZ) can be converted to SOP form by applying which law? a. associative law b. commutative law c. distributive law d. none of the above 50. Simplification of the Boolean expression AB + ABC + ABCD + ABCDE +ABCDEF yields which of the following results? a. ABCDEF b. AB + CD + EF c. A + B + C + D + E + F d. AB 51. Given that F = (A + B'+ C) (D + E), which of the following represents the only correct expression for F'? a. F' = A'BC'+ D'+ E' b. F' =AB'C + DE c. F' = (A'+ B + C')(D'+ E') d. F' = A'BC' + D'E' 52. The product of sum canonical form also known as a. MAXTERM b. MINTERM c. BOTH A AND B d. NONE OF THE ABOVE 53 are the alternative form of canonical form. a. SOP a. POS c. BOTH A AND B d. NONE OF THE ABOVE 54. The sum of product canonical form also known as a. MAXTERM b. MINTERM c. BOTH A AND B d. NONE OF THE ABOVE 55. One of De Morgan's theorems states that. Simply stated, this means that logically there is no difference between: a) a NOR and an AND gate with inverted inputs b) a NAND and an OR gate with inverted inputs. c) an AND and a NOR gate with inverted inputs. d) a NOR and a NAND gate with inverted inputs. Two marks questions 1. What is tautology and fallacy? 2. Name the three logical operators. 3. Write the truth table of AND operator. 4. Write the truth table of OR operator. 5. Name the two forms of expressing Boolean functions. 6. Write the truth table to the Boolean expression XY’ + X’ Y 7. Mention the different basic gates. 8. Write the logic symbol and truth table of AND gate. 9. Write the logic symbol and truth table of OR gate. 10.Write the postulates of complement rules. 11.Prove that 0 + X = X using proof by perfect induction method) 12.Prove that 1 + X = 1 using proof by perfect induction method) 13.Prove that 0 ∙ X = 0 using proof by perfect induction method) 14.Prove that 1 ∙ X = X using proof by perfect induction method) 15.Prove that X’ + X =1 16.Prove that X’ ∙ X =0 17.Prove complementarity law using truth table. 18.Write the truth table for X ∙ Y = Y ∙ X 19.Write the truth table for X + Y = Y + X 20.State and prove commutative law. 21.Prove algebraically X + XY = X 22.Draw logic diagram for X (Y + Z) = XY + XZ 23.Prove algebraically X’ + XY = X + Y 24.Prove that X’ + XY = X + Y using truth table. 25.Prove algebraically X (X + Y) = X 26.State and prove idempotence law. 27.State and prove involution law. 28.Prove complementarity law. 29.Prove commutative law. 30.Prove that X + XY = X using truth table. Three marks questions: 1. Write any three basic postulates of Boolean algebra. 2. State and prove any three theorems of Boolean algebra. 3. Write the principles of duality theorems. 4. Write the properties of 0 and 1 and prove them. 5. Prove that X + (Y + Z) = (X + Y) + Z 6. Prove algebraically that X + (Y + Z) = (X + Y) + Z 7. State and prove associative law and commutative law. 8. Write the truth table for X + YZ = (X + Y)(X + Z) 9. State and prove distributive law. 10.State and prove absorption law. 11.Write the circuit diagram for X + X = 1 and X’ ∙ X = 0. 12.Prove that X ∙ (Y ∙ Z) = (X ∙ Y) ∙ Z 13.Prove that X (Y + Z) = XY + XZ 14.Prove that X + YZ = (X + Y)(X + Z) 15.Explain with an example how to express a Boolean function in its sum-of-products form. 16.Explain with an example how to express a Boolean function in its products-of-sums form. 17.Construct a truth table for minterms and maxterms of three variables and designate the terms. 18.Draw K-map using following : F(X, Y, Z) = X’ Y’ Z + XYZ’ + XYZ 19.Convert F(X, Y, Z) = m0 + m1 + m2 + m5 to canonical sum-of-product form. 20.Convert F(X, Y, Z) = M(0, 1, 4, 5, 7) to canonical product-of-sum form. 21.Convert F(X, Y, Z )= M(0, 2, 4, 5) to canonical product-of-sum form. 22.Reduce X’ Y + X + X’ Y 23.Reduce X’ Y’ Z + X’ Y’ Z’ + X’ YZ’ + XY’ Z’ 24.Reduce the Boolean expression to the simplest form A(B̅̅̅̅̅̅̅̅̅̅̅̅̅̅ + C) ( AB + AC ) 25.A truth table has output 1 for each of these inputs ABCD = 0011, ABCD = 0101, ABCD = 1000 What are the fundamental products and write minterm expression. 26.Construct a Boolean function of three variables X, Y and Z that has an output 1 when exactly two of X, Y and Z are having values 0, and an output 0 in all other cases. 27.Write the steps involved in minterm expansion of expression. 28.Write the truth table 3 input variable minterm. 29.Write the truth table 3 input variable maxterm. 30.Convert F(X, Y, Z) = X + XY’ + XZ to canonical sum-of-product form. 31.Convert the expression YZ’ + XY to canonical sum-of-product form. 32.Convert the expression (A + C)(C + D) to canonical product-of-sum form. 33.Convert the expression (X + Y)(Y + Z)(X + Z) to canonical product-of-sum form. 34.Expand the expression F(X, Y, Z) = 𝜋(0, 1, 2, 4, 5)Draw a general K-map of 3 variables (A, B and C) 35.Draw a general K-map of 4 variables W, X, Y and Z. Five marks questions: 1. State and prove Idempotence laws. 2. State and prove De Morgan’s first theorem. 3. State and prove absorption laws of Boolean algebra. 4. Simplify using laws of Boolean algebra F = XY + XZ + XYZ 5. Given the Boolean function F(X, Y, Z) = m (0, 2, 4, 5, 6) reduce it using K-map. 6. Given Boolean function F(A, B, C, D) = ∑(5, 6, 7, 8, 9, 10, 14) reduce the function F using K-map. 7. Write a logic gate diagram for the reduced SOP expression. 8. Given Boolean function F(A, B, C, D) = ∑(0, 2, 7, 8, 10, 15) reduce the function F using K-map. 9. Given Boolean function F(A, B, C, D) = ∑(7, 9, 10, 11, 12, 13, 14) reduce the function F using K-map. 10.Given Boolean function F(W, X, Y, Z) = ∑(0, 4, 8, 12) reduce the function F using K- map. 10. Given Boolean function F(A, B, C, D) = ∑(0, 4, 8, 9, 10, 11, 12, 13, 15) reduce the function F using K-map. 11.Given Boolean function F(A, B, C, D) = m0 + m1 + m2 + m3 + m4 + m5 + m8 + m9 + m10 + m11 + m13 + m15 reduce the function F using K-map. 12.Given Boolean function F(A, B, C, D) = m0 + m1 + m2 + m6 + m8 + m9 + m10 reduce the function F using K-map. 13.Given Boolean function F(W, X, Y, Z) = m0 + m1 + m2 + m3 + m4 + m5 + m6 + m7 + m8 + m9 + m10 + m11 reduce using K-map. 14.Reduce the Boolean expression using K-map: F(A, B, C, D) = m1 + m2 + m3 + m4 + m5 + m6 + m7 + m9 + m11 + m12 + m13 + m14 + m15 15.Using K-maps, simplify the expression F(W, X, Y, Z) = m1 + m3 + m5 + m6 + m7 + m9 + m11 + m13 16.Given the Boolean function F(W, X, Y, Z) = ∑(0, 1, 2, 3, 5, 7, 8, 9, 10, 11, 13, 15). Reduce it by using Karnaugh map. 17.Given the Boolean function F(W, X, Y, Z) = ∑(0, 1, 2, 3, 4, 6, 8, 10, 12, 14). Reduce it by using K-map. 18.Given the Boolean function F(A, B, C, D) = ∑(1, 3, 4, 5, 6, 7, 9, 11, 12, 13, 14, 15). Reduce it by using Karnaugh map. 19.Given the Boolean function F(W, X, Y, Z) = ∑(0, 2, 3, 4, 7, 8, 11, 12) Reduce it by using Karnaugh map. 20.Simplify the Boolean expression using K-map: F(A, B, C, D) = m1 + m3 + m4 + m5 + m7 + m8 + m9 + m14 + m15 21.Simplify the Boolean expression using K-map: F(W, X, Y, Z) = m0 + m2 + m5 + m7 + m8 + m10 + m13 + m15 22.Given Boolean function F(A, B, C, D) = 𝜋(0, 2, 4, 6, 8, 10, 14) use K-map to reduce the function F. 24. Simplify the Boolean function using K-map: F(W, X, Y, Z) = 𝜋 (0, 1, 3, 4, 5, 6, 7, 9, 10, 11, 13, 14, 15) 25. Simplify the Boolean expression using K-map: F(W,X,Y,Z)= 𝜋 (0, 2, 4, 6, 8,10,12, 14)  Chapter 3 LOGIC GATES 1. Electronic circuits that operate on one or more input signals to produce standard output a. series circuits b. parallel circuits c. logic signals d. logic gate 2. logic gates are the building blocks of all circuits in a computer a, TRUE b. FALSE c. may be both d. No answer given 3. A gate gives the output as 1 only if all the input signals are 1. a, AND b. OR c. X-OR d. NOR 4. the Boolean expression of an or gate is a. A. B b. A+B c. AA+B d. AB 5. The gate which is used to reverse the output obtained is a. NOR b. NAND c. X-OR d. NOT 6. which of the following gate will give a 0 when both of it’s inputs are 1. a. AND b. OR c. NAND d. X-OR 7. The universal gate that can be used to implement any Boolean expression is ……gate a. NAND b. X-OR c. OR d. AND 8. The gate which is called as inverter gate a. NAND b. X-OR c.NOR d. NOT 9. And gate is represented algebraically by………. a. + b. * c. -- d. % 10. the only gate that has 1 input and 1 output a. AND b. OR c. NOT d. X-OR 11. The universal gate is a. NAND b. X-OR c. OR d. AND 12. What combination is a Nand gate a. NOT, AND b. NOT OR c. NOT NAND d. NOT NOR 13. what combination is a NOR gate a. NOT, AND b. NOT OR c. NOT NAND d. NOT NOR 14. A NAND gate has _____inputs and outputs a. high input and high output b. high input and low output c. low input and low output d. low input and high output 15. Who invented the idea of logic gates a. George Boole b. Barden c. Claude Shannon d. Konrad Zure 16. Which of the following are the arithmetic logic gates? a. X-OR b. X-NOR c. BOTH A & B d. NONE OF THE ABOVE 17. Which of the following is not a logic gate a. AND b. OR c. IF d. NOT 18. The following is the truth table for ______ X ̅ 𝐗 X +𝐗̅ 0 1 1 1 0 1 a. Associative law b. Commutative law c. complementary law d. None of these 19. The logic symbol which gives the output for NOT gate is i) ii) A Y =A Y =A A a. Only i is correct b. Only ii is correct c. Both i and ii are correct d. none of these 20. i) The following is the logic symbol for AND gate A Y=A+B B ii) It produces output as TRUE when any one input is TRUE a. Only i is correct b. Only ii is correct b. Both i and ii are correct d. none of these 21. Identify the gate A A.B Y = A.B B is the symbol for a. NAND b. AND c. NOR d. XOR 22. Identify the gate A Y= A +B B is the logic symbol for a. NAND b. AND c. NOR d. XOR 23. What are the inputs for getting the output of the following gate as 1? A Y= A +B B a. A=1, B=1 b. A=0, B=0 c. A = 0, B= 1 d. A=1, B=04 24. What are the inputs for getting the output of the following gate as 1: A A.B Y = A.B B a. A=1, B=1 b. A=0, B=0 c. A = 0, B= 1 d. A=1, B=0 Three Marks questions: 1. Explain NOT gate. 2. Explain working with AND gate. 3. Write the truth table of three inputs AND gate. 4. Explain OR gate. 5. Write the truth table three input variable using OR gate. 6. Explain NOR gate. 7. Write the truth table three input variable using NOR gate. 8. Explain the working of NAND gate. 9. Write the truth table for three input variable using NAND gate. 10. Explain XOR gate. 11. Write the truth table three input variable using XOR gate. 12. Explain XNOR gate. 13. Write the truth table three input variable using XNOR gate. 14. Mention the design rules of NAND-to-NAND logic network. 15. Mention the design rules of NOR-to-NOR logic network. 16. Draw the diagram of a digital circuit for the function : F(X, Y, Z) = XYZ + X’Z’ + XYZ 17. Design a circuit to realize the following: F(A, B, C) = AB’ + AC + B’A’C 18. Draw the diagram of digital circuit for the function: F(X, Y, Z) = (X + Y)(X + Z)(Y + Z) 19. Draw the diagram of a digital circuit for: F(A, B, C, D) = AB’ + B’C + C’D using NAND-to-NAND logic. 20. Draw the circuit diagram for F = ABC + CB using NAND-to-NAND logic only. 21. Draw the diagram of digital circuit for the function F(X, Y, Z) = YZ + XZ using NAND gates only. Five marks questions: 1. Explain any two basic gates with example and truth table. 2. Explain any two derived gates with truth table. 3. Explain universal gates with truth table. 4. Explain logical AND gate, logical OR gate. 5. Explain logical NOR and logical NAND gates. 6. Explain logical XOR and logical XNOR gates. 7. Draw the diagram of a digital circuit for the following function a) XYZ + XZ + XY’Z’ b) AB + A’C ‘+ B’A’C’ 8. Realize the basic gates by using only NAND gate. 9. Realize logical NOT gate and logical AND gate using NAND gate. 10. Design to implement logical OR gate and logical AND gate using NOR logical gate. 11. Explain NAND-to-NAND rules and NOR-to-NOR rules of logic network.  Chapter 4 DATA STRUCTURES 1. ….. is a specialized format for organizing and storing data a. data structure b. primitive data structure c. sorting d. merging 2. ……..is a method of storing the data in memory so that it can be used efficiently. a. Array b. data structure c. sorting d. merging 3. Which operation is used to remove the data structure from memory space a. create b. select c. update d. destroys 4. Which is the collection of homogeneous elements under the same name? a. Array b. data structure c. stack d. queue 5. Which data structure has linear relationship between data elements? a. nonlinear b. linear c. stack d. queue 6. In which data structure is every data item connected to several other data items? a. nonlinear b. linear c. stack d. queue 7. Array size should be_ a. negative number b. positive number c. null d. Zero 8. To find the length of array we use a. L=UB-LB+1 b. L=LB-UB+1 c. L=UB-LB d. L=LB-UB 9. The base address of an array is address of a. UB b. LB c. UB-LB d. LB-UB 10. The formula to calculate address of an element of an array A is a. loca. [I])=base(I)+W(I-LB) b. loca. [I])=basea. +W(I-UB) c. loca. [I])=base(I)+W(I-UB) d. loca. [I])=basea. +W(I-LB) 11. Example for traversing in a linear array is a. binary search b. linear search c. to find max element in an array d. inserting an element at given position in an array 12. Binary search compares the element to be searched with element of an array a. first element b. middle element c. last element d. all the element 13. In binary search method if search element is less than mid position then a. high=mid-1 b. low=mid+1 c. high=mid+1 d. low=mid-1 14. Linear search compares the elements a. one by one from beginning to end b. dividing array into two parts c. only first and last position d. from low to mid position 15. In binary search the successful search is when_ a. A[mid]=ele b. A[i]=ele c. eleA[mid] 16. for I=N-1 down to Pos is the loop for a. deleting element in array b. inserting element in an array c. traversing d. both a and b 17. In…… operation all the elements are shifted into lower order position from the given position a. deleting element in array b. inserting element in an array c. traversing d. binary searching 18. Which is not the sorting method? a. heap sort b. quick sort c. shell sort d. linear sort 19. The memory address of element A[i][j] in row major order is a. loc a[i][j])=base a. +W((i-LB)+n(j-LB)) b. loc a[i][j])=base a. +W(n(j-LB)+(i-LB)) c. loc a[j][i])=base a. +W(n(I-LB)+n(j-LB)) d. loc a[i][j])=base a. +W((I- LB)+n(j-LB)) 20. The memory address of elements A[i][j] in column major element is a. loc a[i][j])=base a. +W(I-LB)+m(j-LB)) b. loc a[i][j])=base a. +W(m(j-LB)+(i- LB)) c. loc a[j][i])=base a. +W(n(I-LB)+m(j-LB)) d. loc a[i][j])=base a. +W((I-LB)+m(j- LB)) 21. The base address of an array is address of the a. A b. A[n-1] c. A d. both a and b 22. Which data structure is used to implement queues, trees, graphs a. stack b. list c. array d. None 23. In which data structure addition and deletion of element takes place from same position a. stack b. list c. array d. queue 24. In stack the end is commonly referred as a. Top b. bottom c. rear d. front 25. In stack the end opposite is known as a. Top b. base c. rear d. front 26. In the stack which element is removed first a. element inserted at first b. most recently added element c. middle element d. second element 27. In which position of the stack element will be in longest time? a. A b. base c. top d. both a and b 28. Stacks perform the ………….. operation a. last in first out b. last in last out c. last in fast out d. first in first out 29. In which operation stack is not modified a. push(item) b. pop() c. peek() d. none 30. What is the function of Peek() operation a. removes top item from stack b. test stack is empty or not c. returns the number of items in stack d. returns top item from stack but does not remove. 31. Push operation in stack is a) First increases top position and insert element b) first insert element and then increases top position c) first decreases top position and insert element d) first insert element and decrease the top position 32. Which of the following is not an application of stack. a. rearranging railroad cars b. runtime memory management c. multiprogramming platform d. conversion of infix expression into postfix and prefix expression 33. Example for infix expression a. +ab b. a+b c. ab+ d. none 34. The condition top=-1in stack indicates a. stack is full b. stack has one element c. stack overflow d. stack is empty 35. The condition top=n-1 in stack indicates a. The stack is full b. stack has one element c. stack underflow d. stack is empty 36. In which data structure the addition of new element and removal of element takes place at different end a. nonlinear b. linear c. stack d. queue 37. In Queue items are inserted at end a. Top b. front c. rear d. bottom 38. In queue items are removed at end a. Top b. front c. rear d. bottom 39. In queue we remove the element which is a. least recently added b. most recently added c. both a and b d. none 40. Queue is also called as a. last in first out b. first in last out c. first in first out d. first in first in 41. In queue which operation is generally called as push a. enqueue b. dequeue c. push d. pop 42. Which condition indicates queue is empty a. front=null b. rear=N c. front=rare d. both a and b 43. Which condition indicates only one element in queue a. front=null b. rear=N c. front=rare d. rear=N-1 44. Various application software is based on……… data structure a. linked list b. graph c. stack d. queue 45. In which of the following application queue data structure is used a. simulation b. type scheduling algorithm c. print server routine d. all of these 46. In which data structure element can be inserted and removed in any position a. simple queue b. circular queue c. priority queue d. double ended queue 47. In which queue addition and deletion takes place at both ends a. simple queue b. circular queue c. priority queue d. double ended queue 48. The disadvantage of array is a. static structure b. dynamic structure c. variable d. both a and b 49. In which operation array elements are shifted into higher order positions a. deletion b. insertion c. searching d. sorting 50. In which operation array elements are shifted into lower order positions a. deletion b. insertion c. searching d. sorting 51. In the linked list the position start gives the location of node a. first b. last c. middle d. second 52. In the linked list the pointer start position is also called as a. NULL b. head c. Tail d. none 53. The link field of last node contains a. NULL b. head c. Tail d. none 54. In the linked list link field of every node contains a. data of the node b. data of next node c. address of last node d. address of next node 55. In the doubly linked list which node points to the address of previous node? a. info b. frow c. back d. head 56. Which operation is not possible in linked list a. sorting b. searching c. merging d. inserting 57. Pointer=new type[number_of_elements] is syntax for a. pointer declaration b. allocate memory for single element c. allocate memory for block element d. structure. 58. In which data structure each node is connected to several other nodes a. nonlinear b. linear c. stack d. queue 59. Which data structure represents hierarchical relationship a. nonlinear b. linear c. stack d. queue 60. Each node in a tree has ………. child node a. zero b. more c. both a and b d. no 61. Root node in a tree is at position a. top b. bottom c. middle d. right 62. From……node all the operations commence in tree a. leaf b. child c. root d. internal 63. The edges in a graph having directions are called……. a. undirected graph b. arcs c. digraph d. all the above 64. prefix expression of (A+B)*(C+D) is a. *+AB+CD b. +AB*+CD c. AB+Cd+* d. +*AB+CD 65. Array consists of (10, 20, 25, 35, 30 40), identify which searching technique can be applied a. binary search b. linear search c. both a and b d. none 66. Which operation to access each data element exactly once is…. a. traversal b. insertion c. searching d. sorting 67. Stack can be represented using….. a. array b. linked list c. both a and b d. none 68. In binary search when the element is searched either right half or the left half of an array is …… a. element is found b. search element comparison matches c. comparison does not match d. low position is less than high position 69. In searching if (loc>=0) is …. a. unsuccessful search b. binary search c. linear search d. successful search 70. Array with one row or one column is a …. a. 1D array b. 2d array c. multi-dimensional array d. both a and b 71. Which operation is used to change data in data structure? a. create b. destroy c. select d. update 72. The study of data structure mainly deals with…. a. implementation of structure on computers b. mathematical description of structure c. to determine amount of space in memory d. all of these 73. …….is a set of vertices and edges a. tree b. graph c. queue d. stack 74. Which node is farthest node from root node? a. child node b. top node c. leaf node d. middle node 75. list in linked list contains unused nodes a. Avail b. head c. null d. start 76. Dynamic memory is allocated using…. operator a. create b. nullc. new d. pointer 77. In which linked list it is not possible to access preceding nodes is…. a. singlyb. doubly c. circular d. all of these 78. A text can be reversed using …. a. tree b. graph c. queue d. stack 79. While (j>=1) and a[j]